Commit graph

1188 commits

Author SHA1 Message Date
Ralf Schlatterbeck
08abd8807d Fixes for platform timer code
Some platforms are missing timer channels, this is now left to the
(missing) preprocessor definitions on those platforms, no
platform-specific defines needed anymore.
Also fix usage of timer counter register 3 (hardcoded) in
cpu/avr/dev/clock.c -- this code isn't used on many platforms as it
requires a very special quartz clock frequency but this now also uses
the platform timer specification.
2014-11-19 13:48:42 +01:00
Ralf Schlatterbeck
b6be226e69 Add Arduino compatibility layer
We can now directly compile arduino sketches (.pde) files.
Arduino compatible analogWrite works now.
But there is still a long way to go, serial I/O and timer stuff (delay,
millis etc) currently don't work (not tested but I don't expect this to
work).
It can be used in an arduino sketch or in a normal contiki program.
We get a PWM frequency of 490.2 Hz (a period of 2.040 ms), that's
Arduino compatible. If you need different frequencies see native timer
usage in examples/osd/pwm-example
In a contiki program you have to call arduino_pwm_timer_init to
initialize the timer before pwm works. The arduino sketch wrapper
already does this.
For running a sketch, see examples/osd/arduino-sketch
2014-11-19 13:48:05 +01:00
Ralf Schlatterbeck
b17934c491 Allow compilation of c++ files (extension .cpp) 2014-11-19 13:47:51 +01:00
Ralf Schlatterbeck
cfec3c6e2d Initial implementation of avr hardware timer
Mainly for PWM use for now.
With example to set the LED to different brightness via COAP.
We switch the LED with 50 kHz (20µs) in this example.
2014-11-19 13:47:37 +01:00
Ralf Schlatterbeck
4ceffb090d Make HW timer for contiki rtimer configurable
... and configure osd platform to use timer 5. With the new
configuration we can use timer 3 for generating hardware PWM.
2014-11-19 13:44:55 +01:00
Harald Pichler
34d64b4eb0 bugfix blockmode, 8 Hz dutycyle as standard 2014-11-19 13:34:07 +01:00
Fredrik Österlind
03a923b6b9 Merge pull request #782 from ejoerns/pull-req/avr-mcucsrfix
[avr] Removed usage of deprecated MCUSR
2014-11-13 10:25:30 +01:00
Enrico Joerns
cfbd4d49bf [cpu/stm32w108] Doxygen grouping and group name fixes 2014-11-10 23:53:33 +01:00
Enrico Joerns
198f52d2f8 [cpu/pic32] Removed excess end group 2014-11-10 23:53:33 +01:00
Enrico Joerns
f7711d1659 [cpu/arm] Added doxygen .txt files for gaining a minimum of documentation structure 2014-11-10 23:53:33 +01:00
Enrico Joerns
e2f09a367f [cpu/arm] removed free-standing @addtogroup command 2014-11-10 23:53:33 +01:00
Enrico Joerns
7d9c80aa76 [cpu] removed faulty group names 2014-11-10 23:53:33 +01:00
Enrico Joerns
9dd7f1d29a [doc] added faulty esb and msp430 references 2014-11-10 23:53:32 +01:00
Enrico Joerns
0b8769e576 [doc] Various fixes for doxygen grouping etc. 2014-11-10 23:53:32 +01:00
Adam Dunkels
d891d11324 Merge pull request #557 from kkrentz/llsec-integration
Integration of Link Layer Security
2014-10-08 15:45:46 +02:00
Enrico Joerns
8cc0bb8a1e [avr] Removed usage of deprecated MCUSR
Since avr-libc 1.8.0 MCUSR is marked as poison as it was replaced by the
correct name MCUCSR.
Thus code still using the old MCUSR name does not compile anymore.

This commit replaces usages of former MCUSR by its new name MCUCSR and
modifies the alias fallback accordingly.
2014-08-30 01:58:18 +02:00
Atis Elsts
5acf3fb770 Fix time accounting on msp430 Series 5 MCU based platforms (wismote)
See https://github.com/contiki-os/contiki/pull/727 for explanation
2014-08-21 18:09:54 +02:00
Fredrik Österlind
573d75f13d Merge pull request #727 from atiselsts/msp430_timing_fixes
Fix time accounting on msp430 Series 1 and Series 2 MCU based platforms.
2014-08-13 13:47:36 +02:00
kkrentz
4493783ce9 'free_packet' in csma.c conflicted with 'free_packet' in maca.c 2014-08-04 01:09:57 -07:00
Jim Paris
4aa2a8b95c aducrf101: Add stack pointer sampling, to help debug overflows 2014-07-29 18:25:55 -04:00
Jim Paris
3e193cca2c aducrf101: Rearrange stack and heap to maximize available stack space
Stack now starts at the top of RAM, heap starts after BSS, and
they grow towards each other.
2014-07-29 18:09:16 -04:00
Nicolas Tsiftes
582bfcb8c6 Merge pull request #696 from sieben/doc
Correct several doxygen tags (\file,...)
2014-07-28 11:42:41 +02:00
Rémy Léone
8c3fa17ec0 Correct several doxygen tags (\file) 2014-07-28 11:11:45 +02:00
Jim Paris
6db05caed9 Fix radio hangups when trying to transmit with radio off.
The border-router tries to transmit and do other stuff after turning
the radio off, and the radio driver didn't handle that very well.
With this fix, it's no longer necessary to reset the border router
after starting tunslip6.
2014-07-23 16:21:53 -04:00
Jim Paris
07201d13a3 Add IAR compiler support for ADuCRF101 2014-07-23 16:21:53 -04:00
Jim Paris
a4a3eca41d Add sniffer support to ADuCRF101
This works with the examples/cc2538dk/sniffer/ project and the
corresponding "sensniff" host-side tool.
2014-07-22 21:18:17 -04:00
Jim Paris
6967fc67c1 Add dummy uart0/uart1 headers that some examples require 2014-07-22 21:18:16 -04:00
Jim Paris
ad141b00fb Implement rtimers for ADuCRF101 2014-07-22 21:18:16 -04:00
Jim Paris
4cb97a3311 Move RF RX into its own process 2014-07-22 21:18:16 -04:00
Jim Paris
fff8a18b99 Fix ADI radio engine driver and add hook for packet reception 2014-07-22 21:18:16 -04:00
Jim Paris
b7373edf8c Add ADuCRF101 radio driver 2014-07-22 21:18:16 -04:00
Jim Paris
baa6058839 Add initial ADuCRF101 CPU support 2014-07-22 21:18:16 -04:00
Jim Paris
2be02cd269 Add CMSIS library code from ARM 2014-07-22 21:12:17 -04:00
Jim Paris
ee1ca8ac55 Add ADuCRF101 library code from Analog Devices 2014-07-22 21:12:17 -04:00
Oliver Schmidt
919b6919a5 Fixed hardware detection.
The previous chip detection was inspired by the old IP65 driver code. For some reason it didn't work as expected. The new code is simpler and based on this statement in the chip datasheet: "The upper byte always reads as 33h and can be used to help determine the I/O location of the LAN91C96."
2014-07-12 11:27:52 +02:00
Atis Elsts
705587cdb7 Fix time accounting on msp430 Series 1 and Series 2 MCU based platforms.
The problem with the current version of the code was that the condition at the end of the do...while loop at Timer A1 interrupt:
 while((TACCR1 - TAR) > INTERVAL);
evaluates to false whenever TACCR1 == TAR.
Not incrementing TACCR1 in this case leads to Timer A1 interrupt not being called for 2 seconds, until TAR counter reaches TACCR1 again after an overflow.

The patch avoids this problem by changing the condition of the loop, and using CLOCK_LT macro to compare between time values.

The patch also attempts to fix another problem: a read of TAR register while it is being updated may return a lower value than the actual contents. To avoid that, the "read twice and compare results" idiom should be used. As the TAR register is updated by the actual hardware, it is of no importance whether it is read with interrupts disabled or enabled; the problem can occur in both contexts.
2014-07-02 11:07:02 +02:00
Rémy Léone
f111058472 Removing trailing whitespaces 2014-06-30 20:01:05 +02:00
Antonio Lignan
3d64b80e40 Added flags to enable 20-bit support from msp430-gcc 4.7.x 2014-06-17 12:55:08 +02:00
Oliver Schmidt
d955b179eb Merge remote-tracking branch 'upstream/master' 2014-06-12 22:57:46 +02:00
Oliver Schmidt
a5d7a06027 Enhanced Ethernet drivers.
Made Ethernet drivers easier to consume by assembly programs.
* Replaced function pointers with JMP instructions.
* Provide return values additionally via Carry flag.

Reset Ethernet chips on initialization.
Both for the CS8900A and the W5100 the data sheets just say that
the RESET bit is automatically cleared after the RESET. This may
be interpreted in two ways:
1) There's no need to be afraid of reading the RESET bit as 1 and
unintentionally trigger a RESET by writing it back after ORing in
some other bit.
2) The RESET process isn't complete before the RESET bit hasn't
become 0 again.
It's impossible for me to empirically falsify the latter option
as the drivers are supposed to work on faster machines than the
ones I have access to. And if the RESET process includes things
like oscillators then the time to complete the RESET could differ
even between multiple exemplars of the same chip. Therefore I
opted to presume the latter option.
However that means a non-exsistent chip may cause an infinite
loop while waiting for the RESET bit to be cleared so I finally
added code to detect the presence of the Ethernet chips. There's
a risk of a chip being locked up in a way that makes the detection
fail - and therefore the RESET not being performed. This catch-22
needs to be solved by the user doing a hard RESET.
2014-06-12 22:56:35 +02:00
Adam Dunkels
9ceb059c21 Merge pull request #611 from nfi/cc2x20-sfd-config
Corrected CC2x20 sfd config and startup message.
2014-06-11 23:17:05 +02:00
Adam Dunkels
def57199b9 Merge pull request #511 from ADVANSEE/leds
leds: Fixes and enhancements
2014-06-11 22:37:34 +02:00
George Oikonomou
3552376324 Merge pull request #702 from g-oikonomou/ieee-addr-fixes
Fix incorrect IEEE address byte re-ordering
2014-06-11 09:54:52 +01:00
Oliver Schmidt
a0961fc3c4 Build static Ethernet drivers directly from source. 2014-06-09 23:35:19 +02:00
Oliver Schmidt
f124425ee1 Build static Ethernet drivers directly from source. 2014-06-09 23:14:11 +02:00
George Oikonomou
9d7c3b9866 Improve documentation for the CC2538 IEEE address re-ordering 2014-06-06 18:33:28 +01:00
George Oikonomou
5acc20fc47 Improve code style 2014-06-06 18:32:58 +01:00
George Oikonomou
623d6084e7 Make the CC2538 secondary IEEE address location configurable 2014-06-06 18:15:07 +01:00
LudovicW
66edb5b263 Fix incorrect IEEE address byte re-ordering 2014-06-06 17:22:33 +01:00
George Oikonomou
2e166a83c7 Merge pull request #691 from hexluthor/rts-cts
CC2538: Add hardware flow control (RTS/CTS) support on UART1.
2014-06-04 09:22:58 +01:00