bugfix blockmode, 8 Hz dutycyle as standard
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2 changed files with 3 additions and 1 deletions
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@ -700,10 +700,12 @@ ISR(TRX24_TX_END_vect)
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rf230_txendwait=0;
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}
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extern volatile uint8_t rf230_pending;
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/* Frame address has matched ours */
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ISR(TRX24_XAH_AMI_vect)
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{
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// DEBUGFLOW('8');
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rf230_pending=1;
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}
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/* CCAED measurement has completed */
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@ -238,7 +238,7 @@ typedef unsigned short uip_stats_t;
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#define NETSTACK_CONF_MAC csma_driver
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#define NETSTACK_CONF_RDC contikimac_driver
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/* Default is two CCA separated by 500 usec */
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#define NETSTACK_CONF_RDC_CHANNEL_CHECK_RATE 16
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#define NETSTACK_CONF_RDC_CHANNEL_CHECK_RATE 8
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/* Wireshark won't decode with the header, but padded packets will fail ipv6 checksum */
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#define CONTIKIMAC_CONF_WITH_CONTIKIMAC_HEADER 0
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/* So without the header this needed for RPL mesh to form */
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