Commit graph

75 commits

Author SHA1 Message Date
George Oikonomou 2059be3a43 Merge pull request #1031 from bthebaudeau/cc2538-gpio-irqs
cc2538: gpio: Improve and fix IRQ management
2015-05-03 18:42:53 +01:00
Ulf Knoblich 8e624c750d cc2538 i2c bug in clock computation 2015-04-29 11:07:59 +02:00
Benoît Thébaudeau 3d9d52de87 cc2538: gpio: Fix missed interrupts
Only the interrupt flags that have been handled must be cleared.
Otherwise, if a new interrupt occurs after the interrupt statuses are
read and before they are cleared, then it is discarded without having
been handled. This issue was particularly likely with two interrupt
trigger conditions occurring on different pins of the same port in a
short period of time.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-04-27 01:14:51 +02:00
Benoît Thébaudeau 1a5632cba0 cc2538: gpio: Fix missed power-up interrupts
Power-up interrupts do not always update the regular interrupt status.
Because of that, in order not to miss power-up interrupts, the ISR must
handle both the regular and the power-up interrupt statuses.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-04-27 01:14:51 +02:00
Benoît Thébaudeau 1e67ab3941 cc2538: gpio: Add macros to get interrupt status
Introduce new useful GPIO macros to:
 - get the raw interrupt status of a port,
 - get the masked interrupt status of a port,
 - get the power-up interrupt status of a port.

These macros are cleaner and less error-prone than raw register access
code copied all over the place.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-04-27 01:14:51 +02:00
Benoît Thébaudeau 41d9078ed4 cc2538: gpio: Factor out duplicated ISR code
This makes the code easier to maintain, and this reduces the binary
image size.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-04-27 01:14:50 +02:00
George Oikonomou 48e987baac Merge pull request #1005 from alignan/i2c_cc2538
CC2538 I2C driver
2015-03-28 23:23:06 +00:00
Benoît Thébaudeau 19fd7a3551 Use additive offsets
OR-ing an offset to a base address instead of adding it is dangerous
because it can only work if the base address is aligned enough for the
offset.

Moreover, if the base address or the offset has a value unknown at
compile time, then the assembly instructions dedicated to 'base +
offset' addressing on most CPUs can't be emitted by the compiler because
this would require the alignment of the base address against the offset
to be known in order to optimize 'base | offset' into 'base + offset'.
In that case, the compiler has to emit more instructions in order to
compute 'base | offset' on most CPUs, e.g. on ARM, which means larger
binary size and slower execution.

Hence, replace all occurrences of 'base | offset' with 'base + offset'.
This must become a coding rule.

Here are the results for the cc2538-demo example:
 - Compilation of uart_init():
    * before:
        REG(regs->base | UART_CC) = 0;
        200b78:	f446 637c 	orr.w	r3, r6, #4032	; 0xfc0
        200b7c:	f043 0308 	orr.w	r3, r3, #8
        200b80:	2200      	movs	r2, #0
        200b82:	601a      	str	r2, [r3, #0]

    * now:
        REG(regs->base + UART_CC) = 0;
        200b7a:	2300      	movs	r3, #0
        200b7c:	f8c4 3fc8 	str.w	r3, [r4, #4040]	; 0xfc8

 - Size of the .text section:
    * before:	0x4c7c
    * now:	0x4c28
    * saved:	84 bytes

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-03-28 17:28:15 +01:00
Antonio Lignan 22be9fd8b7 I2C driver taken from PR #677, uncrustified, made functions static and added burst modes 2015-03-25 16:44:12 +01:00
George Oikonomou 6bd8bb05f6 Improve wording 2015-02-16 10:17:58 +01:00
George Oikonomou 8751e55c94 Improve wording, fix warnigs in the SSI/SPI docs 2015-02-16 10:17:58 +01:00
George Oikonomou a93a8912c2 Clarify GPIO read and write macros 2015-02-16 10:17:57 +01:00
George Oikonomou 4100cbc9c0 Fix doxygen warning in the CC2538 uDMA driver's header 2015-02-16 10:17:57 +01:00
George Oikonomou 88e190103c Fix doxygen warning in the CC2538 SPI driver 2015-02-16 10:17:57 +01:00
Michael Karlsson 62fc6f2f07 corrected code style error 2015-02-13 13:46:57 +01:00
Michael Karlsson be9879cf18 fixed error in saving status 2015-01-21 22:35:30 +01:00
Michael Karlsson 37def294ce fixed bug that made radio die after error when not using default channel and/or not using a RDC protocol 2015-01-21 22:28:31 +01:00
Jelmer Tiete b088326b5e Corrected the register offset value of ANA_REGS_IVCTRL. TI was using the address offset instead of the physical address in their header file. 2014-12-19 04:14:34 -05:00
George Oikonomou 2e166a83c7 Merge pull request #691 from hexluthor/rts-cts
CC2538: Add hardware flow control (RTS/CTS) support on UART1.
2014-06-04 09:22:58 +01:00
George Oikonomou ba9c2d40eb Merge pull request #682 from g-oikonomou/watchdog-cc2538
Confine CC2538 WDT on/off conf inside the driver
2014-06-03 22:05:08 +01:00
Adam Dunkels 64f65b4e45 Merge pull request #617 from nfi/extended-radio-api
Extended radio API with support for setting channel, pan id, addressing modes, etc
2014-06-03 21:32:53 +02:00
Ian Martin 274b3dcd0b CC2538: Add hardware flow control (RTS/CTS) support on UART1. 2014-06-03 12:38:24 -04:00
George Oikonomou 807ee624e4 Confine CC2538 WDT on/off conf inside the driver
Instead of requiring all calls to `watchdog_start` to be
wrapped inside `#if WATCHDOG_CONF_ENABLE` guards, we control
things from within the WDT driver itself.

This commit also includes some minor documentation and
indentation cleanups
2014-05-18 14:12:16 +02:00
Ian Martin 7081440eff CC2538: Add WATCHDOG_CONF_ENABLE to optionally disable the watchdog timer. 2014-05-02 10:28:30 -04:00
George Oikonomou 08c884afa0 Improve the CC2538 extended RF API implementation
* Decouple 64-bit address from LINKADDR_SIZE
* get and set object from/to the start/end of the src/dest buffer
* We expect size == 8 (rather than size < 8) for both get_ and set_object. Error otherwise
* The RF no longer sets parameters by itself. We let the platform do this, using the extended API.
2014-04-23 12:20:16 +01:00
George Oikonomou 6028c0765f Don't hardcode min and max TX power values 2014-04-23 12:16:50 +01:00
George Oikonomou b0f1199202 Merge pull request #636 from g-oikonomou/fix-random-init-lockup
Fix CC2538 random_init lockup
2014-04-18 13:28:40 +01:00
Benoît Thébaudeau d93d129da6 cc2538: uart: Make it possible to use several UARTs simultaneously
This avoids the limitation of having a single UART available at runtime, without
duplicating code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2014-04-17 18:53:44 +02:00
Brad Campbell af27d2d252 [CC2538-SPI] Implement SPI_FLUSH, spi mode, !CS
Because the CC2538 has a multi-byte SPI RX FIFO, flushing the buffer
requires more than just a single read. This adds a loop that empties the
entire RX buffer on a FLUSH().

Different SPI chips needs different SPI settings. This commit adds a
function that allows chip drivers to configure the SPI peripheral before
using it.

The frame pin the driver was using as a chip select does not work as
most devices expect it to. It toggles after every byte, and most chips
interpret that as end of message. To make drivers more reliable, each
chip driver should setup a GPIO and assert it as needed.
2014-04-15 14:07:10 -04:00
George Oikonomou 0ec1eda75e Implement extended RF API for the CC2538 2014-04-14 15:25:30 +02:00
George Oikonomou eed1352282 Fix CC2538 random_init lockup
Contiki sometimes fails to boot correctly and locks up in
random_init()

This problem only manifests itself for specific versions
of the arm-gcc toolchain and then again only for specific
levels of optimisation (-Os vs -O2, depending on the
value of the SMALL make variable)

The lockup is caused when we write an RFCORE XREG before
the RF clock ungating has taken effect, which in turn
only occurs depending on the assembly generated for those
two instructions:

  REG(SYS_CTRL_RCGCRFC) = 1;

  REG(RFCORE_XREG_FRMCTRL0) = 0x00000008;

This commit makes the RNG wait for the ungating to take
effect before attempting to write the register
2014-04-13 14:38:00 +01:00
George Oikonomou 33abe26ec8 Merge pull request #411 from ADVANSEE/cc2538-adc
cc2538: Add adc driver and example
2014-04-13 03:05:12 +01:00
Niclas Finne a98e153e23 Added stub for extended radio API for cc2538 2014-04-03 13:38:23 +02:00
Ian Martin 336224633a Eliminate UART_CONF_IBRD and UART_CONF_FBRD. 2014-03-22 10:26:03 -04:00
Ian Martin ee45fc7533 Change uart_set_baudrate() to a do-while statement. 2014-03-22 10:22:11 -04:00
Ian Martin 1ceb8ae358 Fix rounding error in baudrate calculation. 2014-03-22 10:21:54 -04:00
Ian Martin e3c19714d4 cc2538: Support any UART baudrate. 2014-03-14 16:06:24 -04:00
LudovicW d979e5b096 CC2538: add support for UART baudrate 9600, 38400 and 57600 2014-02-11 16:01:36 +01:00
George Oikonomou c8fbf8ca6e Merge pull request #503 from ADVANSEE/cc2538-nrdata-noload
cc2538: Clean up link stage
2014-01-30 07:58:55 -08:00
Adam Dunkels 45265249fc Changed the name of the rimeaddr module to linkaddr 2014-01-29 20:12:24 +01:00
Adam Dunkels 0fe08205e1 Moved the rimeaddr.[ch] code from the core/net/rime module to the core/net module, as it is used not only by rime code 2014-01-26 23:20:36 +01:00
Benoît Thébaudeau 37e73894f1 cc2538: Move SoC data to a dedicated section to save space
Some SoC data requires huge alignments. E.g., the µDMA channel control table has
to be 1024-byte aligned. This table was simply aligned to 1024 bytes in the C
code, which had the following consequences, wasting a lot of RAM:
 - As this table could be placed anywhere in .bss, there could be an alignment
   gap of up to 1023 bytes between the preceding data and this table.
 - The size of this table was also aligned to 1024 bytes, regardless of
   UDMA_CONF_MAX_CHANNEL, making this configuration option supposed to save RAM
   just useless.
 - .bss was also aligned to at least 1024 bytes, creating a huge alignment gap
   between .data and .bss.

Instead of relying on the compiler to force this alignment, and on the linker to
automatically place data, this change places carefully such SoC data in RAM
using the linker script. A dedicated section is created to place such SoC data
requiring huge alignments, and it is put at the beginning of the SRAM in order
to ensure a maximal alignment without any gap. In this way, the alignment of
.bss also remains normal, and the size of this table is not constrained by its
alignment, but only by its contents (i.e. by UDMA_CONF_MAX_CHANNEL).

In the case of the µDMA channel control table, the data is still zeroed by
udma_init() (instead of also being zeroed as part of .bss).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-23 15:06:13 +01:00
Benoît Thébaudeau dbba311270 cc2538: Add adc driver and example
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-06 22:07:45 +01:00
Benoît Thébaudeau 5261bb861d cc2538: lpm: Fix RTIMER_NOW() upon wake-up
When returning from PM1/2, the sleep timer value (used by RTIMER_NOW()) is not
up-to-date until a positive edge on the 32-kHz clock has been detected after the
system clock restarted. To ensure an updated value is read, wait for a positive
transition on the 32-kHz clock by polling the SYS_CTRL_CLOCK_STA.SYNC_32K bit,
before reading the sleep timer value.

Because of this RTIMER_NOW() fixup, lpm_exit() has to be called at the very
beginning of ISRs waking up the SoC. This also ensures that all clocks and
timers are enabled at the correct frequency and updated before using them
following wake-up.

Without this fix, etimers could sometimes (randomly, depending on timings)
become ultra slow (observed from 10x to 40x slower than normal) if the system
exited PM1/2 very often. This issue occurred more often with PM1.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-05 20:23:29 +01:00
George Oikonomou f2c552bb55 Merge pull request #478 from ADVANSEE/cc2538-startup-cleanup
cc2538: Startup cleanup
2013-12-05 11:07:19 -08:00
George Oikonomou 17b2150081 Merge pull request #463 from ADVANSEE/cc2538-ports-pins
cc2538: Clean up and improve port and pin definitions
2013-12-05 10:31:29 -08:00
Benoît Thébaudeau a2686e581e cc2538: Add header file for flash CCA page and use it
Create a dedicated header file with all the definitions for the flash lock bit
page and customer configuration area. This avoids duplicating those definitions
in the startup-gcc.c files of all CC2538-based platforms, and this also allows
to easily manipulate the CCA from outside startup-gcc.c (e.g. for on-the-air
firmware update).

The definitions are now complete contrary to what was in startup-gcc.c:
 - Definitions have been added to select the bootloader backdoor pin and active
   level if enabled.
 - Definitions have been added to access the page and debug lock bits. The debug
   lock bit can be used to prevent someone from reading back a programmed
   firmware through JTAG if the firmware binary image has to be confidential,
   which should be combined with a disabled bootloader backdoor.
 - The application entry point is now tied to the beginning of the .text section
   instead of to the beginning of the flash. This allows projects using custom
   linker scripts to place the application entry point anywhere in the flash,
   which can be useful e.g. for on-the-air firmware update.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-05 18:45:51 +01:00
Benoît Thébaudeau 1a696eb123 cc2538: gpio: Clear the power-up interrupts in the port ISRs
The pending GPIO power-up interrupts have to be cleared in the ISRs in order not
to re-trigger the interrupts and the wake-up events.

The power-up interrupts of all pins are cleared for each port in the
corresponding port ISR. This is done after calling the registered callbacks so
that the callbacks can know which pin woke up the SoC. This is done after
clearing the regular interrupt in order to avoid getting a new wake-up interrupt
without the regular interrupt in the case of a new wake-up edge occurring
between the two clears.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-26 22:20:05 +01:00
Benoît Thébaudeau 44a5c76884 cc2538: gpio: Add macros to use GPIO power-up interrupts
The GPIO power-up interrupts have to be configured and enabled in order to be
able to wake-up the SoC from PM1+ upon a signal edge occurring on a GPIO input
pin.

This set of macros allows to:
 - configure the signal edge triggering a power-up interrupt,
 - enable and disable a power-up interrupt,
 - clear a power-up interrupt flag.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-26 22:10:47 +01:00
Benoît Thébaudeau d2f3795a30 cc2538: Clean up port and pin definitions
Homogenize port and pin definitions naming:
 - PERIPHERAL_FUNCTION_PORT for the port ID,
 - PERIPHERAL_FUNCTION_PIN for the pin ID,
 - PERIPHERAL_FUNCTION_PORT_BASE for the port base,
 - PERIPHERAL_FUNCTION_PIN_MASK for the pin mask.

Define only PERIPHERAL_FUNCTION_PORT and PERIPHERAL_FUNCTION_PIN in board.h, and
deduce PERIPHERAL_FUNCTION_PORT_BASE and PERIPHERAL_FUNCTION_PIN_MASK in the
driver from the former definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-25 15:00:41 +01:00