Confine CC2538 WDT on/off conf inside the driver
Instead of requiring all calls to `watchdog_start` to be wrapped inside `#if WATCHDOG_CONF_ENABLE` guards, we control things from within the WDT driver itself. This commit also includes some minor documentation and indentation cleanups
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b864ec2b71
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3 changed files with 31 additions and 11 deletions
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@ -46,6 +46,17 @@
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#include "cpu.h"
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#include "dev/smwdthrosc.h"
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/*---------------------------------------------------------------------------*/
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/* Enabled by default */
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#ifndef WATCHDOG_CONF_ENABLE
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#define WATCHDOG_CONF_ENABLE 1
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#endif
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#if WATCHDOG_CONF_ENABLE
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#define WATCHDOG_ENABLE SMWDTHROSC_WDCTL_EN
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#else
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#define WATCHDOG_ENABLE 0
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#endif
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/*---------------------------------------------------------------------------*/
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/** \brief Initialisation function for the WDT. Currently simply explicitly
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* sets the WDT interval to max interval */
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void
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@ -55,20 +66,24 @@ watchdog_init(void)
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REG(SMWDTHROSC_WDCTL) = 0;
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}
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/*---------------------------------------------------------------------------*/
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/** \brief Starts the WDT in watchdog mode, maximum interval */
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/** \brief Starts the WDT in watchdog mode if enabled by user configuration,
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* maximum interval */
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void
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watchdog_start(void)
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{
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/* Max interval (32768), watchdog mode, Enable */
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REG(SMWDTHROSC_WDCTL) = SMWDTHROSC_WDCTL_EN;
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/* Max interval (32768), watchdog mode, enable if configured to do so */
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REG(SMWDTHROSC_WDCTL) = WATCHDOG_ENABLE;
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}
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/*---------------------------------------------------------------------------*/
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/** \brief Writes the WDT clear sequence. This function assumes that we are
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* in watchdog mode and that interval bits (bits [1:0]) are 00 */
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/**
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* \brief Writes the WDT clear sequence.
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*
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* Due to how the SMWDTHROSC_WDCTL works, it is OK to simply write these bits
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* rather than use RMW operations.
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*/
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void
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watchdog_periodic(void)
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{
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/* Safe to write to bits [3:0] since EN is 1 */
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REG(SMWDTHROSC_WDCTL) = (SMWDTHROSC_WDCTL_CLR_3 | SMWDTHROSC_WDCTL_CLR_1);
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REG(SMWDTHROSC_WDCTL) = (SMWDTHROSC_WDCTL_CLR_2 | SMWDTHROSC_WDCTL_CLR_0);
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}
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@ -82,12 +97,19 @@ watchdog_stop(void)
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return;
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}
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/*---------------------------------------------------------------------------*/
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/** \brief Keeps control until the WDT throws a reset signal */
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/** \brief Keeps control until the WDT throws a reset signal. Starts the WDT
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* if not already started. */
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void
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watchdog_reboot(void)
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{
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INTERRUPTS_DISABLE();
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watchdog_start(); /* just in case the WDT hasn't been started yet */
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/*
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* If the WDT is not started, set minimum interval and start
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* If the WDT is started, this will have no effect
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*/
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REG(SMWDTHROSC_WDCTL) = SMWDTHROSC_WDCTL_INT | SMWDTHROSC_WDCTL_EN;
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while(1);
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}
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/**
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@ -79,7 +79,7 @@ typedef uint32_t rtimer_clock_t;
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* @{
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*/
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#ifndef WATCHDOG_CONF_ENABLE
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#define WATCHDOG_CONF_ENABLE 1 /**<Enable the watchdog timer */
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#define WATCHDOG_CONF_ENABLE 1 /**< Enable the watchdog timer */
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#endif
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/** @} */
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/*---------------------------------------------------------------------------*/
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@ -203,9 +203,7 @@ main(void)
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autostart_start(autostart_processes);
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#if WATCHDOG_CONF_ENABLE
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watchdog_start();
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#endif
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fade(LEDS_ORANGE);
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while(1) {
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