Two errors have been spotted, when IPv6 is enabled in the ravenusb
Project-Makefile:
#CONTIKI_NO_NET=1
CONTIKI_WITH_IPV6=1
The compile error results from a variable name mismatch in cdc_task.c
The variable 'r' is undeclared and should be renamed to 'route'
The linker also fails with 'undefined references'
This has been mediated by adding 'core/net' to Modules in the
Project-Makefile.
This patch adds a simple non-driver protection domain sample to serve
as an example for defining other non-driver protection domains. It
simply performs a ping-pong test of protection domain switching
latency during boot, including optional accesses to a private metadata
region, and prints out the results.
This patch extends the protection domain framework with an additional
plugin to use Task-State Segment (TSS) structures to offload much of
the work of switching protection domains to the CPU. This can save
space compared to paging, since paging requires two 4KiB page tables
and one 32-byte page table plus one whole-system TSS and an additional
32-byte data structure for each protection domain, whereas the
approach implemented by this patch just requires a 128-byte data
structure for each protection domain. Only a small number of
protection domains will typically be used, so
n * 128 < 8328 + (n * 32).
For additional information, please refer to cpu/x86/mm/README.md.
GCC 6 is introducing named address spaces for the FS and GS segments
[1]. LLVM Clang also provides address spaces for the FS and GS
segments [2]. This patch also adds support to the multi-segment X86
memory management subsystem for using these features instead of inline
assembly blocks, which enables type checking to detect some address
space mismatches.
[1] https://gcc.gnu.org/onlinedocs/gcc/Named-Address-Spaces.html
[2] http://llvm.org/releases/3.3/tools/clang/docs/LanguageExtensions.html#target-specific-extensions
This patch implements a simple, lightweight form of protection domains
using a pluggable framework. Currently, the following plugin is
available:
- Flat memory model with paging.
The overall goal of a protection domain implementation within this
framework is to define a set of resources that should be accessible to
each protection domain and to prevent that protection domain from
accessing other resources. The details of each implementation of
protection domains may differ substantially, but they should all be
guided by the principle of least privilege. However, that idealized
principle is balanced against the practical objectives of limiting the
number of relatively time-consuming context switches and minimizing
changes to existing code.
For additional information, please refer to cpu/x86/mm/README.md.
This patch also causes the C compiler to be used as the default linker
and assembler.
This patch configures Isolated Memory Regions (IMRs) to block DMA to
code and data regions that do not contain any data that needs to be
DMA-accessible.
The Intel Quark X1000 SoC includes support for Isolated Memory Regions
(IMRs), which are specified using range registers and associated
control registers that are accessible via the message bus. This patch
adds a driver for accessing those registers.
The Intel Quark X1000 SoC includes a message bus that is accessible
via PCI configuration registers. It communicates to various SoC
components such as the Isolated Memory Region (IMR) registers and the
Remote Management Unit. This patch adds a driver for accessing the
message bus.
This patch revises the I2C and GPIO initialization code to always be
run during platform boot rather than within each process that requires
it.
This patch also revises the gpio-output example to use a pin that is
set as an output by the default pinmux configuration. Previously, it
used a pin that was set as an output by the pinmux configuration that
is in effect when the OS does not change the pinmux configuration.
This patch permits interrupts to be generated by both the I2C and GPIO
controllers for simultaneously-executing applications. The controllers
share a single interrupt pin, INTC. Prior to this patch,
quarkX1000_gpio_init() routed INTA to PIRQC and IRQ 10 (due to an
incorrect assumption that INTA is connected to the GPIO controller),
and quarkX1000_i2c_init() routed INTC to PIRQC and IRQ 9. The I2C
controller initialization is a prerequisite for GPIO initialization,
so the final configuration was that INTA and INTC were both routed to
PIRQC and IRQ 10. Thus, only the GPIO ISR was being invoked, even if
the I2C controller was actually responsible for the interrupt.
This patch refactors the I2C and GPIO ISR setup and handler code so
that the shared portions are combined in
cpu/x86/drivers/legacy_pc/shared-isr.[ch]. The I2C and GPIO drivers
communicate their interrupt information to the shared component by
placing structures in a specific section of the binary.
This commit creates a `common` directory, aimed to host drivers supported by multiple boards of the CC13xx/CC26xx family.
We move the Sensortag SPI and External Flash drivers to this location and we change the Sensortag build system to pull the respective files from therein.
The driver currently supports two Winbond external flash parts with identical instruction sets. The instruction set of the Macronix MX25R8035F appears to be a superset. We therefore change the driver to add the MID/DID of the Macronix to the list of supported parts.
This will subsequently allow us to share the same driver for both the SensorTag and the CC2650 LauchPad.
This patch revises the compiler flags when LLVM Clang is in use to
cause Clang to automatically use its built-in header files rather than
those for GCC.
Also added a 2-minutes average wind direction value, replaced the 240 bytes buffer from the reference example, but probably there's room for efficiency improvement
This is to prevent a compile error caused by function prototype conflict between a function called `select()` (present in a number of sensortag peripheral drivers) and the one in `sys/select.h`. The error manifests itself with gcc-arm-embedded version 5.2.1 20151202 (2015-q4).
To fix the error we simply rename our function.
Fixes#1434
This patch adds support for optionally building EFI binaries in
addition to Multiboot ELF binaries. It includes a script,
build_uefi.sh, that downloads tool and library sources from the EDK II
project, builds the GenFw tool that is used to create UEFI binaries,
and creates a makefile that is included from the main x86 common
makefile and enables UEFI support in the Contiki build system. If the
script is not run prior to building Contiki, then an informational
message will be displayed with instructions for running build_uefi.sh
if UEFI support is desired. This patch also adds the path to the
auto-generated makefile to .gitignore.
This patch modifies the linker script for the Intel Quark X1000 to
account for the output file section offsets and alignment expectations
of the EDK II GenFw project.
This patch also adds a newlib patch to remove the weak symbol
attribute from floating point stdio support routines. See
<newlib>/newlib/README for an explanation of how the newlib developers
intended for _printf_float and _scanf_float to be linked. Newlib
declares them as weak symbols with the intention that developers would
force them to be linked only when needed using a linker command line
option. However, some but not all Contiki programs require them, so
we cannot simply always include or exclude them. Instead, we remove
the weak symbol attributes and rely on the linker to automatically
determine whether or not they should be linked. This avoids an issue
in which weak symbols were undefined in the intermediate DLL generated
as part of the UEFI build process. That resulted in the GenFw program
emitting "ERROR 3000" messages when it encountered relocations
referencing such an undefined symbol.
Finally, this patch updates README.md to both make some revisions to
account for the UART support introduced in previous patches as well as
to provide instructions for using the UEFI support.
This patch modifies the newlib and Contiki C and C++ compiler flags to
omit exception handling unwind tables (see
http://wiki.dwarfstd.org/index.php?title=Exception_Handling).
Removing these tables saves space in debug builds and has not caused
any readily-apparent functional changes.
Here is the size listing for an example program built without this
patch:
text data bss dec hex filename
76002 1508 21224 98734 181ae all-timers.galileo
Here is the size listing for the same program with this patch:
text data bss dec hex filename
72918 1508 21224 95650 175a2 all-timers.galileo
The primary motivation for this patch is to help enable UEFI support.
The .eh_frame and .eh_frame_hdr sections that are otherwise generated
are treated as code sections by the EDK2 GenFw program, since they are
read-only alloc sections. They get grouped with the actual code
sections, ahead of the data sections. This perturbs symbols and
complicates debugging.
This patch adds support for Ethernet to the Intel Galileo port. It
uses the Intel Quark X1000 Ethernet driver. It initializes the first
Ethernet interface and starts some common network services. By
default, it uses the following addresses:
- Host: 192.0.2.2
- Netmask: 255.255.255.0
- Default gateway: 192.0.2.1
- DNS server: (same as default gateway)
These settings can be changed by editing eth-conf.c.
This patch adds the galileo-pinmux.c and galileo-pinmux.h files,
which support access to pinmux configuration through a function
interface.
This is not 100% supported yet due to some pinmux paths
need Quark X1000 GPIO (legacy and non-legacy) configurations.
After we finish to implement Quark X1000 GPIO driver we'll add
support for this.
This patch adds pwm-pca9685.c and pwm-pca9685.h files,
which support access to I2C-based PCA9685 PWM controller
configuration register through a function interface.
The PCA9685 is an I2C-bus controlled 16-channel LED controller
optimized for Red/Green/Blue/Amber (RGBA) color backlighting
applications. Each LED output has its own 12-bit resolution
(4096 steps) fixed frequency individual PWM controller that
operates at a programmable frequency from a typical of 24 Hz to
1526 Hz with a duty cycle that is adjustable from 0 % to 100 %
to allow the LED to be set to a specific brightness value.
More about PCA9685 can be found in its datasheet[1].
This driver is needed in order to configure Galileo pinmux.
[1] - http://www.nxp.com/documents/data_sheet/PCA9685.pdf
This patch adds gpio-pcal9535a.c and gpio-pcal9535a.h files,
which support access to I2C-based PCAL9535A GPIO controller
configuration register through a function interface.
The PCAL9535A is a low-voltage 16-bit GPIO expander with interrupt
and reset for I2C-bus/SMBus applications. It contains the PCA9535
register set of four pairs of 8-bit Configuration, Input, Output,
and Polarity Inversion registers, and additionally, the PCAL9535A has
Agile I/O, which are additional features specifically designed to
enhance the I/O. More about PCAL9535A can be found in its datasheet[1].
This driver is needed in order to configure Galileo pinmux.
[1] - http://www.nxp.com/documents/data_sheet/PCAL9535A.pdf
