Merge branch 'master' of git://git.devl.org/git/malvira/libmc1322x into bump-libmc1322x
bump libmc1322x to 7bee48243c
Conflicts:
cpu/mc1322x/board/Makefile.board
cpu/mc1322x/lib/include/uart.h
cpu/mc1322x/lib/uart1.c
cpu/mc1322x/lib/uart2.c
cpu/mc1322x/src/default_lowlevel.c
This commit is contained in:
Mariano Alvira
commit
2c9a538582
|
|
@ -46,7 +46,7 @@
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|||
|
||||
/* XTAL TUNE parameters */
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||||
/* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */
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||||
/* for details about how to make this measurment */
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||||
/* for details about how to make this measurement */
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||||
|
||||
/* Coarse tune: add 4pf */
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#define CTUNE_4PF 1
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|
|
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|||
55
cpu/mc1322x/board/m12.h
Normal file
55
cpu/mc1322x/board/m12.h
Normal file
|
|
@ -0,0 +1,55 @@
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|||
/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
|
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the Institute nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
|
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*/
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#ifndef BOARD_M12_H
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#define BOARD_M12_H
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/* XTAL TUNE parameters */
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/* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */
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/* for details about how to make this measurement */
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/* Econotag also needs an addtional 12pf on board */
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/* Coarse tune: add 4pf */
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#define CTUNE_4PF 1
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/* Coarse tune: add 0-15 pf (CTUNE is 4 bits) */
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#define CTUNE 3
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/* Fine tune: add FTUNE * 156fF (FTUNE is 5bits) */
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#define FTUNE 3
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#define vreg_init buck_init
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#define board_init m12_init
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#include <std_conf.h>
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#endif
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|
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@ -65,7 +65,7 @@
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|
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/* XTAL TUNE parameters */
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/* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */
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/* for details about how to make this measurment */
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/* for details about how to make this measurement */
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|
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/* Econotag also needs an addtional 12pf on board */
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/* Coarse tune: add 4pf */
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|
|
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|
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@ -46,7 +46,7 @@
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|||
|
||||
/* XTAL TUNE parameters */
|
||||
/* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */
|
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/* for details about how to make this measurment */
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/* for details about how to make this measurement */
|
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|
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/* Coarse tune: add 4pf */
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#define CTUNE_4PF 1
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|
|
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|
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@ -48,7 +48,7 @@
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|||
|
||||
/* XTAL TUNE parameters */
|
||||
/* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */
|
||||
/* for details about how to make this measurment */
|
||||
/* for details about how to make this measurement */
|
||||
|
||||
/* Econotag also needs an addtional 12pf on board */
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/* Coarse tune: add 4pf */
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|
|
|
|||
|
|
@ -46,7 +46,7 @@
|
|||
|
||||
/* XTAL TUNE parameters */
|
||||
/* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */
|
||||
/* for details about how to make this measurment */
|
||||
/* for details about how to make this measurement */
|
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|
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/* Coarse tune: add 4pf */
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#define CTUNE_4PF 1
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|
|
|
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|
|
@ -46,7 +46,7 @@
|
|||
|
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/* XTAL TUNE parameters */
|
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/* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */
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||||
/* for details about how to make this measurment */
|
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/* for details about how to make this measurement */
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|
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/* Coarse tune: add 4pf */
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#define CTUNE_4PF 1
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|
|
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|
|
@ -42,6 +42,28 @@
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#define vreg_init() default_vreg_init()
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#endif
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#ifndef GPIO_LED_RED
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#define GPIO_LED_RED GPIO_40
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#endif
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#ifndef GPIO_LED_GREEN
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#define GPIO_LED_GREEN GPIO_41
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#endif
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#ifndef GPIO_LED_BLUE
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#define GPIO_LED_BLUE GPIO_42
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#endif
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#ifndef LED_RED
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#define LED_RED 40
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#endif
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#ifndef LED_GREEN
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#define LED_GREEN 41
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#endif
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#ifndef LED_BLUE
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#define LED_BLUE 42
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#endif
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/* XTAL TUNE parameters */
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/* recommended defaults from the datasheet */
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|
|
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18
cpu/mc1322x/doc/buck
Normal file
18
cpu/mc1322x/doc/buck
Normal file
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@ -0,0 +1,18 @@
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no buck
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-------
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vsupply,
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3.6, rftest-rx 46mA
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3.27, rftest-rx 42mA
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3.03, rftest-rx, 39.5mA
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2.56, rftest-rx 35mA
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2.2, rftest-rx 32mA
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buck
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-----
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3.58V, 39mA
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3.3, 37mA
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vsupply 3.03, rftest, 35.3mA
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2.47, 32.9mA
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2.2V, 31.2mA
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might have a hard time starting up everything in the <2.7V range
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BIN
cpu/mc1322x/doc/pow-rssi-lqi.gnumeric
Normal file
BIN
cpu/mc1322x/doc/pow-rssi-lqi.gnumeric
Normal file
Binary file not shown.
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@ -34,9 +34,7 @@
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*/
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#include <stdint.h>
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#include "crm.h"
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#include "adc.h"
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#include "gpio-util.h"
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#include "mc1322x.h"
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//#define ADC_CHANS_ENABLED 0x3F // channels 0-5 enabled
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//#define ADC_CHANS_ENABLED 0x7E // channels 1-6 enabled
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|
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@ -73,9 +71,26 @@ void adc_service(void) {
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}
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}
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void adc_init(void) {
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uint8_t n;
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#define _adc_setup_chan(x) do { \
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if ( channel == x ) { \
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ADC->SEQ_1bits.CH##x = 1; \
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GPIO->FUNC_SEL.ADC##x = 1; \
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GPIO->PAD_DIR.ADC##x = 0; \
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GPIO->PAD_PU_EN.ADC##x = 0; \
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}} while (0)
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void adc_setup_chan(uint8_t channel) {
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_adc_setup_chan(0);
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_adc_setup_chan(1);
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_adc_setup_chan(2);
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_adc_setup_chan(3);
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_adc_setup_chan(4);
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_adc_setup_chan(5);
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_adc_setup_chan(6);
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_adc_setup_chan(7);
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}
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|
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void adc_init(void) {
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ADC->CLOCK_DIVIDER = 80; // 300 KHz
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ADC->PRESCALE = ADC_PRESCALE_VALUE - 1; // divide by 24 for 1MHz.
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|
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@ -114,13 +129,13 @@ void adc_init(void) {
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ADC->SR_1_LOW = (REF_OSC / ADC_PRESCALE_VALUE) / (115200 / 8) + 1;
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#endif
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|
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ADC->SEQ_1 = 0
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ADC->SEQ_1 = 0;
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#if ADC_USE_TIMER
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| (1 << 15) // sequence based on Timer 1.
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ADC->SEQ_1bits.SEQ_MODE = 1; // sequence based on Timer 1
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#else
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| (0 << 15) // sequence based on convert time.
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ADC->SEQ_1bits.SEQ_MODE = 0; // sequence based on convert time.
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#endif
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| ADC_CHANS_ENABLED;
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ADC->SEQ_1bits.BATT = 1;
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ADC->CONTROL = 0xF001
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//#if ADC_USE_TIMER
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|
|
@ -129,10 +144,4 @@ void adc_init(void) {
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;
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ADC->OVERRIDE = (1 << 8);
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for (n=0; n<=8; n++) {
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if ((ADC_CHANS_ENABLED >> n) & 1) {
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gpio_select_function(30 + n, 1); // Function 1 = ADC
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gpio_set_pad_dir(30 + n, PAD_DIR_INPUT);
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}
|
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}
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}
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|
|
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|
|
@ -39,6 +39,21 @@
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#include <stdint.h>
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#include "utils.h"
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/* the Vbatt measurment reads about 200mV low --- trim by ADC_VBATT_TRIM */
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/* correction tracks well --- within 50mV over 2.1V to 3.6V */
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/* offset from correct for tags running from 3.29 vreg */
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/* trim = 146 */
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/* tag 1: -90mV */
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/* tag 2: -30mV */
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/* tag 3: -30mV */
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/* tag 4: -40mV */
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/* tag 5: +10mV */
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/* tag 6: -40mV */
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/* new trim 183 */
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/* without per unit calibration, vbatt is probably +/- 75mV */
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#define ADC_VBATT_TRIM 183
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/* ADC registers are all 16-bit wide with 16-bit access only */
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#define ADC_BASE (0x8000D000)
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|
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|
|
@ -98,7 +113,7 @@ struct ADC_struct {
|
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uint16_t TIMER1_ON:1;
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uint16_t TIMER2_ON:1;
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uint16_t SOFT_RESET:1;
|
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uint16_t AD1_FREFHL_EN:1;
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uint16_t AD1_VREFHL_EN:1;
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uint16_t AD2_VREFHL_EN:1;
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uint16_t :6;
|
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uint16_t COMPARE_IRQ_MASK:1;
|
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|
|
@ -153,8 +168,14 @@ static volatile struct ADC_struct * const ADC = (void *) (ADC_BASE);
|
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#define adc_enable() (ADC->CONTROLbits.ON = 1)
|
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#define adc_disable() (ADC->CONTROLbits.ON = 0)
|
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#define adc_select_channels(chans) (ADC->SEQ_1 = (ADC->SEQ_1 & 0xFE00) | chans)
|
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void adc_setup_chan(uint8_t channel);
|
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|
||||
extern uint16_t adc_reading[NUM_ADC_CHAN];
|
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/* use the internal reference to return adc_readings in mV */
|
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#define adc_voltage(x) (adc_reading[x] * 1200/adc_reading[8])
|
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/* return vbatt voltage in mV */
|
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#define adc_vbatt 4095 * 1200/adc_reading[8] + ADC_VBATT_TRIM
|
||||
|
||||
void ADC_flush(void);
|
||||
uint16_t ADC_READ(void);
|
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void read_scanners(void);
|
||||
|
|
|
|||
|
|
@ -51,6 +51,75 @@
|
|||
gpio_reset(GPIO_08);
|
||||
*/
|
||||
|
||||
// GPIO to Function Alias macros:
|
||||
|
||||
#define ADC0 GPIO_30
|
||||
#define ADC1 GPIO_31
|
||||
#define ADC2 GPIO_32
|
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#define ADC3 GPIO_33
|
||||
#define ADC4 GPIO_34
|
||||
#define ADC5 GPIO_35
|
||||
#define ADC6 GPIO_36
|
||||
#define ADC7 GPIO_37
|
||||
#define TDO GPIO_49
|
||||
#define TDI GPIO_48
|
||||
#define TCK GPIO_47
|
||||
#define TMS GPIO_46
|
||||
#define U2RTS GPIO_21
|
||||
#define U2CTS GPIO_20
|
||||
#define U2RX GPIO_19
|
||||
#define U2TX GPIO_18
|
||||
#define U1RTS GPIO_17
|
||||
#define U1CTS GPIO_16
|
||||
#define U1RX GPIO_15
|
||||
#define U1TX GPIO_14
|
||||
#define SDA GPIO_13
|
||||
#define SCL GPIO_12
|
||||
#define TMR3 GPIO_11
|
||||
#define TMR2 GPIO_10
|
||||
#define TMR1 GPIO_09
|
||||
#define TMR0 GPIO_08
|
||||
#define SCK GPIO_07
|
||||
#define MOSI GPIO_06
|
||||
#define MISO GPIO_05
|
||||
#define SS GPIO_04
|
||||
#define BTCK GPIO_03
|
||||
#define FSYN GPIO_02
|
||||
#define SSIRX GPIO_01
|
||||
#define SSITX GPIO_00
|
||||
#define KBI7 GPIO_29
|
||||
#define KBI6 GPIO_28
|
||||
#define KBI5 GPIO_27
|
||||
#define KBI4 GPIO_26
|
||||
#define KBI3 GPIO_25
|
||||
#define KBI2 GPIO_24
|
||||
#define KBI1 GPIO_23
|
||||
#define KBI0 GPIO_22
|
||||
#define TXON GPIO_44
|
||||
#define RXON GPIO_45
|
||||
#define ANT1 GPIO_42
|
||||
#define ANT2 GPIO_43
|
||||
#define VREF2H GPIO_38
|
||||
#define VREF2L GPIO_39
|
||||
#define VREF1H GPIO_40
|
||||
#define VREF1L GPIO_41
|
||||
#define MDO0 GPIO_51
|
||||
#define MDO1 GPIO_52
|
||||
#define MDO2 GPIO_53
|
||||
#define MDO3 GPIO_54
|
||||
#define MDO4 GPIO_55
|
||||
#define MDO5 GPIO_56
|
||||
#define MDO6 GPIO_57
|
||||
#define MDO7 GPIO_58
|
||||
#define MSEO0 GPIO_59
|
||||
#define MSEO1 GPIO_60
|
||||
#define RDY GPIO_61
|
||||
#define EVTO GPIO_62
|
||||
#define MCKO GPIO_50
|
||||
#define EVTI GPIO_63
|
||||
|
||||
|
||||
|
||||
#define _V(x,n,i) uint32_t x##_##i : n;
|
||||
#define _REP(x,n) \
|
||||
_V(x,n,00) _V(x,n,01) _V(x,n,02) _V(x,n,03) _V(x,n,04) _V(x,n,05) _V(x,n,06) _V(x,n,07) \
|
||||
|
|
|
|||
|
|
@ -50,5 +50,6 @@
|
|||
#include "i2c.h"
|
||||
#include "rtc.h"
|
||||
#include "adc.h"
|
||||
#include "pwm.h"
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -46,71 +46,71 @@ struct UART_struct {
|
|||
union {
|
||||
uint32_t CON;
|
||||
struct UART_CON {
|
||||
uint32_t :16;
|
||||
uint32_t TST:1;
|
||||
uint32_t MRXR:1;
|
||||
uint32_t MTXR:1;
|
||||
uint32_t FCE:1;
|
||||
uint32_t FCP:1;
|
||||
uint32_t XTIM:1;
|
||||
uint32_t :2;
|
||||
uint32_t TXOENB:1;
|
||||
uint32_t CONTX:1;
|
||||
uint32_t SB:1;
|
||||
uint32_t ST2:1;
|
||||
uint32_t EP:1;
|
||||
uint32_t PEN:1;
|
||||
uint32_t RXE:1;
|
||||
uint32_t TXE:1;
|
||||
uint32_t RXE:1;
|
||||
uint32_t PEN:1;
|
||||
uint32_t EP:1;
|
||||
uint32_t ST2:1;
|
||||
uint32_t SB:1;
|
||||
uint32_t CONTX:1;
|
||||
uint32_t TXOENB:1;
|
||||
uint32_t :2;
|
||||
uint32_t XTIM:1;
|
||||
uint32_t FCP:1;
|
||||
uint32_t FCE:1;
|
||||
uint32_t MTXR:1;
|
||||
uint32_t MRXR:1;
|
||||
uint32_t TST:1;
|
||||
uint32_t :16;
|
||||
} CONbits;
|
||||
};
|
||||
union {
|
||||
uint32_t STAT;
|
||||
struct UART_STAT {
|
||||
uint32_t :24;
|
||||
uint32_t TXRDY:1;
|
||||
uint32_t RXRDY:1;
|
||||
uint32_t RUE:1;
|
||||
uint32_t ROE:1;
|
||||
uint32_t TOE:1;
|
||||
uint32_t FE:1;
|
||||
uint32_t PE:1;
|
||||
uint32_t SE:1;
|
||||
uint32_t PE:1;
|
||||
uint32_t FE:1;
|
||||
uint32_t TOE:1;
|
||||
uint32_t ROE:1;
|
||||
uint32_t RUE:1;
|
||||
uint32_t RXRDY:1;
|
||||
uint32_t TXRDY:1;
|
||||
uint32_t :24;
|
||||
} USTATbits;
|
||||
};
|
||||
union {
|
||||
uint32_t DATA;
|
||||
struct UART_DATA {
|
||||
uint32_t :24;
|
||||
uint32_t DATA:8;
|
||||
uint32_t :24;
|
||||
} DATAbits;
|
||||
};
|
||||
union {
|
||||
uint32_t RXCON;
|
||||
struct UART_URXCON {
|
||||
uint32_t :26;
|
||||
uint32_t LVL:6;
|
||||
uint32_t :26;
|
||||
} RXCONbits;
|
||||
};
|
||||
union {
|
||||
uint32_t TXCON;
|
||||
struct UART_TXCON {
|
||||
uint32_t :26;
|
||||
uint32_t LVL:6;
|
||||
uint32_t :26;
|
||||
} TXCONbits;
|
||||
};
|
||||
union {
|
||||
uint32_t CTS;
|
||||
struct UART_CTS {
|
||||
uint32_t :27;
|
||||
uint32_t LVL:5;
|
||||
uint32_t :27;
|
||||
} CTSbits;
|
||||
};
|
||||
union {
|
||||
uint32_t BR;
|
||||
struct UART_BR {
|
||||
uint32_t INC:16;
|
||||
uint32_t MOD:16;
|
||||
uint32_t INC:16;
|
||||
} BRbits;
|
||||
};
|
||||
};
|
||||
|
|
@ -152,6 +152,11 @@ static volatile struct UART_struct * const UART2 = (void *) (UART2_BASE);
|
|||
|
||||
#endif /* REG_NO_COMPAT */
|
||||
|
||||
void uart_init(volatile struct UART_struct * uart, uint32_t baud);
|
||||
void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud);
|
||||
void uart_flowctl(volatile struct UART_struct * uart, uint8_t on);
|
||||
|
||||
|
||||
/* The mc1322x has a 32 byte hardware FIFO for transmitted characters.
|
||||
* Currently it is always filled from a larger RAM buffer. It would be
|
||||
* possible to eliminate that overhead by filling directly from a chain
|
||||
|
|
@ -192,3 +197,4 @@ extern volatile uint32_t u2_rx_head, u2_rx_tail;
|
|||
uint8_t uart2_getc(void);
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -932,8 +932,10 @@ void radio_init(void) {
|
|||
volatile uint32_t i;
|
||||
/* sequence 1 */
|
||||
for(i=0; i<MAX_SEQ1; i++) {
|
||||
if((unsigned int)addr_seq1[i] != (unsigned int)CRM_VREG_CNTL) {
|
||||
*(volatile uint32_t *)(addr_seq1[i]) = data_seq1[i];
|
||||
}
|
||||
}
|
||||
/* seq 1 delay */
|
||||
for(i=0; i<0x161a8; i++) { continue; }
|
||||
/* sequence 2 */
|
||||
|
|
@ -960,8 +962,10 @@ void radio_init(void) {
|
|||
}
|
||||
/* cal 5 */
|
||||
for(i=0; i<MAX_CAL5; i++) {
|
||||
if((unsigned int)addr_cal5[i] != (unsigned int)CRM_VREG_CNTL) {
|
||||
*(volatile uint32_t *)(addr_cal5[i]) = data_cal5[i];
|
||||
}
|
||||
}
|
||||
/*reg replacment */
|
||||
for(i=0; i<MAX_DATA; i++) {
|
||||
*(volatile uint32_t *)(addr_reg_rep[i]) = data_reg_rep[i];
|
||||
|
|
@ -969,12 +973,6 @@ void radio_init(void) {
|
|||
|
||||
PRINTF("initfromflash\n\r");
|
||||
|
||||
*(volatile uint32_t *)(0x80003048) = 0x00000f04; /* bypass the buck */
|
||||
for(i=0; i<0x161a8; i++) { continue; } /* wait for the bypass to take */
|
||||
// while((((*(volatile uint32_t *)(0x80003018))>>17) & 1) !=1) { continue; } /* wait for the bypass to take */
|
||||
*(volatile uint32_t *)(0x80003048) = 0x00000fa4; /* start the regulators */
|
||||
for(i=0; i<0x161a8; i++) { continue; } /* wait for the bypass to take */
|
||||
|
||||
init_from_flash(0x1F000);
|
||||
|
||||
PRINTF("ram_values:\n\r");
|
||||
|
|
@ -1203,7 +1201,11 @@ uint32_t exec_init_entry(volatile uint32_t *entries, uint8_t *valbuf)
|
|||
PRINTF("init_entry: address value pair - *0x%08x = 0x%08x\n\r",
|
||||
(unsigned int)entries[0],
|
||||
(unsigned int)entries[1]);
|
||||
if ((unsigned int)entries[0] != (unsigned int)CRM_VREG_CNTL) {
|
||||
reg(entries[0]) = entries[1];
|
||||
} else {
|
||||
PRINTF("skipping VREG_CNTL\n\r");
|
||||
}
|
||||
return 2;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
178
cpu/mc1322x/lib/uart.c
Normal file
178
cpu/mc1322x/lib/uart.c
Normal file
|
|
@ -0,0 +1,178 @@
|
|||
/*
|
||||
* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
|
||||
* to the MC1322x project (http://mc1322x.devl.org)
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the Institute nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* This file is part of libmc1322x: see http://mc1322x.devl.org
|
||||
* for details.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#include <mc1322x.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#define MOD 9999
|
||||
#define CLK 24000000
|
||||
#define DIV 16 /* uart->CON.XTIM = 0 is 16x oversample (datasheet is incorrect) */
|
||||
|
||||
void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud) {
|
||||
uint64_t inc;
|
||||
|
||||
/* baud rate eqn from reference manual */
|
||||
/* multiply by an additional 10 to do a fixed point round later */
|
||||
inc = ((uint64_t) baud * DIV * MOD * 10 / CLK ) - 10 ;
|
||||
/* add 5 and divide by 10 to get a rounding */
|
||||
inc = (inc + 5) / 10;
|
||||
|
||||
/* UART must be disabled to set the baudrate */
|
||||
uart->CONbits.TXE = 0;
|
||||
uart->CONbits.RXE = 0;
|
||||
|
||||
uart->BR = ( (uint16_t)inc << 16 ) | MOD;
|
||||
|
||||
uart->CONbits.XTIM = 0;
|
||||
uart->CONbits.TXE = 1;
|
||||
uart->CONbits.RXE = 1;
|
||||
}
|
||||
|
||||
void uart_flowctl(volatile struct UART_struct * uart, uint8_t on) {
|
||||
if (on) {
|
||||
if( uart == UART1 ) {
|
||||
/* CTS and RTS directions */
|
||||
GPIO->PAD_DIR_SET.U1CTS = 1;
|
||||
GPIO->PAD_DIR_RESET.U1RTS = 1;
|
||||
/* function select to uart */
|
||||
GPIO->FUNC_SEL.U1CTS = 1;
|
||||
GPIO->FUNC_SEL.U1RTS = 1;
|
||||
} else {
|
||||
/* UART 2 */
|
||||
/* CTS and RTS directions */
|
||||
GPIO->PAD_DIR_SET.U2CTS = 1;
|
||||
GPIO->PAD_DIR_RESET.U2RTS = 1;
|
||||
/* function select to uart */
|
||||
GPIO->FUNC_SEL.U2CTS = 1;
|
||||
GPIO->FUNC_SEL.U2RTS = 1;
|
||||
}
|
||||
/* enable flow control */
|
||||
uart->CONbits.FCE = 1;
|
||||
} else {
|
||||
/* off */
|
||||
/* disable flow control */
|
||||
uart->CONbits.FCE = 0;
|
||||
if( uart == UART1 ) {
|
||||
/* CTS and RTS to inputs */
|
||||
GPIO->PAD_DIR_RESET.U1CTS = 1;
|
||||
GPIO->PAD_DIR_RESET.U1RTS = 1;
|
||||
/* function select to gpio */
|
||||
GPIO->FUNC_SEL.U1CTS = 3;
|
||||
GPIO->FUNC_SEL.U1RTS = 3;
|
||||
} else {
|
||||
/* UART 2 */
|
||||
/* CTS and RTS to inputs */
|
||||
GPIO->PAD_DIR_RESET.U2CTS = 1;
|
||||
GPIO->PAD_DIR_RESET.U2RTS = 1;
|
||||
/* function select to gpio */
|
||||
GPIO->FUNC_SEL.U2CTS = 3;
|
||||
GPIO->FUNC_SEL.U2RTS = 3;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void uart_init(volatile struct UART_struct * uart, uint32_t baud) {
|
||||
/* enable the uart so we can set the gpio mode */
|
||||
/* see Section 11.5.1.2 Alternate Modes */
|
||||
/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
|
||||
/* From the datasheet: "The peripheral function will control operation of the pad IF */
|
||||
/* THE PERIPHERAL IS ENABLED. */
|
||||
uart->CONbits = (struct UART_CON) {
|
||||
.TXE = 1,
|
||||
.RXE = 1,
|
||||
};
|
||||
|
||||
/* interrupt when there are this number or more bytes free in the TX buffer*/
|
||||
uart->TXCON = 16;
|
||||
|
||||
if( uart == UART1 ) {
|
||||
/* TX and RX directions */
|
||||
GPIO->PAD_DIR_SET.U1TX = 1;
|
||||
GPIO->PAD_DIR_RESET.U1RX = 1;
|
||||
|
||||
/* set func sel to UART */
|
||||
GPIO->FUNC_SEL.U1TX = 1;
|
||||
GPIO->FUNC_SEL.U1RX = 1;
|
||||
|
||||
#if UART1_RX_BUFFERSIZE > 32
|
||||
*UART1_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
|
||||
*UART1_URXCON = 30; /* interrupt when fifo is nearly full */
|
||||
u1_rx_head = 0; u1_rx_tail = 0;
|
||||
#elif UART1_RX_BUFFERSIZE < 32 /* enable receive, transmit, flow control, disable rx interrupt */
|
||||
*UART1_UCON = (1 << 0) | (1 << 1) | (1 << 12) | (1 << 14);
|
||||
*UART1_UCTS = UART1_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
|
||||
*GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART1 CTS and RTS */
|
||||
#else
|
||||
*UART1_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
|
||||
#endif
|
||||
|
||||
u1_tx_head = 0; u1_tx_tail = 0;
|
||||
|
||||
/* tx and rx interrupts are enabled in the UART by default */
|
||||
/* see status register bits 13 and 14 */
|
||||
/* enable UART1 interrupts in the interrupt controller */
|
||||
enable_irq(UART1);
|
||||
|
||||
} else {
|
||||
/* UART2 */
|
||||
/* TX and RX directions */
|
||||
GPIO->PAD_DIR_SET.U2TX = 1;
|
||||
GPIO->PAD_DIR_RESET.U1RX = 1;
|
||||
|
||||
/* set func sel to UART */
|
||||
GPIO->FUNC_SEL.U2TX = 1;
|
||||
GPIO->FUNC_SEL.U2RX = 1;
|
||||
|
||||
#if UART2_RX_BUFFERSIZE > 32
|
||||
*UART2_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
|
||||
*UART2_URXCON = 30; /* interrupt when fifo is nearly full */
|
||||
u2_rx_head = 0; u2_rx_tail = 0;
|
||||
#elif UART2_RX_BUFFERSIZE < 32 /* enable receive, transmit, disable flow control, disable rx interrupt */
|
||||
*UART2_UCON = (1 << 0) | (1 << 1) | (0 << 12) | (1 << 14);
|
||||
*UART2_UCTS = UART2_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
|
||||
*GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART2 CTS and RTS */
|
||||
#else
|
||||
*UART2_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
|
||||
#endif
|
||||
|
||||
u2_tx_head = 0; u2_tx_tail = 0;
|
||||
|
||||
enable_irq(UART2);
|
||||
}
|
||||
|
||||
uart_setbaud(uart, baud);
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -57,7 +57,7 @@ void uart1_isr(void) {
|
|||
u1_rx_buf[u1_rx_tail]= *UART1_UDATA;
|
||||
u1_rx_tail = u1_rx_tail_next;
|
||||
} else { //buffer is full, flush the fifo
|
||||
while (*UART1_URXCON !=0) if (*UART1_UDATA);
|
||||
while (*UART1_URXCON !=0) { if (*UART1_UDATA) { } }
|
||||
}
|
||||
}
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ void uart2_isr(void) {
|
|||
u2_rx_buf[u2_rx_tail]= *UART2_UDATA;
|
||||
u2_rx_tail = u2_rx_tail_next;
|
||||
} else { //buffer is full, flush the fifo
|
||||
while (*UART2_URXCON !=0) if (*UART2_UDATA);
|
||||
while (*UART2_URXCON !=0) { if (*UART2_UDATA) { } }
|
||||
}
|
||||
}
|
||||
return;
|
||||
|
|
@ -73,12 +73,12 @@ void uart2_isr(void) {
|
|||
#endif
|
||||
return;
|
||||
}
|
||||
|
||||
*UART2_UDATA = u2_tx_buf[u2_tx_tail];
|
||||
u2_tx_tail++;
|
||||
if (u2_tx_tail >= sizeof(u2_tx_buf))
|
||||
u2_tx_tail = 0;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void uart2_putc(char c) {
|
||||
|
|
|
|||
|
|
@ -45,96 +45,27 @@ void default_vreg_init(void) {
|
|||
*CRM_VREG_CNTL = 0x00000ff8; /* start the regulators */
|
||||
}
|
||||
|
||||
void uart1_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) {
|
||||
|
||||
/* UART must be disabled to set the baudrate */
|
||||
UART1->CON = 0;
|
||||
|
||||
UART1->BR = ( inc << 16 ) | mod;
|
||||
|
||||
/* TX and CTS as outputs */
|
||||
GPIO->PAD_DIR_SET.GPIO_14 = 1;
|
||||
GPIO->PAD_DIR_SET.GPIO_16 = 1;
|
||||
|
||||
/* RX and RTS as inputs */
|
||||
GPIO->PAD_DIR_RESET.GPIO_15 = 1;
|
||||
GPIO->PAD_DIR_RESET.GPIO_17 = 1;
|
||||
|
||||
/* see Section 11.5.1.2 Alternate Modes */
|
||||
/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
|
||||
/* From the datasheet: "The peripheral function will control operation of the pad IF */
|
||||
/* THE PERIPHERAL IS ENABLED. */
|
||||
|
||||
#if UART1_RX_BUFFERSIZE > 32
|
||||
*UART1_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
|
||||
*UART1_URXCON = 30; /* interrupt when fifo is nearly full */
|
||||
u1_rx_head = 0; u1_rx_tail = 0;
|
||||
#elif UART1_RX_BUFFERSIZE < 32 /* enable receive, transmit, flow control, disable rx interrupt */
|
||||
*UART1_UCON = (1 << 0) | (1 << 1) | (1 << 12) | (1 << 14);
|
||||
*UART1_UCTS = UART1_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
|
||||
*GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART1 CTS and RTS */
|
||||
#else
|
||||
*UART1_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
|
||||
#endif
|
||||
|
||||
if(samp == UCON_SAMP_16X)
|
||||
set_bit(*UART1_UCON,UCON_SAMP);
|
||||
|
||||
/* set GPIO15-14 to UART (UART1 TX and RX)*/
|
||||
GPIO->FUNC_SEL.GPIO_14 = 1;
|
||||
GPIO->FUNC_SEL.GPIO_15 = 1;
|
||||
|
||||
/* interrupt when there are this number or more bytes free in the TX buffer*/
|
||||
UART1->TXCON = 16;
|
||||
u1_tx_head = 0; u1_tx_tail = 0;
|
||||
|
||||
/* enable UART1 interrupts in the interrupt controller */
|
||||
enable_irq(UART1);
|
||||
void buck_init(void) {
|
||||
CRM->SYS_CNTLbits.PWR_SOURCE = 1;
|
||||
CRM->VREG_CNTLbits.BUCK_SYNC_REC_EN = 1;
|
||||
CRM->VREG_CNTLbits.BUCK_BYPASS_EN = 0;
|
||||
CRM->VREG_CNTLbits.BUCK_EN = 1;
|
||||
while(CRM->STATUSbits.VREG_BUCK_RDY == 0) { continue; }
|
||||
CRM->VREG_CNTLbits.VREG_1P5V_SEL = 3;
|
||||
CRM->VREG_CNTLbits.VREG_1P5V_EN = 3;
|
||||
CRM->VREG_CNTLbits.VREG_1P8V_EN = 1;
|
||||
while(CRM->STATUSbits.VREG_1P5V_RDY == 0) { continue; }
|
||||
while(CRM->STATUSbits.VREG_1P8V_RDY == 0) { continue; }
|
||||
}
|
||||
|
||||
void uart2_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) {
|
||||
|
||||
/* UART must be disabled to set the baudrate */
|
||||
UART2->CON = 0;
|
||||
|
||||
UART2->BR = ( inc << 16 ) | mod;
|
||||
|
||||
/* TX and CTS as outputs */
|
||||
GPIO->PAD_DIR_SET.GPIO_18 = 1;
|
||||
GPIO->PAD_DIR_SET.GPIO_20 = 1;
|
||||
|
||||
/* RX and RTS as inputs */
|
||||
GPIO->PAD_DIR_RESET.GPIO_19 = 1;
|
||||
GPIO->PAD_DIR_RESET.GPIO_21 = 1;
|
||||
|
||||
/* see Section 11.5.1.2 Alternate Modes */
|
||||
/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
|
||||
/* From the datasheet: "The peripheral function will control operation of the pad IF */
|
||||
/* THE PERIPHERAL IS ENABLED. */
|
||||
|
||||
#if UART2_RX_BUFFERSIZE > 32
|
||||
*UART2_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
|
||||
*UART2_URXCON = 30; /* interrupt when fifo is nearly full */
|
||||
u2_rx_head = 0; u2_rx_tail = 0;
|
||||
#elif UART2_RX_BUFFERSIZE < 32 /* enable receive, transmit, disable flow control, disable rx interrupt */
|
||||
*UART2_UCON = (1 << 0) | (1 << 1) | (0 << 12) | (1 << 14);
|
||||
*UART2_UCTS = UART2_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
|
||||
*GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART2 CTS and RTS */
|
||||
#else
|
||||
*UART2_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
|
||||
#endif
|
||||
|
||||
if(samp == UCON_SAMP_16X)
|
||||
set_bit(*UART2_UCON,UCON_SAMP);
|
||||
|
||||
/* set GPIO15-14 to UART (UART2 TX and RX)*/
|
||||
GPIO->FUNC_SEL.GPIO_18 = 1;
|
||||
GPIO->FUNC_SEL.GPIO_19 = 1;
|
||||
|
||||
/* interrupt when there are this number or more bytes free in the TX buffer*/
|
||||
UART2->TXCON = 16;
|
||||
u2_tx_head = 0; u2_tx_tail = 0;
|
||||
|
||||
/* enable UART2 interrupts in the interrupt controller */
|
||||
enable_irq(UART2);
|
||||
void m12_init(void) {
|
||||
/* configure pullups for low power */
|
||||
GPIO->FUNC_SEL.GPIO_63 = 3;
|
||||
GPIO->PAD_PU_SEL.GPIO_63 = 0;
|
||||
GPIO->FUNC_SEL.SS = 3;
|
||||
GPIO->PAD_PU_SEL.SS = 1;
|
||||
GPIO->FUNC_SEL.VREF2H = 3;
|
||||
GPIO->PAD_PU_SEL.VREF2H = 1;
|
||||
GPIO->FUNC_SEL.U1RTS = 3;
|
||||
GPIO->PAD_PU_SEL.U1RTS = 1;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -41,8 +41,8 @@
|
|||
#define trim_xtal() pack_XTAL_CNTL(CTUNE_4PF, CTUNE, FTUNE, IBIAS)
|
||||
|
||||
void default_vreg_init(void);
|
||||
void uart1_init(uint16_t inc, uint16_t mod, uint8_t samp);
|
||||
void uart2_init(uint16_t inc, uint16_t mod, uint8_t samp);
|
||||
void buck_init(void);
|
||||
void m12_init(void);
|
||||
|
||||
void irq_register_timer_handler(int timer, void (*isr)(void));
|
||||
|
||||
|
|
|
|||
|
|
@ -45,19 +45,24 @@ int main(void)
|
|||
uint8_t c;
|
||||
|
||||
trim_xtal();
|
||||
uart1_init(INC,MOD,SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
adc_init();
|
||||
|
||||
printf("adc test\r\n");
|
||||
|
||||
printf("\x1B[2J"); // clear screen
|
||||
|
||||
for (c=0; c<=7; c++) {
|
||||
adc_setup_chan(c);
|
||||
}
|
||||
|
||||
for(;;) {
|
||||
printf("\x1B[H"); // cursor home
|
||||
printf("# Value\r\n");
|
||||
for (c=0; c<NUM_ADC_CHAN; c++) {
|
||||
adc_service();
|
||||
printf("%u %04u\r\n", c, adc_reading[c]);
|
||||
}
|
||||
printf("%u %04u %04u mV\r\n", c, adc_reading[c], adc_voltage(c));
|
||||
}
|
||||
printf("vbatt: %04u mV", adc_vbatt);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ void main(void) {
|
|||
/* trim the reference osc. to 24MHz */
|
||||
trim_xtal();
|
||||
|
||||
uart_init(INC, MOD, SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
vreg_init();
|
||||
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ void main(void) {
|
|||
/* trim the reference osc. to 24MHz */
|
||||
trim_xtal();
|
||||
|
||||
uart_init(INC, MOD, SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
vreg_init();
|
||||
|
||||
|
|
|
|||
|
|
@ -99,7 +99,7 @@ void main(void) {
|
|||
/* trim the reference osc. to 24MHz */
|
||||
trim_xtal();
|
||||
|
||||
uart_init(INC, MOD, SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
vreg_init();
|
||||
|
||||
|
|
|
|||
|
|
@ -36,18 +36,9 @@
|
|||
#ifndef CONFIG_H
|
||||
#define CONFIG_H
|
||||
|
||||
/* Baud rate */
|
||||
#define MOD 9999
|
||||
/* 230400 bps, INC=767, MOD=9999, 24Mhz 16x samp */
|
||||
/* 115200 bps, INC=767, MOD=9999, 24Mhz 8x samp */
|
||||
#define INC 767
|
||||
/* 921600 bps, MOD=9999, 24Mhz 16x samp */
|
||||
//#define INC 3071
|
||||
#define SAMP UCON_SAMP_8X
|
||||
//#define SAMP UCON_SAMP_16X
|
||||
|
||||
/* use uart1 for console */
|
||||
#define uart_init uart1_init
|
||||
/* nvm interface */
|
||||
#define NVM_INTERFACE gNvmInternalInterface_c
|
||||
/*#define NVM_INTERFACE gNvmExternalInterface_c */
|
||||
|
||||
/* nvm-read */
|
||||
#define READ_ADDR 0x1f000
|
||||
|
|
|
|||
|
|
@ -84,8 +84,8 @@ void main(void) {
|
|||
volatile uint32_t state = SCAN_X;
|
||||
volatile uint32_t addr,data;
|
||||
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
uart_init(INC, MOD, SAMP);
|
||||
disable_irq(UART1);
|
||||
|
||||
vreg_init();
|
||||
|
|
|
|||
|
|
@ -35,6 +35,7 @@
|
|||
|
||||
#include <mc1322x.h>
|
||||
#include <board.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#include "tests.h"
|
||||
#include "config.h"
|
||||
|
|
@ -45,33 +46,43 @@ void main(void) {
|
|||
uint32_t buf[READ_NBYTES/4];
|
||||
uint32_t i;
|
||||
|
||||
uart_init(INC, MOD, SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
print_welcome("nvm-read");
|
||||
|
||||
vreg_init();
|
||||
// buck_init();
|
||||
while(CRM->STATUSbits.VREG_1P5V_RDY == 0) { continue; }
|
||||
while(CRM->STATUSbits.VREG_1P8V_RDY == 0) { continue; }
|
||||
|
||||
putstr("Detecting internal nvm\n\r");
|
||||
printf("Sys cntl %08x\n\r", (unsigned int)CRM->SYS_CNTL);
|
||||
printf("vreg cntl %08x\n\r", (unsigned int)CRM->VREG_CNTL);
|
||||
printf("crm status %08x\n\r", (unsigned int)CRM->STATUS);
|
||||
|
||||
err = nvm_detect(gNvmInternalInterface_c, &type);
|
||||
if(NVM_INTERFACE == gNvmInternalInterface_c)
|
||||
{
|
||||
printf("Detecting internal nvm\n\r");
|
||||
} else {
|
||||
printf("Setting up gpio\r\n");
|
||||
/* set SPI func */
|
||||
GPIO->FUNC_SEL.GPIO_04 = 1;
|
||||
GPIO->FUNC_SEL.GPIO_05 = 1;
|
||||
GPIO->FUNC_SEL.GPIO_06 = 1;
|
||||
GPIO->FUNC_SEL.GPIO_07 = 1;
|
||||
printf("Detecting external nvm\n\r");
|
||||
}
|
||||
|
||||
putstr("nvm_detect returned: 0x");
|
||||
put_hex(err);
|
||||
putstr(" type is: 0x");
|
||||
put_hex32(type);
|
||||
putstr("\n\r");
|
||||
err = nvm_detect(NVM_INTERFACE, &type);
|
||||
|
||||
printf("nvm_detect returned: 0x%02x type is: 0x%08x\r\n", err, (unsigned int)type);
|
||||
|
||||
nvm_setsvar(0);
|
||||
|
||||
err = nvm_read(gNvmInternalInterface_c, type, (uint8_t *)buf, READ_ADDR, READ_NBYTES);
|
||||
putstr("nvm_read returned: 0x");
|
||||
put_hex(err);
|
||||
putstr("\n\r");
|
||||
err = nvm_read(NVM_INTERFACE, type, (uint8_t *)buf, READ_ADDR, READ_NBYTES);
|
||||
printf("nvm_read returned: 0x%02x\r\n", err);
|
||||
|
||||
for(i=0; i<READ_NBYTES/4; i++) {
|
||||
putstr("0x");
|
||||
put_hex32(buf[i]);
|
||||
putstr("\n\r");
|
||||
for(i=0; i<16/4; i++) {
|
||||
printf("0x%08x\r\n", (unsigned int)buf[i]);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -35,6 +35,7 @@
|
|||
|
||||
#include <mc1322x.h>
|
||||
#include <board.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#include "tests.h"
|
||||
#include "config.h"
|
||||
|
|
@ -45,52 +46,50 @@ void main(void) {
|
|||
uint32_t buf[WRITE_NBYTES/4];
|
||||
uint32_t i;
|
||||
|
||||
uart_init(INC, MOD, SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
print_welcome("nvm-write");
|
||||
|
||||
vreg_init();
|
||||
|
||||
putstr("Detecting internal nvm\n\r");
|
||||
if(NVM_INTERFACE == gNvmInternalInterface_c)
|
||||
{
|
||||
printf("Detecting internal nvm\n\r");
|
||||
} else {
|
||||
printf("Setting up gpio\r\n");
|
||||
/* set SPI func */
|
||||
GPIO->FUNC_SEL.GPIO_04 = 1;
|
||||
GPIO->FUNC_SEL.GPIO_05 = 1;
|
||||
GPIO->FUNC_SEL.GPIO_06 = 1;
|
||||
GPIO->FUNC_SEL.GPIO_07 = 1;
|
||||
printf("Detecting external nvm\n\r");
|
||||
}
|
||||
|
||||
err = nvm_detect(gNvmInternalInterface_c, &type);
|
||||
|
||||
putstr("nvm_detect returned: 0x");
|
||||
put_hex(err);
|
||||
putstr(" type is: 0x");
|
||||
put_hex32(type);
|
||||
putstr("\n\r");
|
||||
err = nvm_detect(NVM_INTERFACE, &type);
|
||||
|
||||
printf("nvm_detect returned: 0x%02x type is: 0x%08x\r\n", err, (unsigned int)type);
|
||||
|
||||
buf[0] = WRITEVAL0;
|
||||
buf[1] = WRITEVAL1;
|
||||
|
||||
err = nvm_erase(gNvmInternalInterface_c, type, 0x40000000); /* erase sector 30 --- sector 31 is the 'secret zone' */
|
||||
putstr("nvm_erase returned: 0x");
|
||||
put_hex(err);
|
||||
putstr("\n\r");
|
||||
err = nvm_erase(NVM_INTERFACE, type, 1 << WRITE_ADDR/4096);
|
||||
printf("nvm_erase returned: 0x%02x\r\n", err);
|
||||
|
||||
err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *)buf, WRITE_ADDR, WRITE_NBYTES);
|
||||
putstr("nvm_write returned: 0x");
|
||||
put_hex(err);
|
||||
putstr("\n\r");
|
||||
putstr("writing\n\r");
|
||||
err = nvm_write(NVM_INTERFACE, type, (uint8_t *)buf, WRITE_ADDR, WRITE_NBYTES);
|
||||
printf("nvm_write returned: 0x%02x\r\n", err);
|
||||
|
||||
printf("writing\n\r");
|
||||
for(i=0; i<WRITE_NBYTES/4; i++) {
|
||||
putstr("0x");
|
||||
put_hex32(buf[i]);
|
||||
putstr("\n\r");
|
||||
printf("0x%08x\r\n", (unsigned int)buf[i]);
|
||||
buf[i] = 0x00000000; /* clear buf for the read */
|
||||
}
|
||||
|
||||
err = nvm_read(gNvmInternalInterface_c, type, (uint8_t *)buf, WRITE_ADDR, WRITE_NBYTES);
|
||||
putstr("nvm_read returned: 0x");
|
||||
put_hex(err);
|
||||
putstr("\n\r");
|
||||
putstr("reading\n\r");
|
||||
err = nvm_read(NVM_INTERFACE, type, (uint8_t *)buf, WRITE_ADDR, WRITE_NBYTES);
|
||||
printf("nvm_read returned: 0x%02x\r\n", err);
|
||||
|
||||
printf("reading\r\n");
|
||||
for(i=0; i<WRITE_NBYTES/4; i++) {
|
||||
putstr("0x");
|
||||
put_hex32(buf[i]);
|
||||
putstr("\n\r");
|
||||
printf("0x%08x\r\n", (unsigned int)buf[i]);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -117,7 +117,7 @@ void main(void) {
|
|||
/* trim the reference osc. to 24MHz */
|
||||
pack_XTAL_CNTL(CTUNE_4PF, CTUNE, FTUNE, IBIAS);
|
||||
|
||||
uart_init(INC, MOD, SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
vreg_init();
|
||||
|
||||
|
|
|
|||
|
|
@ -65,6 +65,8 @@ size_t fwrite(const void *ptr, size_t size, size_t nmemb,
|
|||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
int main(void)
|
||||
{
|
||||
char *ptr = "Hello world!";
|
||||
|
|
@ -74,7 +76,7 @@ int main(void)
|
|||
int mi;
|
||||
// char buf[80];
|
||||
|
||||
uart_init(INC, MOD, SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
print_size(int8_t);
|
||||
print_size(uint8_t);
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@ int main(void)
|
|||
int x = 32768;
|
||||
|
||||
trim_xtal();
|
||||
uart1_init(INC,MOD,SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
rtc_init();
|
||||
|
||||
printf("pwm test\r\n");
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@ void main(void) {
|
|||
/* trim the reference osc. to 24MHz */
|
||||
trim_xtal();
|
||||
|
||||
uart_init(INC, MOD, SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
vreg_init();
|
||||
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@ void main(void) {
|
|||
/* trim the reference osc. to 24MHz */
|
||||
trim_xtal();
|
||||
|
||||
uart_init(INC, MOD, SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
vreg_init();
|
||||
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@
|
|||
void main(void) {
|
||||
volatile uint8_t *data;
|
||||
|
||||
uart_init(INC, MOD, SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
for(data = DUMP_BASE; data < ((uint8_t *)(DUMP_BASE+DUMP_LEN)); data++) {
|
||||
uart1_putc(*data);
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@
|
|||
|
||||
void main(void) {
|
||||
|
||||
uart_init(INC,MOD,SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
*mem32(0x00401ffc) = 0x01234567;
|
||||
*mem32(0x00407ffc) = 0xdeadbeef;
|
||||
|
|
|
|||
|
|
@ -41,8 +41,8 @@
|
|||
|
||||
void main(void) {
|
||||
|
||||
uart1_init(INC,MOD,SAMP);
|
||||
uart2_init(INC,MOD,SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
uart_init(UART2, 115200);
|
||||
|
||||
while(1) {
|
||||
if(uart1_can_get()) {
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@
|
|||
|
||||
void main(void) {
|
||||
|
||||
uart1_init(INC,MOD,SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
while(1) {
|
||||
if(uart1_can_get()) {
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@
|
|||
void main(void) {
|
||||
volatile uint32_t i;
|
||||
|
||||
uart1_init(INC,MOD,SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
printf("reset\n\r");
|
||||
|
||||
|
|
|
|||
|
|
@ -48,7 +48,7 @@ int main(void)
|
|||
ctune = 0;
|
||||
ftune = 0;
|
||||
|
||||
uart1_init(INC,MOD,SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
print_welcome("pwm test\r\n");
|
||||
pack_XTAL_CNTL(ctune_4pf, ctune, ftune, IBIAS);
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@ INSTALL= /usr/local/bin
|
|||
|
||||
################
|
||||
|
||||
LDFLAGS = -lftdi
|
||||
LDLIBS = -lftdi
|
||||
|
||||
TARGETS = bbmc
|
||||
|
||||
|
|
|
|||
|
|
@ -56,6 +56,11 @@
|
|||
#define REDBEE_USB_VREF2H low(6)
|
||||
#define REDBEE_USB_INTERFACE INTERFACE_B
|
||||
|
||||
#define FLEXIBITY_USB_RESET high(2)
|
||||
#define FLEXIBITY_USB_VREF2L high(7)
|
||||
#define FLEXIBITY_USB_VREF2H high(6)
|
||||
#define FLEXIBITY_USB_INTERFACE INTERFACE_A
|
||||
|
||||
#define BOARD REDBEE_USB
|
||||
|
||||
#define STR(x) #x
|
||||
|
|
@ -108,6 +113,10 @@ static struct layout layouts[] =
|
|||
.desc = "Redbee USB stick",
|
||||
std_layout(REDBEE_USB)
|
||||
},
|
||||
{ .name = "flexibity",
|
||||
.desc = "Flexibity USB Interface",
|
||||
std_layout(FLEXIBITY_USB)
|
||||
},
|
||||
{ .name = NULL, /* end of table */ },
|
||||
};
|
||||
|
||||
|
|
|
|||
325
cpu/mc1322x/tools/mc1322x-load.c
Normal file
325
cpu/mc1322x/tools/mc1322x-load.c
Normal file
|
|
@ -0,0 +1,325 @@
|
|||
/*
|
||||
* Copyright (c) 2012, Maxim Osipov <maxim.osipov@gmail.com>
|
||||
* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
|
||||
* to the MC1322x project (http://mc1322x.devl.org)
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the Institute nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <sys/types.h>
|
||||
#include <sys/stat.h>
|
||||
#include <unistd.h>
|
||||
#include <termios.h>
|
||||
#include <fcntl.h>
|
||||
#include <string.h>
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
char* filename;
|
||||
char* second;
|
||||
char* term = "/dev/ttyUSB0";
|
||||
int baud = B115200;
|
||||
int verbose = 0;
|
||||
char* rts = "rts";
|
||||
char* command;
|
||||
int first_delay = 50;
|
||||
int second_delay = 100;
|
||||
int do_exit = 0;
|
||||
int zerolen = 0;
|
||||
char *args = NULL;
|
||||
|
||||
struct stat sbuf;
|
||||
struct termios options;
|
||||
char buf[256];
|
||||
int pfd;
|
||||
int ffd;
|
||||
int sfd;
|
||||
|
||||
void help(void);
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
int c = 0;
|
||||
int r = 0;
|
||||
int i = 0;
|
||||
uint32_t s = 0;
|
||||
opterr = 0;
|
||||
|
||||
/* Parse options */
|
||||
while ((c = getopt(argc, argv, "f:s:zt:vu:r:c:a:b:eh")) != -1) {
|
||||
switch (c)
|
||||
{
|
||||
case 'f':
|
||||
filename = optarg;
|
||||
break;
|
||||
case 's':
|
||||
second = optarg;
|
||||
break;
|
||||
case 'z':
|
||||
zerolen = 1;
|
||||
break;
|
||||
case 't':
|
||||
term = optarg;
|
||||
break;
|
||||
case 'v':
|
||||
verbose = 1;
|
||||
break;
|
||||
case 'u':
|
||||
if (strcmp(optarg, "115200")) {
|
||||
baud = B115200;
|
||||
} else if (strcmp(optarg, "57600")) {
|
||||
baud = B115200;
|
||||
} else if (strcmp(optarg, "19200")) {
|
||||
baud = B19200;
|
||||
} else if (strcmp(optarg, "9600")) {
|
||||
baud = B9600;
|
||||
} else {
|
||||
printf("Unknown baud rate %s!\n", optarg);
|
||||
return -1;
|
||||
}
|
||||
break;
|
||||
case 'r':
|
||||
rts = optarg;
|
||||
break;
|
||||
case 'c':
|
||||
command = optarg;
|
||||
break;
|
||||
case 'a':
|
||||
first_delay = atoi(optarg);
|
||||
break;
|
||||
case 'b':
|
||||
second_delay = atoi(optarg);
|
||||
break;
|
||||
case 'e':
|
||||
do_exit = 1;
|
||||
break;
|
||||
case 'h':
|
||||
case '?':
|
||||
help();
|
||||
return 0;
|
||||
default:
|
||||
abort();
|
||||
}
|
||||
}
|
||||
/* Get other arguments */
|
||||
if (optind < argc)
|
||||
args = argv[optind];
|
||||
|
||||
/* Print settings */
|
||||
if (verbose) {
|
||||
printf("Primary file (RAM): %s\n", filename);
|
||||
printf("Secondary file (Flash): %s\n", second);
|
||||
printf("Zero secondary file: %s\n", zerolen == 1 ? "Yes" : "No");
|
||||
printf("Port: %s\n", term);
|
||||
printf("Baud rate: %i\n", baud);
|
||||
printf("Flow control: %s\n", rts);
|
||||
printf("Reset command: %s\n", command);
|
||||
printf("Exit after load: %s\n", do_exit == 1 ? "Yes" : "No");
|
||||
printf("Delay 1: %i\n", first_delay);
|
||||
printf("Delay 2: %i\n", second_delay);
|
||||
}
|
||||
|
||||
/* Open and configure serial port */
|
||||
pfd = open(term, O_RDWR | O_NOCTTY | O_NDELAY);
|
||||
if (pfd == -1) {
|
||||
printf("Cannot open serial port %s!\n", term);
|
||||
return -1;
|
||||
}
|
||||
fcntl(pfd, F_SETFL, FNDELAY);
|
||||
tcgetattr(pfd, &options);
|
||||
cfsetispeed(&options, baud);
|
||||
options.c_cflag |= (CLOCAL | CREAD);
|
||||
options.c_cflag &= ~PARENB;
|
||||
options.c_cflag &= ~CSTOPB;
|
||||
options.c_cflag &= ~CSIZE;
|
||||
options.c_cflag |= CS8;
|
||||
if (strcmp(rts, "rts")) {
|
||||
options.c_cflag &= ~CRTSCTS;
|
||||
} else {
|
||||
options.c_cflag |= CRTSCTS;
|
||||
}
|
||||
options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG);
|
||||
options.c_oflag &= ~OPOST;
|
||||
tcsetattr(pfd, TCSANOW, &options);
|
||||
|
||||
/* Reset the board if we can */
|
||||
printf("Reset the board to enter bootloader (waiting for CONNECT)...\n");
|
||||
if (command) {
|
||||
printf("Performing reset: %s\n", command);
|
||||
system(command);
|
||||
}
|
||||
|
||||
/* Primary bootloader wait loop */
|
||||
i = 0;
|
||||
while (1) {
|
||||
/* Wait for CONNECT */
|
||||
r = write(pfd, (const void*)"\0", 1);
|
||||
sleep(1);
|
||||
r = read(pfd, &buf[i], sizeof(buf)-1-i);
|
||||
if (r > 0) {
|
||||
buf[i+r] = '\0';
|
||||
printf("%s", &buf[i]); fflush(stdout);
|
||||
if (strstr(&buf[i], "CONNECT")) {
|
||||
printf("\n");
|
||||
break;
|
||||
}
|
||||
i += r;
|
||||
if (i >= sizeof(buf)-1) {
|
||||
i = 0;
|
||||
}
|
||||
} else {
|
||||
printf("."); fflush(stdout);
|
||||
}
|
||||
}
|
||||
|
||||
/* Send primary file */
|
||||
if (!filename) {
|
||||
printf("Please specify firmware file name (-f option)!\n");
|
||||
return -1;
|
||||
}
|
||||
if (stat(filename, &sbuf)) {
|
||||
printf("Cannot open firmware file %s!\n", filename);
|
||||
return -1;
|
||||
}
|
||||
ffd = open(filename, O_RDONLY);
|
||||
if (ffd == -1) {
|
||||
printf("Cannot open firmware file %s!\n", filename);
|
||||
return -1;
|
||||
}
|
||||
s = sbuf.st_size;
|
||||
printf("Sending %s (%i bytes)...\n", filename, s);
|
||||
r = write(pfd, (const void*)&s, 4);
|
||||
i = 0;
|
||||
r = read(ffd, buf, 1);
|
||||
while (r > 0) {
|
||||
do {
|
||||
usleep(first_delay);
|
||||
c = write(pfd, (const void*)buf, r);
|
||||
} while(c < r);
|
||||
i += r;
|
||||
printf("Written %i\r", i); fflush(stdout);
|
||||
r = read(ffd, buf, 1);
|
||||
}
|
||||
printf("\n");
|
||||
|
||||
/* Secondary loader wait loop */
|
||||
if (second || zerolen) {
|
||||
/* Wait for ready */
|
||||
printf("Sending secondary file (waiting for ready)...\n");
|
||||
i = 0;
|
||||
while (1) {
|
||||
sleep(1);
|
||||
r = read(pfd, &buf[i], sizeof(buf)-1-i);
|
||||
if (r > 0) {
|
||||
buf[i+r] = '\0';
|
||||
printf("%s", &buf[i]); fflush(stdout);
|
||||
if (strstr(buf, "ready")) {
|
||||
printf("\n");
|
||||
break;
|
||||
}
|
||||
i += r;
|
||||
if (i >= sizeof(buf)-1) {
|
||||
i = 0;
|
||||
}
|
||||
} else {
|
||||
printf("."); fflush(stdout);
|
||||
}
|
||||
}
|
||||
|
||||
/* Send secondary file */
|
||||
if (second) {
|
||||
if (stat(second, &sbuf)) {
|
||||
printf("Cannot open secondary file %s!\n", second);
|
||||
return -1;
|
||||
}
|
||||
sfd = open(second, O_RDONLY);
|
||||
if (sfd == -1) {
|
||||
printf("Cannot open secondary file %s!\n", second);
|
||||
return -1;
|
||||
}
|
||||
s = sbuf.st_size;
|
||||
printf("Sending %s (%i bytes)...\n", second, s);
|
||||
r = write(pfd, (const void*)&s, 4);
|
||||
i = 0;
|
||||
r = read(sfd, buf, 1);
|
||||
while (r > 0) {
|
||||
do {
|
||||
usleep(second_delay);
|
||||
c = write(pfd, (const void*)buf, r);
|
||||
} while(c < r);
|
||||
i += r;
|
||||
printf("Written %i\r", i); fflush(stdout);
|
||||
r = read(sfd, buf, 1);
|
||||
}
|
||||
printf("\n");
|
||||
} else if (zerolen) {
|
||||
s = 0;
|
||||
printf("Sending %i...\n", s);
|
||||
write(pfd, (const void*)&s, 4);
|
||||
}
|
||||
}
|
||||
|
||||
/* Send the remaining arguments */
|
||||
if (args) {
|
||||
printf("Sending %s\n", args);
|
||||
r = write(pfd, (const void*)args, strlen(args));
|
||||
r = write(pfd, (const void*)",", 1);
|
||||
}
|
||||
|
||||
/* Drop in echo mode */
|
||||
if (!do_exit) {
|
||||
while (1) {
|
||||
r = read(pfd, buf, sizeof(buf));
|
||||
if (r > 0) {
|
||||
buf[r] = '\0';
|
||||
printf("%s", buf); fflush(stdout);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void help(void)
|
||||
{
|
||||
printf("Example usage: mc1322x-load -f foo.bin -t /dev/ttyS0 -b 9600\n");
|
||||
printf(" or : mc1322x-load -f flasher.bin -s flashme.bin 0x1e000,0x11223344,0x55667788\n");
|
||||
printf(" or : mc1322x-load -f flasher.bin -z 0x1e000,0x11223344,0x55667788\n");
|
||||
printf(" -f required: binary file to load\n");
|
||||
printf(" -s optional: secondary binary file to send\n");
|
||||
printf(" -z optional: send a zero length file as secondary\n");
|
||||
printf(" -t, terminal default: /dev/ttyUSB0\n");
|
||||
printf(" -u, baud rate default: 115200\n");
|
||||
printf(" -r [none|rts] flow control default: rts\n");
|
||||
printf(" -c command to run for autoreset: \n");
|
||||
printf(" e.g. -c 'bbmc -l redbee-econotag -i 0 reset'\n");
|
||||
printf(" -e exit instead of dropping to terminal display\n");
|
||||
printf(" -a first intercharacter delay, passed to usleep\n");
|
||||
printf(" -b second intercharacter delay, passed to usleep\n");
|
||||
printf("\n");
|
||||
printf("Anything on the command line is sent after all of the files.\n\n");
|
||||
}
|
||||
119
cpu/mc1322x/tools/rftestrx2pcap.py
Executable file
119
cpu/mc1322x/tools/rftestrx2pcap.py
Executable file
|
|
@ -0,0 +1,119 @@
|
|||
#!/usr/bin/python
|
||||
# (C) 2012, Mariano Alvira <mar@devl.org>
|
||||
|
||||
import sys,os,time
|
||||
from struct import *
|
||||
import re
|
||||
import serial
|
||||
|
||||
if len(sys.argv) < 3:
|
||||
sys.stderr.write( "Usage: %s tty channel [outfile]\n" %(sys.argv[0]))
|
||||
sys.stderr.write( " channel = 11-26\n")
|
||||
sys.exit(2)
|
||||
|
||||
# change the channel
|
||||
# rftest-rx increments it's channel everytime you send a character and returns "channel: num"
|
||||
# send a character until we get to the right channel
|
||||
|
||||
try:
|
||||
serport = serial.Serial(sys.argv[1], 115200, timeout=1)
|
||||
except IOError:
|
||||
print "error opening port"
|
||||
sys.exit(2)
|
||||
|
||||
chan = ''
|
||||
while chan != int(sys.argv[2]) - 11:
|
||||
serport.write(' ')
|
||||
chanstr = ''
|
||||
while 1:
|
||||
chanstr += serport.read(1)
|
||||
m = re.match(".*channel: (\w+)\s+", chanstr)
|
||||
if m is not None:
|
||||
chan = int(m.group(1))
|
||||
break
|
||||
|
||||
try:
|
||||
sys.stderr.write('writing to file %s \n' % (sys.argv[3]))
|
||||
outfile = open(sys.argv[3], 'w+b')
|
||||
except IndexError:
|
||||
outfile = sys.stdout
|
||||
|
||||
sys.stderr.write("RX: 0\r")
|
||||
|
||||
### PCAP setup
|
||||
MAGIC = 0xa1b2c3d4;
|
||||
MAJOR = 2;
|
||||
MINOR = 4;
|
||||
ZONE = 0;
|
||||
SIG = 0;
|
||||
SNAPLEN = 0xffff;
|
||||
NETWORK = 230; # 802.15.4 no FCS
|
||||
|
||||
# output overall PCAP header
|
||||
outfile.write(pack('<LHHLLLL', MAGIC, MAJOR, MINOR, ZONE, SIG, SNAPLEN, NETWORK))
|
||||
|
||||
count = 0
|
||||
fileempty = 1
|
||||
newpacket = 0
|
||||
|
||||
try:
|
||||
while 1:
|
||||
line = serport.readline().rstrip()
|
||||
|
||||
m_rftestline = re.match(".*rftest-rx --- len 0x(\w\w).*", line)
|
||||
|
||||
if m_rftestline is not None:
|
||||
newpacket = 1
|
||||
t = time.time()
|
||||
sec = int(t)
|
||||
usec = (t - sec) * 100000
|
||||
length = int(m_rftestline.group(1), 16)
|
||||
# sys.stderr.write(line + "\n")
|
||||
# sys.stderr.write("rftestline: %d %d %d\n" % (sec, usec, length))
|
||||
continue
|
||||
|
||||
# if this is a new packet, add a packet header
|
||||
if newpacket == 1:
|
||||
newpacket = 0
|
||||
outfile.write(pack('<LLLL',sec,usec,length,length))
|
||||
|
||||
count += 1
|
||||
sys.stderr.write("RX: %d\r" % count)
|
||||
|
||||
# clear file empty flag
|
||||
if fileempty:
|
||||
fileempty = 0
|
||||
if fileempty == 0 :
|
||||
# write payload
|
||||
for d in line.split(' '):
|
||||
# do a match because their might be a \r floating around
|
||||
m = re.match('.*(\w\w).*', d)
|
||||
if m is not None:
|
||||
outfile.write(pack('<B', int(m.group(1),16)))
|
||||
|
||||
|
||||
# cn.recv_block()
|
||||
# if cn.data != None:
|
||||
|
||||
# # sys.stderr.write(cn.data)
|
||||
# # sys.stderr.write(cn.data)
|
||||
# # sys.stderr.write(str(time.time()))
|
||||
|
||||
# t = time.time()
|
||||
# sec = int(t)
|
||||
# usec = (t - sec) * 100000
|
||||
|
||||
# # sys.stderr.write("new packet: %d %d %d" % (sec, usec, len(cn.data)))
|
||||
|
||||
# count += 1
|
||||
# sys.stderr.write("\x1b[G") # Move the cursor up one
|
||||
# sys.stderr.write("RX: %d" % count)
|
||||
|
||||
# sys.stdout.write(pack('<LLLL',sec,usec,len(cn.data),len(cn.data)))
|
||||
# sys.stdout.write(cn.data)
|
||||
|
||||
except KeyboardInterrupt:
|
||||
# cn.close()
|
||||
sys.exit(2)
|
||||
|
||||
|
||||
|
|
@ -81,7 +81,7 @@
|
|||
#define SAMP UCON_SAMP_8X
|
||||
//#define SAMP UCON_SAMP_16X
|
||||
|
||||
#define uart_init uart1_init
|
||||
//#define uart_init uart1_init
|
||||
#define dbg_putchar(x) uart1_putc(x)
|
||||
|
||||
#define USE_FORMATTED_STDIO 1
|
||||
|
|
|
|||
|
|
@ -199,7 +199,7 @@ init_lowlevel(void)
|
|||
trim_xtal();
|
||||
|
||||
/* uart init */
|
||||
uart_init(BRINC, BRMOD, SAMP);
|
||||
uart_init(UART1, 115200);
|
||||
|
||||
default_vreg_init();
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue