From 166fa97ef6348b1a09865e776eceb5935efa0b30 Mon Sep 17 00:00:00 2001 From: Jim Paris Date: Wed, 31 Aug 2011 22:25:54 -0400 Subject: [PATCH 01/25] Fix ordering of UART bitfields --- lib/include/uart.h | 56 +++++++++++++++++++++++----------------------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/lib/include/uart.h b/lib/include/uart.h index ad738649f..30109c495 100644 --- a/lib/include/uart.h +++ b/lib/include/uart.h @@ -46,71 +46,71 @@ struct UART_struct { union { uint32_t CON; struct UART_CON { - uint32_t :16; - uint32_t TST:1; - uint32_t MRXR:1; - uint32_t MTXR:1; - uint32_t FCE:1; - uint32_t FCP:1; - uint32_t XTIM:1; - uint32_t :2; - uint32_t TXOENB:1; - uint32_t CONTX:1; - uint32_t SB:1; - uint32_t ST2:1; - uint32_t EP:1; - uint32_t PEN:1; - uint32_t RXE:1; uint32_t TXE:1; + uint32_t RXE:1; + uint32_t PEN:1; + uint32_t EP:1; + uint32_t ST2:1; + uint32_t SB:1; + uint32_t CONTX:1; + uint32_t TXOENB:1; + uint32_t :2; + uint32_t XTIM:1; + uint32_t FCP:1; + uint32_t FCE:1; + uint32_t MTXR:1; + uint32_t MRXR:1; + uint32_t TST:1; + uint32_t :16; } CONbits; }; union { uint32_t STAT; struct UART_STAT { - uint32_t :24; - uint32_t TXRDY:1; - uint32_t RXRDY:1; - uint32_t RUE:1; - uint32_t ROE:1; - uint32_t TOE:1; - uint32_t FE:1; - uint32_t PE:1; uint32_t SE:1; + uint32_t PE:1; + uint32_t FE:1; + uint32_t TOE:1; + uint32_t ROE:1; + uint32_t RUE:1; + uint32_t RXRDY:1; + uint32_t TXRDY:1; + uint32_t :24; } USTATbits; }; union { uint32_t DATA; struct UART_DATA { - uint32_t :24; uint32_t DATA:8; + uint32_t :24; } DATAbits; }; union { uint32_t RXCON; struct UART_URXCON { - uint32_t :26; uint32_t LVL:6; + uint32_t :26; } RXCONbits; }; union { uint32_t TXCON; struct UART_TXCON { - uint32_t :26; uint32_t LVL:6; + uint32_t :26; } TXCONbits; }; union { uint32_t CTS; struct UART_CTS { - uint32_t :27; uint32_t LVL:5; + uint32_t :27; } CTSbits; }; union { uint32_t BR; struct UART_BR { - uint32_t INC:16; uint32_t MOD:16; + uint32_t INC:16; } BRbits; }; }; From 9e1612da258f653655300b729f7d811714d89917 Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Fri, 2 Sep 2011 14:08:24 -0400 Subject: [PATCH 02/25] fix typos in uart2 where uart1 was accidentally used. --- lib/uart2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/uart2.c b/lib/uart2.c index 3b9f310f0..96ea8d30f 100644 --- a/lib/uart2.c +++ b/lib/uart2.c @@ -40,7 +40,7 @@ volatile char u2_tx_buf[64]; volatile uint32_t u2_head, u2_tail; void uart2_isr(void) { - while( *UART1_UTXCON != 0 ) { + while( *UART2_UTXCON != 0 ) { if (u2_head == u2_tail) { disable_irq(UART2); return; @@ -68,7 +68,7 @@ void uart2_putc(char c) { if (u2_head == u2_tail) { /* drop chars when no room */ if (u2_head) { u2_head -=1; } else { u2_head = sizeof(u2_tx_buf); } } - enable_irq(UART1); + enable_irq(UART2); } } From 25440562e302292a1f26b5a2ec88ceaad8d8bfa9 Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Wed, 28 Sep 2011 16:25:43 -0400 Subject: [PATCH 03/25] include pwm.h in mc1322x.h --- lib/include/mc1322x.h | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/include/mc1322x.h b/lib/include/mc1322x.h index 1f82701aa..d50cba2e3 100644 --- a/lib/include/mc1322x.h +++ b/lib/include/mc1322x.h @@ -50,5 +50,6 @@ #include "i2c.h" #include "rtc.h" #include "adc.h" +#include "pwm.h" #endif From 542bd8010cbc8d17198b6da4448e83937b40c6c5 Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Wed, 26 Oct 2011 14:45:42 -0400 Subject: [PATCH 04/25] use LDLIBS instead of LDFLAGS for -lftdi --- tools/ftditools/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/ftditools/Makefile b/tools/ftditools/Makefile index 20e8a64e7..521d7d14f 100644 --- a/tools/ftditools/Makefile +++ b/tools/ftditools/Makefile @@ -2,7 +2,7 @@ INSTALL= /usr/local/bin ################ -LDFLAGS = -lftdi +LDLIBS = -lftdi TARGETS = bbmc From 3a21eb18fe277a9bcf1a1f7e107cfbd7fe580880 Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Sat, 19 Nov 2011 17:05:40 -0500 Subject: [PATCH 05/25] add power, rssi, and lqi meausurement for two modules cabled together. --- doc/pow-rssi-lqi.gnumeric | Bin 0 -> 3250 bytes 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 doc/pow-rssi-lqi.gnumeric diff --git a/doc/pow-rssi-lqi.gnumeric b/doc/pow-rssi-lqi.gnumeric new file mode 100644 index 0000000000000000000000000000000000000000..6d7a0200e5566c93269797c117b2cae080daee3c GIT binary patch literal 3250 zcmV;j3{CSNiwFPnV-fNjlTKw=$m)*XgU0a(8nnuj|Q+r@eqcN%mrhsVXO80{M?*J>m{PtZxT9h zJ=s<>V1b#?ZeqMc``i{(j%C@cUvIAO{RLWj4IIVHi+luJF&@TZ@S6A@6S^sv8ZHOvC zh~vqMf*XB?g1y>Z9ADpSsaF^h<@AosX4psI5g$r8VvQwYUeYAw)RDQS(U5pCj)eyC zkoiNhLQ%>x%u^3V$4Z(^h@;1rvZ?yKpI|N+> zd=8E|kGyG!t{9?8Ul$E}lMTeYQ3G8zFeV{fMLaXCCTtkcxkKWyJ1@YSBhyK4&+r^G z;C0)%R(`)gh<$)~T}1)f*i0OGLmobZh*A1ID)_%kG=TdxYl;2HN(lqPlTWP2&v5tI*qC5V{1f z#=?v5ae#hDlw>!T6bIQ281x=_0ixLm*pwSdBz{~oC<+vd7$i6M+vOD8ae_kfTrqwp z^@i~W9OEetG20%Qmmh8>_wUco$CHPv`>T_y>#Ol^^78uJG`MP@5#M*MA^bIWnu_pZ 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[PATCH 06/25] add the external flash interface to nvm-read and write --- tests/config.h | 4 ++++ tests/nvm-read.c | 32 +++++++++++++++------------ tests/nvm-write.c | 55 +++++++++++++++++++++++------------------------ 3 files changed, 49 insertions(+), 42 deletions(-) diff --git a/tests/config.h b/tests/config.h index 4d776b629..3124a9b57 100644 --- a/tests/config.h +++ b/tests/config.h @@ -49,6 +49,10 @@ /* use uart1 for console */ #define uart_init uart1_init +/* nvm interface */ +#define NVM_INTERFACE gNvmInternalInterface_c +/*#define NVM_INTERFACE gNvmExternalInterface_c */ + /* nvm-read */ #define READ_ADDR 0x1f000 #define READ_NBYTES 1024 diff --git a/tests/nvm-read.c b/tests/nvm-read.c index 6d8760ee8..4e6438cd9 100644 --- a/tests/nvm-read.c +++ b/tests/nvm-read.c @@ -35,6 +35,7 @@ #include #include +#include #include "tests.h" #include "config.h" @@ -51,27 +52,30 @@ void main(void) { vreg_init(); - putstr("Detecting internal nvm\n\r"); + if(NVM_INTERFACE == gNvmInternalInterface_c) + { + printf("Detecting internal nvm\n\r"); + } else { + printf("Setting up gpio\r\n"); + /* set SPI func */ + GPIO->FUNC_SEL.GPIO_04 = 1; + GPIO->FUNC_SEL.GPIO_05 = 1; + GPIO->FUNC_SEL.GPIO_06 = 1; + GPIO->FUNC_SEL.GPIO_07 = 1; + printf("Detecting external nvm\n\r"); + } - err = nvm_detect(gNvmInternalInterface_c, &type); + err = nvm_detect(NVM_INTERFACE, &type); - putstr("nvm_detect returned: 0x"); - put_hex(err); - putstr(" type is: 0x"); - put_hex32(type); - putstr("\n\r"); + printf("nvm_detect returned: 0x%02x type is: 0x%08x\r\n", err, (unsigned int)type); nvm_setsvar(0); - err = nvm_read(gNvmInternalInterface_c, type, (uint8_t *)buf, READ_ADDR, READ_NBYTES); - putstr("nvm_read returned: 0x"); - put_hex(err); - putstr("\n\r"); + err = nvm_read(NVM_INTERFACE, type, (uint8_t *)buf, READ_ADDR, READ_NBYTES); + printf("nvm_read returned: 0x%02x\r\n", err); for(i=0; i #include +#include #include "tests.h" #include "config.h" @@ -51,46 +52,44 @@ void main(void) { vreg_init(); - putstr("Detecting internal nvm\n\r"); + if(NVM_INTERFACE == gNvmInternalInterface_c) + { + printf("Detecting internal nvm\n\r"); + } else { + printf("Setting up gpio\r\n"); + /* set SPI func */ + GPIO->FUNC_SEL.GPIO_04 = 1; + GPIO->FUNC_SEL.GPIO_05 = 1; + GPIO->FUNC_SEL.GPIO_06 = 1; + GPIO->FUNC_SEL.GPIO_07 = 1; + printf("Detecting external nvm\n\r"); + } - err = nvm_detect(gNvmInternalInterface_c, &type); + err = nvm_detect(NVM_INTERFACE, &type); - putstr("nvm_detect returned: 0x"); - put_hex(err); - putstr(" type is: 0x"); - put_hex32(type); - putstr("\n\r"); - + printf("nvm_detect returned: 0x%02x type is: 0x%08x\r\n", err, (unsigned int)type); buf[0] = WRITEVAL0; buf[1] = WRITEVAL1; - err = nvm_erase(gNvmInternalInterface_c, type, 0x40000000); /* erase sector 30 --- sector 31 is the 'secret zone' */ - putstr("nvm_erase returned: 0x"); - put_hex(err); - putstr("\n\r"); + err = nvm_erase(NVM_INTERFACE, type, 1 << WRITE_ADDR/4096); + printf("nvm_erase returned: 0x%02x\r\n", err); - err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *)buf, WRITE_ADDR, WRITE_NBYTES); - putstr("nvm_write returned: 0x"); - put_hex(err); - putstr("\n\r"); - putstr("writing\n\r"); + err = nvm_write(NVM_INTERFACE, type, (uint8_t *)buf, WRITE_ADDR, WRITE_NBYTES); + printf("nvm_write returned: 0x%02x\r\n", err); + + printf("writing\n\r"); for(i=0; i Date: Sat, 4 Feb 2012 15:55:41 -0500 Subject: [PATCH 07/25] fix typo in adc.h --- lib/include/adc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/include/adc.h b/lib/include/adc.h index 580e3545e..66dfa1f8a 100644 --- a/lib/include/adc.h +++ b/lib/include/adc.h @@ -98,7 +98,7 @@ struct ADC_struct { uint16_t TIMER1_ON:1; uint16_t TIMER2_ON:1; uint16_t SOFT_RESET:1; - uint16_t AD1_FREFHL_EN:1; + uint16_t AD1_VREFHL_EN:1; uint16_t AD2_VREFHL_EN:1; uint16_t :6; uint16_t COMPARE_IRQ_MASK:1; From 5ad915b57ff15bf43105f213d2f21a7f900fe740 Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Fri, 6 Apr 2012 17:23:56 -0400 Subject: [PATCH 08/25] new rftest2pcap script written in python can set the channel and prints a running total of packets to stderr --- tools/rftestrx2pcap.py | 132 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 132 insertions(+) create mode 100755 tools/rftestrx2pcap.py diff --git a/tools/rftestrx2pcap.py b/tools/rftestrx2pcap.py new file mode 100755 index 000000000..88ca5d686 --- /dev/null +++ b/tools/rftestrx2pcap.py @@ -0,0 +1,132 @@ +#!/usr/bin/python +# (C) 2012, Mariano Alvira + +import sys,os,time +from termios import * +from struct import * +import re + +if len(sys.argv) < 3: + sys.stderr.write( "Usage: %s tty channel\n" %(sys.argv[0])) + sys.stderr.write( " channel = 11-26\n") + sys.exit(2) + +# change the channel +# rftest-rx increments it's channel everytime you send a character and returns "channel: num" +# send a character until we get to the right channel + +try: + serport = os.open(sys.argv[1], os.O_RDWR|os.O_NOCTTY) +except IOError: + print "error opening port" + sys.exit(2) + +try: + oldattrs = tcgetattr(serport) + attrs = [IGNPAR, oldattrs[1], 0, 0, B115200, B115200, oldattrs[6]] + attrs[2] = B115200 | CS8 | CLOCAL | CREAD + attrs[6][VTIME] = 0 + attrs[6][VMIN] = 1 + tcflush(serport, TCIFLUSH) + tcsetattr(serport, TCSANOW, attrs) +except IOError: + print "IOError in termios" + sys.exit(2) + +chan = '' +while chan != int(sys.argv[2]) - 11: + os.write(serport, ' ') + chanstr = '' + while 1: + chanstr += os.read(serport, 1) + m = re.match(".*channel: (\w+)\s+", chanstr) + if m != None: + chan = int(m.group(1)) + break + +os.close(serport) + +try: + serport = open(sys.argv[1], 'r+') +except IOError: + print "error opening port" + sys.exit(2) + + +### PCAP setup +MAGIC = 0xa1b2c3d4; +MAJOR = 2; +MINOR = 4; +ZONE = 0; +SIG = 0; +SNAPLEN = 0xffff; +NETWORK = 230; # 802.15.4 no FCS + +# output overall PCAP header +sys.stdout.write(pack(' Date: Mon, 9 Apr 2012 10:24:43 -0400 Subject: [PATCH 09/25] print RX: 0 when channel selection finishes test that all matches are made before using them. --- tools/rftestrx2pcap.py | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/tools/rftestrx2pcap.py b/tools/rftestrx2pcap.py index 88ca5d686..83929b3db 100755 --- a/tools/rftestrx2pcap.py +++ b/tools/rftestrx2pcap.py @@ -40,12 +40,14 @@ while chan != int(sys.argv[2]) - 11: while 1: chanstr += os.read(serport, 1) m = re.match(".*channel: (\w+)\s+", chanstr) - if m != None: + if m is not None: chan = int(m.group(1)) break os.close(serport) +sys.stderr.write("RX: 0") + try: serport = open(sys.argv[1], 'r+') except IOError: @@ -75,7 +77,7 @@ try: m_rftestline = re.match(".*rftest-rx --- len 0x(\w\w).*", line) - if m_rftestline != None: + if m_rftestline is not None: newpacket = 1 t = time.time() sec = int(t) @@ -102,7 +104,8 @@ try: for d in line.split(' '): # do a match because their might be a \r floating around m = re.match('.*(\w\w).*', d) - sys.stdout.write(pack(' Date: Thu, 12 Apr 2012 13:10:02 -0400 Subject: [PATCH 10/25] update rftestrx2pcap.py to use pyserial. add a third output file argument --- tools/rftestrx2pcap.py | 44 ++++++++++++++---------------------------- 1 file changed, 14 insertions(+), 30 deletions(-) diff --git a/tools/rftestrx2pcap.py b/tools/rftestrx2pcap.py index 83929b3db..7199cad69 100755 --- a/tools/rftestrx2pcap.py +++ b/tools/rftestrx2pcap.py @@ -2,12 +2,12 @@ # (C) 2012, Mariano Alvira import sys,os,time -from termios import * from struct import * import re +import serial if len(sys.argv) < 3: - sys.stderr.write( "Usage: %s tty channel\n" %(sys.argv[0])) + sys.stderr.write( "Usage: %s tty channel [outfile]\n" %(sys.argv[0])) sys.stderr.write( " channel = 11-26\n") sys.exit(2) @@ -16,44 +16,29 @@ if len(sys.argv) < 3: # send a character until we get to the right channel try: - serport = os.open(sys.argv[1], os.O_RDWR|os.O_NOCTTY) + serport = serial.Serial(sys.argv[1], 115200, timeout=1) except IOError: print "error opening port" sys.exit(2) -try: - oldattrs = tcgetattr(serport) - attrs = [IGNPAR, oldattrs[1], 0, 0, B115200, B115200, oldattrs[6]] - attrs[2] = B115200 | CS8 | CLOCAL | CREAD - attrs[6][VTIME] = 0 - attrs[6][VMIN] = 1 - tcflush(serport, TCIFLUSH) - tcsetattr(serport, TCSANOW, attrs) -except IOError: - print "IOError in termios" - sys.exit(2) - chan = '' while chan != int(sys.argv[2]) - 11: - os.write(serport, ' ') + serport.write(' ') chanstr = '' while 1: - chanstr += os.read(serport, 1) + chanstr += serport.read(1) m = re.match(".*channel: (\w+)\s+", chanstr) if m is not None: chan = int(m.group(1)) break -os.close(serport) - -sys.stderr.write("RX: 0") - try: - serport = open(sys.argv[1], 'r+') -except IOError: - print "error opening port" - sys.exit(2) + sys.stderr.write('writing to file %s \n' % (sys.argv[3])) + outfile = open(sys.argv[3], 'w+b') +except IndexError: + outfile = sys.stdout +sys.stderr.write("RX: 0\r") ### PCAP setup MAGIC = 0xa1b2c3d4; @@ -65,7 +50,7 @@ SNAPLEN = 0xffff; NETWORK = 230; # 802.15.4 no FCS # output overall PCAP header -sys.stdout.write(pack(' Date: Wed, 9 May 2012 15:44:00 +0200 Subject: [PATCH 11/25] Reactivate flash protection after maca init --- lib/maca.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/maca.c b/lib/maca.c index 828c0f81e..a1b744bc1 100644 --- a/lib/maca.c +++ b/lib/maca.c @@ -1173,11 +1173,11 @@ uint32_t init_from_flash(uint32_t addr) { err = nvm_read(gNvmInternalInterface_c, type, (uint8_t *)buf, addr+i, 32); i += 4*exec_init_entry(buf, ram_values); } - return i; } else { - return 0; + i = 0; } - + nvm_setsvar(1); + return i; } /* From 6c5ab6f155eafb33008b73ec272ee5901707053b Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Thu, 14 Jun 2012 21:36:57 -0400 Subject: [PATCH 12/25] fix typo --- board/freescale-ncb.h | 2 +- board/quahogcon.h | 2 +- board/redbee-dev.h | 2 +- board/redbee-econotag.h | 2 +- board/redbee-r1.h | 2 +- board/redbee-usb.h | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/board/freescale-ncb.h b/board/freescale-ncb.h index 5de8c8ef1..3b038ee59 100644 --- a/board/freescale-ncb.h +++ b/board/freescale-ncb.h @@ -46,7 +46,7 @@ /* XTAL TUNE parameters */ /* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */ -/* for details about how to make this measurment */ +/* for details about how to make this measurement */ /* Coarse tune: add 4pf */ #define CTUNE_4PF 1 diff --git a/board/quahogcon.h b/board/quahogcon.h index 182e22c06..647b17644 100644 --- a/board/quahogcon.h +++ b/board/quahogcon.h @@ -65,7 +65,7 @@ /* XTAL TUNE parameters */ /* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */ -/* for details about how to make this measurment */ +/* for details about how to make this measurement */ /* Econotag also needs an addtional 12pf on board */ /* Coarse tune: add 4pf */ diff --git a/board/redbee-dev.h b/board/redbee-dev.h index d961ac081..62dd3c016 100644 --- a/board/redbee-dev.h +++ b/board/redbee-dev.h @@ -46,7 +46,7 @@ /* XTAL TUNE parameters */ /* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */ -/* for details about how to make this measurment */ +/* for details about how to make this measurement */ /* Coarse tune: add 4pf */ #define CTUNE_4PF 1 diff --git a/board/redbee-econotag.h b/board/redbee-econotag.h index 8a870a202..0112f55e9 100644 --- a/board/redbee-econotag.h +++ b/board/redbee-econotag.h @@ -46,7 +46,7 @@ /* XTAL TUNE parameters */ /* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */ -/* for details about how to make this measurment */ +/* for details about how to make this measurement */ /* Econotag also needs an addtional 12pf on board */ /* Coarse tune: add 4pf */ diff --git a/board/redbee-r1.h b/board/redbee-r1.h index 0bc6ef0c9..66f95a118 100644 --- a/board/redbee-r1.h +++ b/board/redbee-r1.h @@ -46,7 +46,7 @@ /* XTAL TUNE parameters */ /* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */ -/* for details about how to make this measurment */ +/* for details about how to make this measurement */ /* Coarse tune: add 4pf */ #define CTUNE_4PF 1 diff --git a/board/redbee-usb.h b/board/redbee-usb.h index 88ee4e8cf..d3deabc5d 100644 --- a/board/redbee-usb.h +++ b/board/redbee-usb.h @@ -46,7 +46,7 @@ /* XTAL TUNE parameters */ /* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */ -/* for details about how to make this measurment */ +/* for details about how to make this measurement */ /* Coarse tune: add 4pf */ #define CTUNE_4PF 1 From 3cea9b567f38549d5b1b938ae019c6cde1e7e92d Mon Sep 17 00:00:00 2001 From: josh gordonson Date: Fri, 5 Oct 2012 12:42:04 -0400 Subject: [PATCH 13/25] made macros for each gpio pin --- lib/include/gpio.h | 69 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/lib/include/gpio.h b/lib/include/gpio.h index 58b868946..b0f509cf2 100644 --- a/lib/include/gpio.h +++ b/lib/include/gpio.h @@ -51,6 +51,75 @@ gpio_reset(GPIO_08); */ +// GPIO to Function Alias macros: + +#define ADC0 GPIO_30 +#define ADC1 GPIO_31 +#define ADC2 GPIO_32 +#define ADC3 GPIO_33 +#define ADC4 GPIO_34 +#define ADC5 GPIO_35 +#define ADC6 GPIO_36 +#define ADC7 GPIO_37 +#define TDO GPIO_49 +#define TDI GPIO_48 +#define TCK GPIO_47 +#define TMS GPIO_46 +#define U2RTS GPIO_21 +#define U2CTS GPIO_20 +#define U2RX GPIO_19 +#define U2TX GPIO_18 +#define U1RTS GPIO_17 +#define U1CTS GPIO_16 +#define U1RX GPIO_15 +#define U1TX GPIO_14 +#define SDA GPIO_13 +#define SCL GPIO_12 +#define TMR3 GPIO_11 +#define TMR2 GPIO_10 +#define TMR1 GPIO_09 +#define TMR0 GPIO_08 +#define SCK GPIO_07 +#define MOSI GPIO_06 +#define MISO GPIO_05 +#define SS GPIO_04 +#define BTCK GPIO_03 +#define FSYN GPIO_02 +#define SSIRX GPIO_01 +#define SSITX GPIO_00 +#define KBI7 GPIO_29 +#define KBI6 GPIO_28 +#define KBI5 GPIO_27 +#define KBI4 GPIO_26 +#define KBI3 GPIO_25 +#define KBI2 GPIO_24 +#define KBI1 GPIO_23 +#define KBI0 GPIO_22 +#define TXON GPIO_44 +#define RXON GPIO_45 +#define ANT1 GPIO_42 +#define ANT2 GPIO_43 +#define VREF2H GPIO_38 +#define VREF2L GPIO_39 +#define VREF1H GPIO_40 +#define VREF1L GPIO_41 +#define MDO0 GPIO_51 +#define MDO1 GPIO_52 +#define MDO2 GPIO_53 +#define MDO3 GPIO_54 +#define MDO4 GPIO_55 +#define MDO5 GPIO_56 +#define MDO6 GPIO_57 +#define MDO7 GPIO_58 +#define MSEO0 GPIO_59 +#define MSEO1 GPIO_60 +#define RDY GPIO_61 +#define EVTO GPIO_62 +#define MCKO GPIO_50 +#define EVTI GPIO_63 + + + #define _V(x,n,i) uint32_t x##_##i : n; #define _REP(x,n) \ _V(x,n,00) _V(x,n,01) _V(x,n,02) _V(x,n,03) _V(x,n,04) _V(x,n,05) _V(x,n,06) _V(x,n,07) \ From d1a0ab09739c9d3ac047c824c3db8b16dce281b6 Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Thu, 11 Oct 2012 23:14:14 -0400 Subject: [PATCH 14/25] Add C version of mc1322x-load courtesy of Maxim Osipov --- tools/mc1322x-load.c | 312 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 312 insertions(+) create mode 100644 tools/mc1322x-load.c diff --git a/tools/mc1322x-load.c b/tools/mc1322x-load.c new file mode 100644 index 000000000..59620e7d2 --- /dev/null +++ b/tools/mc1322x-load.c @@ -0,0 +1,312 @@ +/* + * Copyright (c) 2012, Maxim Osipov + * Copyright (c) 2010, Mariano Alvira and other contributors + * to the MC1322x project (http://mc1322x.devl.org) + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +char* filename; +char* second; +char* term = "/dev/ttyUSB0"; +int baud = B115200; +int verbose = 0; +char* rts = "rts"; +char* command; +int first_delay = 50; +int second_delay = 100; +int do_exit = 0; +int zerolen = 0; + +struct stat sbuf; +struct termios options; +char buf[256]; +int pfd; +int ffd; +int sfd; + +void help(void); + +int main(int argc, char **argv) +{ + int c = 0; + int r = 0; + int i = 0; + uint32_t s = 0; + opterr = 0; + + /* Parse options */ + while ((c = getopt(argc, argv, "f:s:zt:vu:r:c:a:b:eh")) != -1) { + switch (c) + { + case 'f': + filename = optarg; + break; + case 's': + second = optarg; + break; + case 'z': + zerolen = 1; + break; + case 't': + term = optarg; + break; + case 'v': + verbose = 1; + break; + case 'u': + if (strcmp(optarg, "115200")) { + baud = B115200; + } else if (strcmp(optarg, "57600")) { + baud = B115200; + } else if (strcmp(optarg, "19200")) { + baud = B19200; + } else if (strcmp(optarg, "9600")) { + baud = B9600; + } else { + printf("Unknown baud rate %s!\n", optarg); + return -1; + } + break; + case 'r': + rts = optarg; + break; + case 'c': + command = optarg; + break; + case 'a': + first_delay = atoi(optarg); + break; + case 'b': + second_delay = atoi(optarg); + break; + case 'e': + do_exit = 1; + break; + case 'h': + case '?': + help(); + return 0; + default: + abort(); + } + } + + /* Print settings */ + if (verbose) { + printf("Primary file (RAM): %s\n", filename); + printf("Secondary file (Flash): %s\n", second); + printf("Zero secondary file: %s\n", zerolen == 1 ? "Yes" : "No"); + printf("Port: %s\n", term); + printf("Baud rate: %i\n", baud); + printf("Flow control: %s\n", rts); + printf("Reset command: %s\n", command); + printf("Exit after load: %s\n", do_exit == 1 ? "Yes" : "No"); + printf("Delay 1: %i\n", first_delay); + printf("Delay 2: %i\n", second_delay); + } + + /* Open and configure serial port */ + pfd = open(term, O_RDWR | O_NOCTTY | O_NDELAY); + if (pfd == -1) { + printf("Cannot open serial port %s!\n", term); + return -1; + } + fcntl(pfd, F_SETFL, FNDELAY); + tcgetattr(pfd, &options); + cfsetispeed(&options, baud); + options.c_cflag |= (CLOCAL | CREAD); + options.c_cflag &= ~PARENB; + options.c_cflag &= ~CSTOPB; + options.c_cflag &= ~CSIZE; + options.c_cflag |= CS8; + if (strcmp(rts, "rts")) { + options.c_cflag &= ~CRTSCTS; + } else { + options.c_cflag |= CRTSCTS; + } + options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); + options.c_oflag &= ~OPOST; + tcsetattr(pfd, TCSANOW, &options); + + /* Reset the board if we can */ + printf("Reset the board to enter bootloader (waiting for CONNECT)...\n"); + if (command) { + printf("Performing reset: %s\n", command); + system(command); + } + + /* Primary bootloader wait loop */ + i = 0; + while (1) { + /* Wait for CONNECT */ + r = write(pfd, (const void*)"\0", 1); + sleep(1); + r = read(pfd, &buf[i], sizeof(buf)-1-i); + if (r > 0) { + buf[i+r] = '\0'; + printf("%s", &buf[i]); fflush(stdout); + if (strstr(&buf[i], "CONNECT")) { + printf("\n"); + break; + } + i += r; + if (i >= sizeof(buf)-1) { + i = 0; + } + } else { + printf("."); fflush(stdout); + } + } + + /* Send primary file */ + if (!filename) { + printf("Please specify firmware file name (-f option)!\n"); + return -1; + } + if (stat(filename, &sbuf)) { + printf("Cannot open firmware file %s!\n", filename); + return -1; + } + ffd = open(filename, O_RDONLY); + if (ffd == -1) { + printf("Cannot open firmware file %s!\n", filename); + return -1; + } + printf("Sending %s (%i bytes)...\n", filename, sbuf.st_size); + s = sbuf.st_size; + r = write(pfd, (const void*)&s, 4); + i = 0; + r = read(ffd, buf, 1); + while (r > 0) { + do { + usleep(first_delay); + c = write(pfd, (const void*)buf, r); + } while(c < r); + i += r; + printf("Written %i\r", i); fflush(stdout); + r = read(ffd, buf, 1); + } + printf("\n"); + + /* Secondary loader wait loop */ + if (second || zerolen) { + /* Wait for ready */ + printf("Sending secondary file (waiting for ready)...\n"); + i = 0; + while (1) { + sleep(1); + r = read(pfd, &buf[i], sizeof(buf)-1-i); + if (r > 0) { + buf[i+r] = '\0'; + printf("%s", &buf[i]); fflush(stdout); + if (strstr(buf, "ready")) { + printf("\n"); + break; + } + i += r; + if (i >= sizeof(buf)-1) { + i = 0; + } + } else { + printf("."); fflush(stdout); + } + } + + /* Send secondary file */ + if (second) { + if (stat(second, &sbuf)) { + printf("Cannot open secondary file %s!\n", second); + return -1; + } + sfd = open(second, O_RDONLY); + if (sfd == -1) { + printf("Cannot open secondary file %s!\n", second); + return -1; + } + } + + /* Send secondary file */ + printf("Sending %s (%i bytes)...\n", second, sbuf.st_size); + s = sbuf.st_size; + r = write(pfd, (const void*)&s, 4); + i = 0; + r = read(sfd, buf, 1); + while (r > 0) { + do { + usleep(second_delay); + c = write(pfd, (const void*)buf, r); + } while(c < r); + i += r; + printf("Written %i\r", i); fflush(stdout); + r = read(sfd, buf, 1); + } + printf("\n"); + } + + /* Drop in echo mode */ + if (!do_exit) { + while (1) { + r = read(pfd, buf, sizeof(buf)); + if (r > 0) { + buf[r] = '\0'; + printf("%s", buf); fflush(stdout); + } + } + } +} + + +void help(void) +{ + printf("Example usage: mc1322x-load -f foo.bin -t /dev/ttyS0 -b 9600\n"); + printf(" or : mc1322x-load -f flasher.bin -s flashme.bin 0x1e000,0x11223344,0x55667788\n"); + printf(" or : mc1322x-load -f flasher.bin -z 0x1e000,0x11223344,0x55667788\n"); + printf(" -f required: binary file to load\n"); + printf(" -s optional: secondary binary file to send\n"); + printf(" -z optional: send a zero length file as secondary\n"); + printf(" -t, terminal default: /dev/ttyUSB0\n"); + printf(" -u, baud rate default: 115200\n"); + printf(" -r [none|rts] flow control default: rts\n"); + printf(" -c command to run for autoreset: \n"); + printf(" e.g. -c 'bbmc -l redbee-econotag -i 0 reset'\n"); + printf(" -e exit instead of dropping to terminal display\n"); + printf(" -a first intercharacter delay, passed to usleep\n"); + printf(" -b second intercharacter delay, passed to usleep\n"); + printf("\n"); + printf("Anything on the command line is sent after all of the files.\n\n"); +} From 74193d952b9d54674360f7a52880bf4f48e9b9b2 Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Fri, 12 Oct 2012 10:47:48 -0400 Subject: [PATCH 15/25] add flexibity layout to bbmc --- tools/ftditools/bbmc.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/tools/ftditools/bbmc.c b/tools/ftditools/bbmc.c index 62a177f54..8fe028d54 100644 --- a/tools/ftditools/bbmc.c +++ b/tools/ftditools/bbmc.c @@ -56,6 +56,11 @@ #define REDBEE_USB_VREF2H low(6) #define REDBEE_USB_INTERFACE INTERFACE_B +#define FLEXIBITY_USB_RESET high(2) +#define FLEXIBITY_USB_VREF2L high(7) +#define FLEXIBITY_USB_VREF2H high(6) +#define FLEXIBITY_USB_INTERFACE INTERFACE_A + #define BOARD REDBEE_USB #define STR(x) #x @@ -108,6 +113,10 @@ static struct layout layouts[] = .desc = "Redbee USB stick", std_layout(REDBEE_USB) }, + { .name = "flexibity", + .desc = "Flexibity USB Interface", + std_layout(FLEXIBITY_USB) + }, { .name = NULL, /* end of table */ }, }; From 6ff896d5b2e25b0d8aaa5295fdcafb6264ae82bf Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Fri, 12 Oct 2012 10:48:53 -0400 Subject: [PATCH 16/25] add zero len mode for mac addr --- tools/mc1322x-load.c | 47 ++++++++++++++++++++++++++++---------------- 1 file changed, 30 insertions(+), 17 deletions(-) diff --git a/tools/mc1322x-load.c b/tools/mc1322x-load.c index 59620e7d2..d63df2380 100644 --- a/tools/mc1322x-load.c +++ b/tools/mc1322x-load.c @@ -51,6 +51,7 @@ int first_delay = 50; int second_delay = 100; int do_exit = 0; int zerolen = 0; +char *args = NULL; struct stat sbuf; struct termios options; @@ -125,6 +126,9 @@ int main(int argc, char **argv) abort(); } } + /* Get other arguments */ + if (optind < argc) + args = argv[optind]; /* Print settings */ if (verbose) { @@ -207,8 +211,8 @@ int main(int argc, char **argv) printf("Cannot open firmware file %s!\n", filename); return -1; } - printf("Sending %s (%i bytes)...\n", filename, sbuf.st_size); s = sbuf.st_size; + printf("Sending %s (%i bytes)...\n", filename, s); r = write(pfd, (const void*)&s, 4); i = 0; r = read(ffd, buf, 1); @@ -258,24 +262,33 @@ int main(int argc, char **argv) printf("Cannot open secondary file %s!\n", second); return -1; } - } - - /* Send secondary file */ - printf("Sending %s (%i bytes)...\n", second, sbuf.st_size); - s = sbuf.st_size; - r = write(pfd, (const void*)&s, 4); - i = 0; - r = read(sfd, buf, 1); - while (r > 0) { - do { - usleep(second_delay); - c = write(pfd, (const void*)buf, r); - } while(c < r); - i += r; - printf("Written %i\r", i); fflush(stdout); + s = sbuf.st_size; + printf("Sending %s (%i bytes)...\n", second, s); + r = write(pfd, (const void*)&s, 4); + i = 0; r = read(sfd, buf, 1); + while (r > 0) { + do { + usleep(second_delay); + c = write(pfd, (const void*)buf, r); + } while(c < r); + i += r; + printf("Written %i\r", i); fflush(stdout); + r = read(sfd, buf, 1); + } + printf("\n"); + } else if (zerolen) { + s = 0; + printf("Sending %i...\n", s); + write(pfd, (const void*)&s, 4); } - printf("\n"); + } + + /* Send the remaining arguments */ + if (args) { + printf("Sending %s\n", args); + r = write(pfd, (const void*)args, strlen(args)); + r = write(pfd, (const void*)",", 1); } /* Drop in echo mode */ From 009180e0a90880ad81651fb3f4db2672f6873900 Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Wed, 10 Oct 2012 17:57:26 -0400 Subject: [PATCH 17/25] add M12 --- board/Makefile.board | 2 +- board/m12.h | 54 ++++++++++++++++++++++++++++++++++++++++++ board/std_conf.h | 22 +++++++++++++++++ doc/buck | 18 ++++++++++++++ lib/maca.c | 20 +++++++++------- src/default_lowlevel.c | 13 ++++++++++ src/default_lowlevel.h | 1 + tests/Makefile | 4 ++-- 8 files changed, 122 insertions(+), 12 deletions(-) create mode 100644 board/m12.h create mode 100644 doc/buck diff --git a/board/Makefile.board b/board/Makefile.board index ad2991869..a7dcae3c0 100644 --- a/board/Makefile.board +++ b/board/Makefile.board @@ -1,6 +1,6 @@ # -*- makefile -*- -ALL_BOARDS = redbee-dev redbee-r1 redbee-usb redbee-econotag quahogcon freescale-ncb +ALL_BOARDS = redbee-dev redbee-r1 redbee-usb redbee-econotag quahogcon freescale-ncb m12 OBJDIR = obj_$(BOARD) CFLAGS += -I. -I$(OBJDIR) -I$(MC1322X)/board -DBOARD=$(BOARD) diff --git a/board/m12.h b/board/m12.h new file mode 100644 index 000000000..b3b31a064 --- /dev/null +++ b/board/m12.h @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2010, Mariano Alvira and other contributors + * to the MC1322x project (http://mc1322x.devl.org) + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of libmc1322x: see http://mc1322x.devl.org + * for details. + * + * + */ + +#ifndef BOARD_M12_H +#define BOARD_M12_H + +/* XTAL TUNE parameters */ +/* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */ +/* for details about how to make this measurement */ + +/* Econotag also needs an addtional 12pf on board */ +/* Coarse tune: add 4pf */ +#define CTUNE_4PF 1 +/* Coarse tune: add 0-15 pf (CTUNE is 4 bits) */ +#define CTUNE 3 +/* Fine tune: add FTUNE * 156fF (FTUNE is 5bits) */ +#define FTUNE 3 + +#define vreg_init buck_init +#include + +#endif diff --git a/board/std_conf.h b/board/std_conf.h index 4c1c9b82c..f263d0fe7 100644 --- a/board/std_conf.h +++ b/board/std_conf.h @@ -42,6 +42,28 @@ #define vreg_init() default_vreg_init() #endif + +#ifndef GPIO_LED_RED +#define GPIO_LED_RED GPIO_40 +#endif +#ifndef GPIO_LED_GREEN +#define GPIO_LED_GREEN GPIO_41 +#endif +#ifndef GPIO_LED_BLUE +#define GPIO_LED_BLUE GPIO_42 +#endif + +#ifndef LED_RED +#define LED_RED 40 +#endif +#ifndef LED_GREEN +#define LED_GREEN 41 +#endif +#ifndef LED_BLUE +#define LED_BLUE 42 +#endif + + /* XTAL TUNE parameters */ /* recommended defaults from the datasheet */ diff --git a/doc/buck b/doc/buck new file mode 100644 index 000000000..cebe4cbdb --- /dev/null +++ b/doc/buck @@ -0,0 +1,18 @@ +no buck +------- +vsupply, +3.6, rftest-rx 46mA +3.27, rftest-rx 42mA +3.03, rftest-rx, 39.5mA +2.56, rftest-rx 35mA +2.2, rftest-rx 32mA + +buck +----- +3.58V, 39mA +3.3, 37mA +vsupply 3.03, rftest, 35.3mA +2.47, 32.9mA +2.2V, 31.2mA + +might have a hard time starting up everything in the <2.7V range diff --git a/lib/maca.c b/lib/maca.c index a1b744bc1..2de24fa96 100644 --- a/lib/maca.c +++ b/lib/maca.c @@ -870,7 +870,9 @@ void radio_init(void) { volatile uint32_t i; /* sequence 1 */ for(i=0; i>17) & 1) !=1) { continue; } /* wait for the bypass to take */ - *(volatile uint32_t *)(0x80003048) = 0x00000fa4; /* start the regulators */ - for(i=0; i<0x161a8; i++) { continue; } /* wait for the bypass to take */ - init_from_flash(0x1F000); PRINTF("ram_values:\n\r"); @@ -1141,7 +1139,11 @@ uint32_t exec_init_entry(volatile uint32_t *entries, uint8_t *valbuf) PRINTF("init_entry: address value pair - *0x%08x = 0x%08x\n\r", (unsigned int)entries[0], (unsigned int)entries[1]); - reg(entries[0]) = entries[1]; + if ((unsigned int)entries[0] != (unsigned int)CRM_VREG_CNTL) { + reg(entries[0]) = entries[1]; + } else { + PRINTF("skipping VREG_CNTL\n\r"); + } return 2; } } diff --git a/src/default_lowlevel.c b/src/default_lowlevel.c index 13657ae20..3ade95da8 100644 --- a/src/default_lowlevel.c +++ b/src/default_lowlevel.c @@ -45,6 +45,19 @@ void default_vreg_init(void) { *CRM_VREG_CNTL = 0x00000ff8; /* start the regulators */ } +void buck_init(void) { + CRM->SYS_CNTLbits.PWR_SOURCE = 1; + CRM->VREG_CNTLbits.BUCK_SYNC_REC_EN = 1; + CRM->VREG_CNTLbits.BUCK_BYPASS_EN = 0; + CRM->VREG_CNTLbits.BUCK_EN = 1; + while(CRM->STATUSbits.VREG_BUCK_RDY == 0) { continue; } + CRM->VREG_CNTLbits.VREG_1P5V_SEL = 3; + CRM->VREG_CNTLbits.VREG_1P5V_EN = 3; + CRM->VREG_CNTLbits.VREG_1P8V_EN = 1; + while(CRM->STATUSbits.VREG_1P5V_RDY == 0) { continue; } + while(CRM->STATUSbits.VREG_1P8V_RDY == 0) { continue; } +} + void uart1_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) { /* UART must be disabled to set the baudrate */ diff --git a/src/default_lowlevel.h b/src/default_lowlevel.h index 20fc43e66..550fe8b59 100644 --- a/src/default_lowlevel.h +++ b/src/default_lowlevel.h @@ -41,6 +41,7 @@ #define trim_xtal() pack_XTAL_CNTL(CTUNE_4PF, CTUNE, FTUNE, IBIAS) void default_vreg_init(void); +void buck_init(void); void uart1_init(uint16_t inc, uint16_t mod, uint8_t samp); void uart2_init(uint16_t inc, uint16_t mod, uint8_t samp); diff --git a/tests/Makefile b/tests/Makefile index 1611c0640..dc1fea01f 100644 --- a/tests/Makefile +++ b/tests/Makefile @@ -22,8 +22,8 @@ TARGETS := blink-red blink-green blink-blue blink-white blink-allio \ # this space is initialized with a rom call to rom_data_init TARGETS_WITH_ROM_VARS := nvm-read nvm-write romimg flasher \ rftest-rx rftest-tx \ - autoack-rx autoack-tx \ - per + autoack-rx autoack-tx \ + per ################################################## # you shouldn't need to edit anything below here # From b9defeee0288beba157a9a8143b4a28a95696e1a Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Sun, 21 Oct 2012 11:38:37 -0400 Subject: [PATCH 18/25] small tweaks to how ADC channels are enabled. --- lib/adc.c | 39 ++++++++++++++++++++++++--------------- lib/include/adc.h | 9 +++++++++ tests/adc.c | 7 ++++++- 3 files changed, 39 insertions(+), 16 deletions(-) diff --git a/lib/adc.c b/lib/adc.c index 841855107..efde94019 100644 --- a/lib/adc.c +++ b/lib/adc.c @@ -34,9 +34,7 @@ */ #include -#include "crm.h" -#include "adc.h" -#include "gpio-util.h" +#include "mc1322x.h" //#define ADC_CHANS_ENABLED 0x3F // channels 0-5 enabled //#define ADC_CHANS_ENABLED 0x7E // channels 1-6 enabled @@ -73,9 +71,26 @@ void adc_service(void) { } } -void adc_init(void) { - uint8_t n; +#define _adc_setup_chan(x) do { \ + if ( channel == x ) { \ + ADC->SEQ_1bits.CH##x = 1; \ + GPIO->FUNC_SEL.ADC##x = 1; \ + GPIO->PAD_DIR.ADC##x = 0; \ + GPIO->PAD_PU_EN.ADC##x = 0; \ +}} while (0) +void adc_setup_chan(uint8_t channel) { + _adc_setup_chan(0); + _adc_setup_chan(1); + _adc_setup_chan(2); + _adc_setup_chan(3); + _adc_setup_chan(4); + _adc_setup_chan(5); + _adc_setup_chan(6); + _adc_setup_chan(7); +} + +void adc_init(void) { ADC->CLOCK_DIVIDER = 80; // 300 KHz ADC->PRESCALE = ADC_PRESCALE_VALUE - 1; // divide by 24 for 1MHz. @@ -114,13 +129,13 @@ void adc_init(void) { ADC->SR_1_LOW = (REF_OSC / ADC_PRESCALE_VALUE) / (115200 / 8) + 1; #endif - ADC->SEQ_1 = 0 + ADC->SEQ_1 = 0; #if ADC_USE_TIMER - | (1 << 15) // sequence based on Timer 1. + ADC->SEQ_1bits.SEQ_MODE = 1; // sequence based on Timer 1 #else - | (0 << 15) // sequence based on convert time. + ADC->SEQ_1bits.SEQ_MODE = 0; // sequence based on convert time. #endif - | ADC_CHANS_ENABLED; + ADC->SEQ_1bits.BATT = 1; ADC->CONTROL = 0xF001 //#if ADC_USE_TIMER @@ -129,10 +144,4 @@ void adc_init(void) { ; ADC->OVERRIDE = (1 << 8); - for (n=0; n<=8; n++) { - if ((ADC_CHANS_ENABLED >> n) & 1) { - gpio_select_function(30 + n, 1); // Function 1 = ADC - gpio_set_pad_dir(30 + n, PAD_DIR_INPUT); - } - } } diff --git a/lib/include/adc.h b/lib/include/adc.h index 66dfa1f8a..3d018e009 100644 --- a/lib/include/adc.h +++ b/lib/include/adc.h @@ -39,6 +39,9 @@ #include #include "utils.h" +/* the Vbatt measurment reads about 200mV low --- trim by ADC_VBATT_TRIM */ +#define ADC_VBATT_TRIM 200 + /* ADC registers are all 16-bit wide with 16-bit access only */ #define ADC_BASE (0x8000D000) @@ -153,8 +156,14 @@ static volatile struct ADC_struct * const ADC = (void *) (ADC_BASE); #define adc_enable() (ADC->CONTROLbits.ON = 1) #define adc_disable() (ADC->CONTROLbits.ON = 0) #define adc_select_channels(chans) (ADC->SEQ_1 = (ADC->SEQ_1 & 0xFE00) | chans) +void adc_setup_chan(uint8_t channel); extern uint16_t adc_reading[NUM_ADC_CHAN]; +/* use the internal reference to return adc_readings in mV */ +#define adc_voltage(x) (adc_reading[x] * 1200/adc_reading[8]) +/* return vbatt voltage in mV */ +#define adc_vbatt 4095 * 1200/adc_reading[8] + ADC_VBATT_TRIM + void ADC_flush(void); uint16_t ADC_READ(void); void read_scanners(void); diff --git a/tests/adc.c b/tests/adc.c index 28a98ce75..dea333962 100644 --- a/tests/adc.c +++ b/tests/adc.c @@ -52,12 +52,17 @@ int main(void) printf("\x1B[2J"); // clear screen + for (c=0; c<=7; c++) { + adc_setup_chan(c); + } + for(;;) { printf("\x1B[H"); // cursor home printf("# Value\r\n"); for (c=0; c Date: Sun, 21 Oct 2012 15:08:58 -0400 Subject: [PATCH 19/25] pick a better adc vbatt trim as default --- lib/include/adc.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/lib/include/adc.h b/lib/include/adc.h index 3d018e009..7f8df79d4 100644 --- a/lib/include/adc.h +++ b/lib/include/adc.h @@ -40,7 +40,19 @@ #include "utils.h" /* the Vbatt measurment reads about 200mV low --- trim by ADC_VBATT_TRIM */ -#define ADC_VBATT_TRIM 200 +/* correction tracks well --- within 50mV over 2.1V to 3.6V */ +/* offset from correct for tags running from 3.29 vreg */ +/* trim = 146 */ +/* tag 1: -90mV */ +/* tag 2: -30mV */ +/* tag 3: -30mV */ +/* tag 4: -40mV */ +/* tag 5: +10mV */ +/* tag 6: -40mV */ +/* new trim 183 */ + +/* without per unit calibration, vbatt is probably +/- 75mV */ +#define ADC_VBATT_TRIM 183 /* ADC registers are all 16-bit wide with 16-bit access only */ #define ADC_BASE (0x8000D000) From e7e149d354d6b9dab5469c7df3570c2fa0f9a03a Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Tue, 23 Oct 2012 21:50:32 -0400 Subject: [PATCH 20/25] new uart_init and uart_setbaud --- lib/include/uart.h | 2 + lib/uart.c | 117 +++++++++++++++++++++++++++++++++++++++++ tests/adc.c | 3 +- tests/asm.c | 3 +- tests/autoack-rx.c | 3 +- tests/autoack-tx.c | 3 +- tests/config.h | 13 ----- tests/flasher.c | 3 +- tests/nvm-read.c | 3 +- tests/nvm-write.c | 3 +- tests/per.c | 3 +- tests/printf.c | 5 +- tests/pwm.c | 3 +- tests/rftest-rx.c | 3 +- tests/rftest-tx.c | 3 +- tests/romimg.c | 3 +- tests/sleep.c | 3 +- tests/u1u2-loopback.c | 6 ++- tests/uart1-loopback.c | 4 +- tests/wdt.c | 3 +- tests/xtal-trim.c | 3 +- 21 files changed, 160 insertions(+), 32 deletions(-) create mode 100644 lib/uart.c diff --git a/lib/include/uart.h b/lib/include/uart.h index 30109c495..1532f74b0 100644 --- a/lib/include/uart.h +++ b/lib/include/uart.h @@ -152,6 +152,8 @@ static volatile struct UART_struct * const UART2 = (void *) (UART2_BASE); #endif /* REG_NO_COMPAT */ +void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud); + extern volatile uint32_t u1_head, u1_tail; void uart1_putc(char c); #define uart1_can_get() (*UART1_URXCON > 0) diff --git a/lib/uart.c b/lib/uart.c new file mode 100644 index 000000000..e76ec0010 --- /dev/null +++ b/lib/uart.c @@ -0,0 +1,117 @@ +/* + * Copyright (c) 2010, Mariano Alvira and other contributors + * to the MC1322x project (http://mc1322x.devl.org) + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of libmc1322x: see http://mc1322x.devl.org + * for details. + * + * + */ + +#include +#include + +#define MOD 9999 +#define CLK 24000000 +#define DIV 16 /* uart->CON.XTIM = 0 is 16x oversample (datasheet is incorrect) */ + +#include +void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud) { + uint64_t inc; + + /* baud rate eqn from reference manual */ + /* multiply by an additional 10 to do a fixed point round later */ + inc = ((uint64_t) baud * DIV * MOD * 10 / CLK ) - 10 ; + /* add 5 and divide by 10 to get a rounding */ + inc = (inc + 5) / 10; + + /* UART must be disabled to set the baudrate */ + uart->CONbits = (struct UART_CON) { + .TXE = 0, + .RXE = 0, + }; + + uart->BR = ( (uint16_t)inc << 16 ) | MOD; + + uart->CONbits = (struct UART_CON) { + .XTIM = 0, + .TXE = 1, + .RXE = 1, + }; +} + +void uart_init(volatile struct UART_struct * uart) { + /* enable the uart so we can set the gpio mode */ + /* see Section 11.5.1.2 Alternate Modes */ + /* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */ + /* From the datasheet: "The peripheral function will control operation of the pad IF */ + /* THE PERIPHERAL IS ENABLED. */ + uart->CONbits = (struct UART_CON) { + .TXE = 1, + .RXE = 1, + }; + /* interrupt when there are this number or more bytes free in the TX buffer*/ + uart->TXCON = 16; + + if( uart == UART1 ) { + /* TX and CTS as outputs */ + GPIO->PAD_DIR_SET.GPIO_14 = 1; + GPIO->PAD_DIR_SET.GPIO_16 = 1; + + /* RX and RTS as inputs */ + GPIO->PAD_DIR_RESET.GPIO_15 = 1; + GPIO->PAD_DIR_RESET.GPIO_17 = 1; + + /* set GPIO15-14 to UART (UART1 TX and RX)*/ + GPIO->FUNC_SEL.GPIO_14 = 1; + GPIO->FUNC_SEL.GPIO_15 = 1; + + u1_head = 0; u1_tail = 0; + + /* tx and rx interrupts are enabled in the UART by default */ + /* see status register bits 13 and 14 */ + /* enable UART1 interrupts in the interrupt controller */ + enable_irq(UART1); + + } else { + /* do the same as above but for UART2 */ + GPIO->PAD_DIR_SET.GPIO_18 = 1; + GPIO->PAD_DIR_SET.GPIO_19 = 1; + + GPIO->PAD_DIR_RESET.GPIO_20 = 1; + GPIO->PAD_DIR_RESET.GPIO_21 = 1; + + GPIO->FUNC_SEL.GPIO_18 = 1; + GPIO->FUNC_SEL.GPIO_19 = 1; + + u2_head = 0; u2_tail = 0; + + enable_irq(UART2); + } +} + diff --git a/tests/adc.c b/tests/adc.c index dea333962..949913b12 100644 --- a/tests/adc.c +++ b/tests/adc.c @@ -45,7 +45,8 @@ int main(void) uint8_t c; trim_xtal(); - uart1_init(INC,MOD,SAMP); + uart_init(UART1); + uart_init(UART1, 115200); adc_init(); printf("adc test\r\n"); diff --git a/tests/asm.c b/tests/asm.c index d692d75d4..1718142f9 100644 --- a/tests/asm.c +++ b/tests/asm.c @@ -52,7 +52,8 @@ void main(void) { /* trim the reference osc. to 24MHz */ trim_xtal(); - uart_init(INC, MOD, SAMP); + uart_init(UART1); + uart_setbaud(UART1, 115200); vreg_init(); diff --git a/tests/autoack-rx.c b/tests/autoack-rx.c index 878aacd57..9f00667bc 100644 --- a/tests/autoack-rx.c +++ b/tests/autoack-rx.c @@ -64,7 +64,8 @@ void main(void) { /* trim the reference osc. to 24MHz */ trim_xtal(); - uart_init(INC, MOD, SAMP); + uart_init(UART1); + uart_init(UART1, 115200); vreg_init(); diff --git a/tests/autoack-tx.c b/tests/autoack-tx.c index 698881a57..d9067e8fd 100644 --- a/tests/autoack-tx.c +++ b/tests/autoack-tx.c @@ -99,7 +99,8 @@ void main(void) { /* trim the reference osc. to 24MHz */ trim_xtal(); - uart_init(INC, MOD, SAMP); + uart_init(UART1); + uart_init(UART1, 115200); vreg_init(); diff --git a/tests/config.h b/tests/config.h index 3124a9b57..b1c391da2 100644 --- a/tests/config.h +++ b/tests/config.h @@ -36,19 +36,6 @@ #ifndef CONFIG_H #define CONFIG_H -/* Baud rate */ -#define MOD 9999 -/* 230400 bps, INC=767, MOD=9999, 24Mhz 16x samp */ -/* 115200 bps, INC=767, MOD=9999, 24Mhz 8x samp */ -#define INC 767 -/* 921600 bps, MOD=9999, 24Mhz 16x samp */ -//#define INC 3071 -#define SAMP UCON_SAMP_8X -//#define SAMP UCON_SAMP_16X - -/* use uart1 for console */ -#define uart_init uart1_init - /* nvm interface */ #define NVM_INTERFACE gNvmInternalInterface_c /*#define NVM_INTERFACE gNvmExternalInterface_c */ diff --git a/tests/flasher.c b/tests/flasher.c index 4049c1bed..16c2eac70 100644 --- a/tests/flasher.c +++ b/tests/flasher.c @@ -84,8 +84,9 @@ void main(void) { volatile uint32_t state = SCAN_X; volatile uint32_t addr,data; + uart_init(UART1); + uart_init(UART1, 115200); - uart_init(INC, MOD, SAMP); disable_irq(UART1); vreg_init(); diff --git a/tests/nvm-read.c b/tests/nvm-read.c index 4e6438cd9..68229cf9c 100644 --- a/tests/nvm-read.c +++ b/tests/nvm-read.c @@ -46,7 +46,8 @@ void main(void) { uint32_t buf[READ_NBYTES/4]; uint32_t i; - uart_init(INC, MOD, SAMP); + uart_init(UART1); + uart_init(UART1, 115200); print_welcome("nvm-read"); diff --git a/tests/nvm-write.c b/tests/nvm-write.c index 8c161c87e..0a2a2d0d1 100644 --- a/tests/nvm-write.c +++ b/tests/nvm-write.c @@ -46,7 +46,8 @@ void main(void) { uint32_t buf[WRITE_NBYTES/4]; uint32_t i; - uart_init(INC, MOD, SAMP); + uart_init(UART1); + uart_init(UART1, 115200); print_welcome("nvm-write"); diff --git a/tests/per.c b/tests/per.c index 303505e05..0628ba0be 100644 --- a/tests/per.c +++ b/tests/per.c @@ -117,7 +117,8 @@ void main(void) { /* trim the reference osc. to 24MHz */ pack_XTAL_CNTL(CTUNE_4PF, CTUNE, FTUNE, IBIAS); - uart_init(INC, MOD, SAMP); + uart_init(UART1); + uart_init(UART1, 115200); vreg_init(); diff --git a/tests/printf.c b/tests/printf.c index 66a235f06..4018eb863 100644 --- a/tests/printf.c +++ b/tests/printf.c @@ -65,6 +65,8 @@ size_t fwrite(const void *ptr, size_t size, size_t nmemb, } #endif + + int main(void) { char *ptr = "Hello world!"; @@ -74,7 +76,8 @@ int main(void) int mi; // char buf[80]; - uart_init(INC, MOD, SAMP); + uart_init(UART1); + uart_setbaud(UART1, 115200); print_size(int8_t); print_size(uint8_t); diff --git a/tests/pwm.c b/tests/pwm.c index 324913d54..b01938ae6 100644 --- a/tests/pwm.c +++ b/tests/pwm.c @@ -46,7 +46,8 @@ int main(void) int x = 32768; trim_xtal(); - uart1_init(INC,MOD,SAMP); + uart_init(UART1); + uart_init(UART1, 115200); rtc_init(); printf("pwm test\r\n"); diff --git a/tests/rftest-rx.c b/tests/rftest-rx.c index bb4a04143..22cda69be 100644 --- a/tests/rftest-rx.c +++ b/tests/rftest-rx.c @@ -62,7 +62,8 @@ void main(void) { /* trim the reference osc. to 24MHz */ trim_xtal(); - uart_init(INC, MOD, SAMP); + uart_init(UART1); + uart_init(UART1, 115200); vreg_init(); diff --git a/tests/rftest-tx.c b/tests/rftest-tx.c index b6038d7d3..b2439df45 100644 --- a/tests/rftest-tx.c +++ b/tests/rftest-tx.c @@ -70,7 +70,8 @@ void main(void) { /* trim the reference osc. to 24MHz */ trim_xtal(); - uart_init(INC, MOD, SAMP); + uart_init(UART1); + uart_init(UART1, 115200); vreg_init(); diff --git a/tests/romimg.c b/tests/romimg.c index dcf6d4637..63e419a6b 100644 --- a/tests/romimg.c +++ b/tests/romimg.c @@ -42,7 +42,8 @@ void main(void) { volatile uint8_t *data; - uart_init(INC, MOD, SAMP); + uart_init(UART1); + uart_init(UART1, 115200); for(data = DUMP_BASE; data < ((uint8_t *)(DUMP_BASE+DUMP_LEN)); data++) { uart1_putc(*data); diff --git a/tests/sleep.c b/tests/sleep.c index d45723640..98ab58cd5 100644 --- a/tests/sleep.c +++ b/tests/sleep.c @@ -41,7 +41,8 @@ void main(void) { - uart_init(INC,MOD,SAMP); + uart_init(UART1); + uart_init(UART1, 115200); *mem32(0x00401ffc) = 0x01234567; *mem32(0x00407ffc) = 0xdeadbeef; diff --git a/tests/u1u2-loopback.c b/tests/u1u2-loopback.c index 4f7262e17..63020ce21 100644 --- a/tests/u1u2-loopback.c +++ b/tests/u1u2-loopback.c @@ -41,8 +41,10 @@ void main(void) { - uart1_init(INC,MOD,SAMP); - uart2_init(INC,MOD,SAMP); + uart_init(UART1); + uart_init(UART2); + uart_setbaud(UART1, 115200); + uart_setbaud(UART2, 115200); while(1) { if(uart1_can_get()) { diff --git a/tests/uart1-loopback.c b/tests/uart1-loopback.c index dc51d246e..2db70b297 100644 --- a/tests/uart1-loopback.c +++ b/tests/uart1-loopback.c @@ -41,7 +41,9 @@ void main(void) { - uart1_init(INC,MOD,SAMP); +// uart1_init(INC,MOD,SAMP); + uart_init(UART1); + uart_setbaud(UART1, 1200); while(1) { if(uart1_can_get()) { diff --git a/tests/wdt.c b/tests/wdt.c index d1281959a..fccc7dfd5 100644 --- a/tests/wdt.c +++ b/tests/wdt.c @@ -46,7 +46,8 @@ void main(void) { volatile uint32_t i; - uart1_init(INC,MOD,SAMP); + uart_init(UART1); + uart_init(UART1, 115200); printf("reset\n\r"); diff --git a/tests/xtal-trim.c b/tests/xtal-trim.c index 02e1d944e..1b0952843 100644 --- a/tests/xtal-trim.c +++ b/tests/xtal-trim.c @@ -48,7 +48,8 @@ int main(void) ctune = 0; ftune = 0; - uart1_init(INC,MOD,SAMP); + uart_init(UART1); + uart_init(UART1, 115200); print_welcome("pwm test\r\n"); pack_XTAL_CNTL(ctune_4pf, ctune, ftune, IBIAS); From b3e2f306743f2b92c27b245354b7c61cf4821ebb Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Wed, 24 Oct 2012 13:22:20 -0400 Subject: [PATCH 21/25] change uart_init to take a baud so you don't need a second call to setbaud --- lib/include/uart.h | 1 + lib/uart.c | 5 ++++- tests/adc.c | 1 - tests/asm.c | 3 +-- tests/autoack-rx.c | 1 - tests/autoack-tx.c | 1 - tests/flasher.c | 1 - tests/nvm-read.c | 10 ++++++++-- tests/nvm-write.c | 1 - tests/per.c | 1 - tests/printf.c | 3 +-- tests/pwm.c | 1 - tests/rftest-rx.c | 1 - tests/rftest-tx.c | 1 - tests/romimg.c | 1 - tests/sleep.c | 1 - tests/u1u2-loopback.c | 6 ++---- tests/uart1-loopback.c | 4 +--- tests/wdt.c | 1 - tests/xtal-trim.c | 1 - 20 files changed, 18 insertions(+), 27 deletions(-) diff --git a/lib/include/uart.h b/lib/include/uart.h index 1532f74b0..08ce15bd2 100644 --- a/lib/include/uart.h +++ b/lib/include/uart.h @@ -152,6 +152,7 @@ static volatile struct UART_struct * const UART2 = (void *) (UART2_BASE); #endif /* REG_NO_COMPAT */ +void uart_init(volatile struct UART_struct * uart, uint32_t baud); void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud); extern volatile uint32_t u1_head, u1_tail; diff --git a/lib/uart.c b/lib/uart.c index e76ec0010..1cc5c41ec 100644 --- a/lib/uart.c +++ b/lib/uart.c @@ -65,7 +65,7 @@ void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud) { }; } -void uart_init(volatile struct UART_struct * uart) { +void uart_init(volatile struct UART_struct * uart, uint32_t baud) { /* enable the uart so we can set the gpio mode */ /* see Section 11.5.1.2 Alternate Modes */ /* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */ @@ -113,5 +113,8 @@ void uart_init(volatile struct UART_struct * uart) { enable_irq(UART2); } + + uart_setbaud(uart, baud); + } diff --git a/tests/adc.c b/tests/adc.c index 949913b12..92fec985e 100644 --- a/tests/adc.c +++ b/tests/adc.c @@ -45,7 +45,6 @@ int main(void) uint8_t c; trim_xtal(); - uart_init(UART1); uart_init(UART1, 115200); adc_init(); diff --git a/tests/asm.c b/tests/asm.c index 1718142f9..087afba72 100644 --- a/tests/asm.c +++ b/tests/asm.c @@ -52,8 +52,7 @@ void main(void) { /* trim the reference osc. to 24MHz */ trim_xtal(); - uart_init(UART1); - uart_setbaud(UART1, 115200); + uart_init(UART1, 115200); vreg_init(); diff --git a/tests/autoack-rx.c b/tests/autoack-rx.c index 9f00667bc..03de59249 100644 --- a/tests/autoack-rx.c +++ b/tests/autoack-rx.c @@ -64,7 +64,6 @@ void main(void) { /* trim the reference osc. to 24MHz */ trim_xtal(); - uart_init(UART1); uart_init(UART1, 115200); vreg_init(); diff --git a/tests/autoack-tx.c b/tests/autoack-tx.c index d9067e8fd..205c18a49 100644 --- a/tests/autoack-tx.c +++ b/tests/autoack-tx.c @@ -99,7 +99,6 @@ void main(void) { /* trim the reference osc. to 24MHz */ trim_xtal(); - uart_init(UART1); uart_init(UART1, 115200); vreg_init(); diff --git a/tests/flasher.c b/tests/flasher.c index 16c2eac70..e04495490 100644 --- a/tests/flasher.c +++ b/tests/flasher.c @@ -84,7 +84,6 @@ void main(void) { volatile uint32_t state = SCAN_X; volatile uint32_t addr,data; - uart_init(UART1); uart_init(UART1, 115200); disable_irq(UART1); diff --git a/tests/nvm-read.c b/tests/nvm-read.c index 68229cf9c..c100f07db 100644 --- a/tests/nvm-read.c +++ b/tests/nvm-read.c @@ -46,12 +46,18 @@ void main(void) { uint32_t buf[READ_NBYTES/4]; uint32_t i; - uart_init(UART1); uart_init(UART1, 115200); print_welcome("nvm-read"); vreg_init(); +// buck_init(); + while(CRM->STATUSbits.VREG_1P5V_RDY == 0) { continue; } + while(CRM->STATUSbits.VREG_1P8V_RDY == 0) { continue; } + + printf("Sys cntl %08x\n\r", (unsigned int)CRM->SYS_CNTL); + printf("vreg cntl %08x\n\r", (unsigned int)CRM->VREG_CNTL); + printf("crm status %08x\n\r", (unsigned int)CRM->STATUS); if(NVM_INTERFACE == gNvmInternalInterface_c) { @@ -75,7 +81,7 @@ void main(void) { err = nvm_read(NVM_INTERFACE, type, (uint8_t *)buf, READ_ADDR, READ_NBYTES); printf("nvm_read returned: 0x%02x\r\n", err); - for(i=0; i Date: Wed, 24 Oct 2012 14:15:59 -0400 Subject: [PATCH 22/25] add routines to set flow control --- lib/include/uart.h | 1 + lib/uart.c | 77 ++++++++++++++++++++++++++++++++++------------ 2 files changed, 58 insertions(+), 20 deletions(-) diff --git a/lib/include/uart.h b/lib/include/uart.h index 08ce15bd2..222b7a54d 100644 --- a/lib/include/uart.h +++ b/lib/include/uart.h @@ -154,6 +154,7 @@ static volatile struct UART_struct * const UART2 = (void *) (UART2_BASE); void uart_init(volatile struct UART_struct * uart, uint32_t baud); void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud); +void uart_flowctl(volatile struct UART_struct * uart, uint8_t on); extern volatile uint32_t u1_head, u1_tail; void uart1_putc(char c); diff --git a/lib/uart.c b/lib/uart.c index 1cc5c41ec..3dc24688b 100644 --- a/lib/uart.c +++ b/lib/uart.c @@ -40,7 +40,6 @@ #define CLK 24000000 #define DIV 16 /* uart->CON.XTIM = 0 is 16x oversample (datasheet is incorrect) */ -#include void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud) { uint64_t inc; @@ -65,6 +64,49 @@ void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud) { }; } +void uart_flowctl(volatile struct UART_struct * uart, uint8_t on) { + if (on) { + if( uart == UART1 ) { + /* CTS and RTS directions */ + GPIO->PAD_DIR_SET.U1CTS = 1; + GPIO->PAD_DIR_RESET.U1RTS = 1; + /* function select to uart */ + GPIO->FUNC_SEL.U1CTS = 1; + GPIO->FUNC_SEL.U1RTS = 1; + } else { + /* UART 2 */ + /* CTS and RTS directions */ + GPIO->PAD_DIR_SET.U2CTS = 1; + GPIO->PAD_DIR_RESET.U2RTS = 1; + /* function select to uart */ + GPIO->FUNC_SEL.U2CTS = 1; + GPIO->FUNC_SEL.U2RTS = 1; + } + /* enable flow control */ + uart->CONbits.FCE = 1; + } else { + /* off */ + /* disable flow control */ + uart->CONbits.FCE = 0; + if( uart == UART1 ) { + /* CTS and RTS to inputs */ + GPIO->PAD_DIR_RESET.U1CTS = 1; + GPIO->PAD_DIR_RESET.U1RTS = 1; + /* function select to gpio */ + GPIO->FUNC_SEL.U1CTS = 3; + GPIO->FUNC_SEL.U1RTS = 3; + } else { + /* UART 2 */ + /* CTS and RTS to inputs */ + GPIO->PAD_DIR_RESET.U2CTS = 1; + GPIO->PAD_DIR_RESET.U2RTS = 1; + /* function select to gpio */ + GPIO->FUNC_SEL.U2CTS = 3; + GPIO->FUNC_SEL.U2RTS = 3; + } + } +} + void uart_init(volatile struct UART_struct * uart, uint32_t baud) { /* enable the uart so we can set the gpio mode */ /* see Section 11.5.1.2 Alternate Modes */ @@ -79,17 +121,13 @@ void uart_init(volatile struct UART_struct * uart, uint32_t baud) { uart->TXCON = 16; if( uart == UART1 ) { - /* TX and CTS as outputs */ - GPIO->PAD_DIR_SET.GPIO_14 = 1; - GPIO->PAD_DIR_SET.GPIO_16 = 1; + /* TX and RX directions */ + GPIO->PAD_DIR_SET.U1TX = 1; + GPIO->PAD_DIR_RESET.U1RX = 1; - /* RX and RTS as inputs */ - GPIO->PAD_DIR_RESET.GPIO_15 = 1; - GPIO->PAD_DIR_RESET.GPIO_17 = 1; - - /* set GPIO15-14 to UART (UART1 TX and RX)*/ - GPIO->FUNC_SEL.GPIO_14 = 1; - GPIO->FUNC_SEL.GPIO_15 = 1; + /* set func sel to UART */ + GPIO->FUNC_SEL.U1TX = 1; + GPIO->FUNC_SEL.U1RX = 1; u1_head = 0; u1_tail = 0; @@ -99,15 +137,14 @@ void uart_init(volatile struct UART_struct * uart, uint32_t baud) { enable_irq(UART1); } else { - /* do the same as above but for UART2 */ - GPIO->PAD_DIR_SET.GPIO_18 = 1; - GPIO->PAD_DIR_SET.GPIO_19 = 1; - - GPIO->PAD_DIR_RESET.GPIO_20 = 1; - GPIO->PAD_DIR_RESET.GPIO_21 = 1; - - GPIO->FUNC_SEL.GPIO_18 = 1; - GPIO->FUNC_SEL.GPIO_19 = 1; + /* UART2 */ + /* TX and RX directions */ + GPIO->PAD_DIR_SET.U2TX = 1; + GPIO->PAD_DIR_RESET.U1RX = 1; + + /* set func sel to UART */ + GPIO->FUNC_SEL.U2TX = 1; + GPIO->FUNC_SEL.U2RX = 1; u2_head = 0; u2_tail = 0; From d12df2eed3650e16dc4281eaa58d2b4402e1c534 Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Wed, 24 Oct 2012 14:54:24 -0400 Subject: [PATCH 23/25] use rx and tx queues for uart --- lib/include/uart.h | 35 +++++++++++++- lib/uart.c | 43 ++++++++++++----- lib/uart1.c | 104 ++++++++++++++++++++++++++++++++++------- lib/uart2.c | 100 ++++++++++++++++++++++++++++++++------- src/default_lowlevel.c | 67 -------------------------- 5 files changed, 235 insertions(+), 114 deletions(-) diff --git a/lib/include/uart.h b/lib/include/uart.h index 222b7a54d..353c24ca7 100644 --- a/lib/include/uart.h +++ b/lib/include/uart.h @@ -156,14 +156,45 @@ void uart_init(volatile struct UART_struct * uart, uint32_t baud); void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud); void uart_flowctl(volatile struct UART_struct * uart, uint8_t on); -extern volatile uint32_t u1_head, u1_tail; + +/* The mc1322x has a 32 byte hardware FIFO for transmitted characters. + * Currently it is always filled from a larger RAM buffer. It would be + * possible to eliminate that overhead by filling directly from a chain + * of data buffer pointers, but printf's would be not so easy. + */ +#define UART1_TX_BUFFERSIZE 1024 +extern volatile uint32_t u1_tx_head, u1_tx_tail; void uart1_putc(char c); + +/* The mc1322x has a 32 byte hardware FIFO for received characters. + * If a larger rx buffersize is specified the FIFO will be extended into RAM. + * RAM transfers will occur on interrupt when the FIFO is nearly full. + * If a smaller buffersize is specified hardware flow control will be + * initiated at that FIFO level. + * Set to 32 for no flow control or RAM buffer. + */ +#define UART1_RX_BUFFERSIZE 128 +#if UART1_RX_BUFFERSIZE > 32 +extern volatile uint32_t u1_rx_head, u1_rx_tail; +#define uart1_can_get() ((u1_rx_head!=u1_rx_tail) || (*UART1_URXCON > 0)) +#else #define uart1_can_get() (*UART1_URXCON > 0) +#endif uint8_t uart1_getc(void); -extern volatile uint32_t u2_head, u2_tail; + +#define UART2_TX_BUFFERSIZE 1024 +extern volatile uint32_t u2_tx_head, u2_tx_tail; void uart2_putc(char c); + +#define UART2_RX_BUFFERSIZE 128 +#if UART2_RX_BUFFERSIZE > 32 +extern volatile uint32_t u2_rx_head, u2_rx_tail; +#define uart2_can_get() ((u2_rx_head!=u2_rx_tail) || (*UART2_URXCON > 0)) +#else #define uart2_can_get() (*UART2_URXCON > 0) +#endif uint8_t uart2_getc(void); #endif + diff --git a/lib/uart.c b/lib/uart.c index 3dc24688b..d56735901 100644 --- a/lib/uart.c +++ b/lib/uart.c @@ -50,18 +50,14 @@ void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud) { inc = (inc + 5) / 10; /* UART must be disabled to set the baudrate */ - uart->CONbits = (struct UART_CON) { - .TXE = 0, - .RXE = 0, - }; + uart->CONbits.TXE = 0; + uart->CONbits.RXE = 0; uart->BR = ( (uint16_t)inc << 16 ) | MOD; - uart->CONbits = (struct UART_CON) { - .XTIM = 0, - .TXE = 1, - .RXE = 1, - }; + uart->CONbits.XTIM = 0; + uart->CONbits.TXE = 1; + uart->CONbits.RXE = 1; } void uart_flowctl(volatile struct UART_struct * uart, uint8_t on) { @@ -117,6 +113,7 @@ void uart_init(volatile struct UART_struct * uart, uint32_t baud) { .TXE = 1, .RXE = 1, }; + /* interrupt when there are this number or more bytes free in the TX buffer*/ uart->TXCON = 16; @@ -129,7 +126,19 @@ void uart_init(volatile struct UART_struct * uart, uint32_t baud) { GPIO->FUNC_SEL.U1TX = 1; GPIO->FUNC_SEL.U1RX = 1; - u1_head = 0; u1_tail = 0; +#if UART1_RX_BUFFERSIZE > 32 + *UART1_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */ + *UART1_URXCON = 30; /* interrupt when fifo is nearly full */ + u1_rx_head = 0; u1_rx_tail = 0; +#elif UART1_RX_BUFFERSIZE < 32 /* enable receive, transmit, flow control, disable rx interrupt */ + *UART1_UCON = (1 << 0) | (1 << 1) | (1 << 12) | (1 << 14); + *UART1_UCTS = UART1_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */ + *GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART1 CTS and RTS */ +#else + *UART1_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */ +#endif + + u1_tx_head = 0; u1_tx_tail = 0; /* tx and rx interrupts are enabled in the UART by default */ /* see status register bits 13 and 14 */ @@ -146,7 +155,19 @@ void uart_init(volatile struct UART_struct * uart, uint32_t baud) { GPIO->FUNC_SEL.U2TX = 1; GPIO->FUNC_SEL.U2RX = 1; - u2_head = 0; u2_tail = 0; +#if UART2_RX_BUFFERSIZE > 32 + *UART2_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */ + *UART2_URXCON = 30; /* interrupt when fifo is nearly full */ + u2_rx_head = 0; u2_rx_tail = 0; +#elif UART2_RX_BUFFERSIZE < 32 /* enable receive, transmit, disable flow control, disable rx interrupt */ + *UART2_UCON = (1 << 0) | (1 << 1) | (0 << 12) | (1 << 14); + *UART2_UCTS = UART2_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */ + *GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART2 CTS and RTS */ +#else + *UART2_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */ +#endif + + u2_tx_head = 0; u2_tx_tail = 0; enable_irq(UART2); } diff --git a/lib/uart1.c b/lib/uart1.c index 2dc0a9c51..f45ccbeae 100644 --- a/lib/uart1.c +++ b/lib/uart1.c @@ -28,7 +28,7 @@ * SUCH DAMAGE. * * This file is part of libmc1322x: see http://mc1322x.devl.org - * for details. + * for details. * * */ @@ -36,43 +36,111 @@ #include #include -volatile char u1_tx_buf[64]; -volatile uint32_t u1_head, u1_tail; +volatile char u1_tx_buf[UART1_TX_BUFFERSIZE]; +volatile uint32_t u1_tx_head, u1_tx_tail; + +#if UART1_RX_BUFFERSIZE > 32 +volatile char u1_rx_buf[UART1_RX_BUFFERSIZE-32]; +volatile uint32_t u1_rx_head, u1_rx_tail; +#endif void uart1_isr(void) { - while( *UART1_UTXCON != 0 ) { - if (u1_head == u1_tail) { + +#if UART1_RX_BUFFERSIZE > 32 + if (*UART1_USTAT & ( 1 << 6)) { //receive interrupt + while( *UART1_URXCON != 0 ) { //flush the hardware fifo into the software buffer + uint32_t u1_rx_tail_next; + u1_rx_tail_next = u1_rx_tail+1; + if (u1_rx_tail_next >= sizeof(u1_rx_buf)) + u1_rx_tail_next = 0; + if (u1_rx_head != u1_rx_tail_next) { + u1_rx_buf[u1_rx_tail]= *UART1_UDATA; + u1_rx_tail = u1_rx_tail_next; + } else { //buffer is full, flush the fifo + while (*UART1_URXCON !=0) { if (*UART1_UDATA) { } } + } + } + return; + } +#endif + + while( *UART1_UTXCON != 0 ) { + if (u1_tx_head == u1_tx_tail) { +#if UART1_RX_BUFFERSIZE > 32 + *UART1_UCON |= (1 << 13); /*disable tx interrupt */ +#else disable_irq(UART1); +#endif return; } - *UART1_UDATA = u1_tx_buf[u1_tail]; - u1_tail++; - if (u1_tail >= sizeof(u1_tx_buf)) - u1_tail = 0; + + *UART1_UDATA = u1_tx_buf[u1_tx_tail]; + u1_tx_tail++; + if (u1_tx_tail >= sizeof(u1_tx_buf)) + u1_tx_tail = 0; } } void uart1_putc(char c) { /* disable UART1 since */ - /* UART1 isr modifies u1_head and u1_tail */ - disable_irq(UART1); + /* UART1 isr modifies u1_tx_head and u1_tx_tail */ +#if UART1_RX_BUFFERSIZE > 32 + *UART1_UCON |= (1 << 13); /*disable tx interrupt */ +#else + disable_irq(UART1); +#endif - if( (u1_head == u1_tail) && + if( (u1_tx_head == u1_tx_tail) && (*UART1_UTXCON != 0)) { *UART1_UDATA = c; } else { - u1_tx_buf[u1_head] = c; - u1_head += 1; - if (u1_head >= sizeof(u1_tx_buf)) - u1_head = 0; - if (u1_head == u1_tail) { /* drop chars when no room */ - if (u1_head) { u1_head -=1; } else { u1_head = sizeof(u1_tx_buf); } + u1_tx_buf[u1_tx_head] = c; + u1_tx_head += 1; + if (u1_tx_head >= sizeof(u1_tx_buf)) + u1_tx_head = 0; + if (u1_tx_head == u1_tx_tail) { /* drop chars when no room */ +#if UART1_DROP_CHARS + if (u1_tx_head) { u1_tx_head -=1; } else { u1_tx_head = sizeof(u1_tx_buf); } +#else + { + uint32_t u1_tx_tail_save=u1_tx_tail; + /* Back up head to show buffer not empty, and enable tx interrupt */ + u1_tx_head--; +#if UART1_RX_BUFFERSIZE > 32 + *UART1_UCON &= ~(1 << 13); /*enable tx interrupt */ +#else + enable_irq(UART1); +#endif + /* Tail will change after one character goes out */ + while (u1_tx_tail_save == u1_tx_tail) ; + /* Restore head to character we just stuffed */ + u1_tx_head++; + return; + } +#endif /* UART1_DROP_CHARS */ } + +#if UART1_RX_BUFFERSIZE > 32 + *UART1_UCON &= ~(1 << 13); /*enable tx interrupt */ +#else enable_irq(UART1); +#endif + } } uint8_t uart1_getc(void) { +#if UART1_RX_BUFFERSIZE > 32 +/* First pull from the ram buffer */ +uint8_t c=0; + if (u1_rx_head != u1_rx_tail) { + c = u1_rx_buf[u1_rx_head++]; + if (u1_rx_head >= sizeof(u1_rx_buf)) + u1_rx_head=0; + return c; + } +#endif +/* Then pull from the hardware fifo */ while(uart1_can_get() == 0) { continue; } return *UART1_UDATA; } diff --git a/lib/uart2.c b/lib/uart2.c index 96ea8d30f..b5b2f22de 100644 --- a/lib/uart2.c +++ b/lib/uart2.c @@ -36,43 +36,111 @@ #include #include -volatile char u2_tx_buf[64]; -volatile uint32_t u2_head, u2_tail; +volatile char u2_tx_buf[UART2_TX_BUFFERSIZE]; +volatile uint32_t u2_tx_head, u2_tx_tail; + +#if UART2_RX_BUFFERSIZE > 32 +volatile char u2_rx_buf[UART2_RX_BUFFERSIZE-32]; +volatile uint32_t u2_rx_head, u2_rx_tail; +#endif void uart2_isr(void) { + +#if UART2_RX_BUFFERSIZE > 32 + if (*UART2_USTAT & ( 1 << 6)) { //receive interrupt + while( *UART2_URXCON != 0 ) { //flush the hardware fifo into the software buffer + uint32_t u2_rx_tail_next; + u2_rx_tail_next = u2_rx_tail+1; + if (u2_rx_tail_next >= sizeof(u2_rx_buf)) + u2_rx_tail_next = 0; + if (u2_rx_head != u2_rx_tail_next) { + u2_rx_buf[u2_rx_tail]= *UART2_UDATA; + u2_rx_tail = u2_rx_tail_next; + } else { //buffer is full, flush the fifo + while (*UART2_URXCON !=0) { if (*UART2_UDATA) { } } + } + } + return; + } +#endif + while( *UART2_UTXCON != 0 ) { - if (u2_head == u2_tail) { + if (u2_tx_head == u2_tx_tail) { +#if UART2_RX_BUFFERSIZE > 32 + *UART2_UCON |= (1 << 13); /*disable tx interrupt */ +#else disable_irq(UART2); +#endif return; } - *UART2_UDATA = u2_tx_buf[u2_tail]; - u2_tail++; - if (u2_tail >= sizeof(u2_tx_buf)) - u2_tail = 0; + *UART2_UDATA = u2_tx_buf[u2_tx_tail]; + u2_tx_tail++; + if (u2_tx_tail >= sizeof(u2_tx_buf)) + u2_tx_tail = 0; } + } void uart2_putc(char c) { /* disable UART2 since */ - /* UART2 isr modifies u2_head and u2_tail */ - disable_irq(UART2); + /* UART2 isr modifies u2_tx_head and u2_tx_tail */ +#if UART2_RX_BUFFERSIZE > 32 + *UART2_UCON |= (1 << 13); /*disable tx interrupt */ +#else + disable_irq(UART2); +#endif - if( (u2_head == u2_tail) && + if( (u2_tx_head == u2_tx_tail) && (*UART2_UTXCON != 0)) { *UART2_UDATA = c; } else { - u2_tx_buf[u2_head] = c; - u2_head += 1; - if (u2_head >= sizeof(u2_tx_buf)) - u2_head = 0; - if (u2_head == u2_tail) { /* drop chars when no room */ - if (u2_head) { u2_head -=1; } else { u2_head = sizeof(u2_tx_buf); } + u2_tx_buf[u2_tx_head] = c; + u2_tx_head += 1; + if (u2_tx_head >= sizeof(u2_tx_buf)) + u2_tx_head = 0; + if (u2_tx_head == u2_tx_tail) { /* drop chars when no room */ +#if UART2_DROP_CHARS + if (u2_tx_head) { u2_tx_head -=1; } else { u2_tx_head = sizeof(u2_tx_buf); } +#else + { + uint32_t u2_tx_tail_save=u2_tx_tail; + /* Back up head to show buffer not empty, and enable tx interrupt */ + u2_tx_head--; +#if UART2_RX_BUFFERSIZE > 32 + *UART2_UCON &= ~(1 << 13); /*enable tx interrupt */ +#else + enable_irq(UART2); +#endif + /* Tail will change after one character goes out */ + while (u2_tx_tail_save == u2_tx_tail) ; + /* Restore head to character we just stuffed */ + u2_tx_head++; + return; + } +#endif /* UART2_DROP_CHARS */ } + +#if UART2_RX_BUFFERSIZE > 32 + *UART2_UCON &= ~(1 << 13); /*enable tx interrupt */ +#else enable_irq(UART2); +#endif + } } uint8_t uart2_getc(void) { +#if UART2_RX_BUFFERSIZE > 32 +/* First pull from the ram buffer */ +uint8_t c=0; + if (u2_rx_head != u2_rx_tail) { + c = u2_rx_buf[u2_rx_head++]; + if (u2_rx_head >= sizeof(u2_rx_buf)) + u2_rx_head=0; + return c; + } +#endif +/* Then pull from the hardware fifo */ while(uart2_can_get() == 0) { continue; } return *UART2_UDATA; } diff --git a/src/default_lowlevel.c b/src/default_lowlevel.c index 3ade95da8..6150885a0 100644 --- a/src/default_lowlevel.c +++ b/src/default_lowlevel.c @@ -58,70 +58,3 @@ void buck_init(void) { while(CRM->STATUSbits.VREG_1P8V_RDY == 0) { continue; } } -void uart1_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) { - - /* UART must be disabled to set the baudrate */ - UART1->CON = 0; - - UART1->BR = ( inc << 16 ) | mod; - - /* TX and CTS as outputs */ - GPIO->PAD_DIR_SET.GPIO_14 = 1; - GPIO->PAD_DIR_SET.GPIO_16 = 1; - - /* RX and RTS as inputs */ - GPIO->PAD_DIR_RESET.GPIO_15 = 1; - GPIO->PAD_DIR_RESET.GPIO_17 = 1; - - /* see Section 11.5.1.2 Alternate Modes */ - /* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */ - /* From the datasheet: "The peripheral function will control operation of the pad IF */ - /* THE PERIPHERAL IS ENABLED. */ - UART1->CON = (1 << 0) | (1 << 1); /* enable receive, transmit */ - if(samp == UCON_SAMP_16X) - set_bit(*UART1_UCON,UCON_SAMP); - - /* set GPIO15-14 to UART (UART1 TX and RX)*/ - GPIO->FUNC_SEL.GPIO_14 = 1; - GPIO->FUNC_SEL.GPIO_15 = 1; - - /* interrupt when there are this number or more bytes free in the TX buffer*/ - UART1->TXCON = 16; - - u1_head = 0; u1_tail = 0; - - /* tx and rx interrupts are enabled in the UART by default */ - /* see status register bits 13 and 14 */ - /* enable UART1 interrupts in the interrupt controller */ - enable_irq(UART1); -} - -void uart2_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) { - - /* UART must be disabled to set the baudrate */ - UART2->CON = 0; - UART2->BR = ( inc << 16 ) | mod; - - /* see Section 11.5.1.2 Alternate Modes */ - /* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */ - /* From the datasheet: "The peripheral function will control operation of the pad IF */ - /* THE PERIPHERAL IS ENABLED. Can override with U2_ENABLE_DEFAULT. */ - UART2->CON = (1 << 0) | (1 << 1); /* enable receive, transmit */ - - if(samp == UCON_SAMP_16X) - set_bit(*UART2_UCON, samp); - - /* set GPIO18-19 to UART (UART2 TX and RX)*/ - GPIO->FUNC_SEL.GPIO_18 = 1; - GPIO->FUNC_SEL.GPIO_19 = 1; - - /* interrupt when there are this number or more bytes free in the TX buffer*/ - UART2->TXCON = 16; - - u2_head = 0; u2_tail = 0; - - /* tx and rx interrupts are enabled in the UART by default */ - /* see status register bits 13 and 14 */ - /* enable UART2 interrupts in the interrupt controller */ - enable_irq(UART2); -} From 92856d88319b7bb4a73b5c10c93bc7650ed5fafb Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Fri, 26 Oct 2012 10:49:28 -0400 Subject: [PATCH 24/25] m12 low power --- board/m12.h | 1 + src/default_lowlevel.c | 11 +++++++++++ src/default_lowlevel.h | 1 + 3 files changed, 13 insertions(+) diff --git a/board/m12.h b/board/m12.h index b3b31a064..fdd6b2d99 100644 --- a/board/m12.h +++ b/board/m12.h @@ -49,6 +49,7 @@ #define FTUNE 3 #define vreg_init buck_init +#define board_init m12_init #include #endif diff --git a/src/default_lowlevel.c b/src/default_lowlevel.c index 6150885a0..44496d279 100644 --- a/src/default_lowlevel.c +++ b/src/default_lowlevel.c @@ -58,3 +58,14 @@ void buck_init(void) { while(CRM->STATUSbits.VREG_1P8V_RDY == 0) { continue; } } +void m12_init(void) { + /* configure pullups for low power */ + GPIO->FUNC_SEL.GPIO_63 = 3; + GPIO->PAD_PU_SEL.GPIO_63 = 0; + GPIO->FUNC_SEL.SS = 3; + GPIO->PAD_PU_SEL.SS = 1; + GPIO->FUNC_SEL.VREF2H = 3; + GPIO->PAD_PU_SEL.VREF2H = 1; + GPIO->FUNC_SEL.U1RTS = 3; + GPIO->PAD_PU_SEL.U1RTS = 1; +} diff --git a/src/default_lowlevel.h b/src/default_lowlevel.h index 550fe8b59..fcdf12543 100644 --- a/src/default_lowlevel.h +++ b/src/default_lowlevel.h @@ -42,6 +42,7 @@ void default_vreg_init(void); void buck_init(void); +void m12_init(void); void uart1_init(uint16_t inc, uint16_t mod, uint8_t samp); void uart2_init(uint16_t inc, uint16_t mod, uint8_t samp); From 7bee48243cb9de7291bc1025beadda1388b4d0d8 Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Sun, 18 Nov 2012 18:07:05 -0500 Subject: [PATCH 25/25] remove old uart1_init and uart2_init prototypes --- src/default_lowlevel.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/default_lowlevel.h b/src/default_lowlevel.h index fcdf12543..f6b92e085 100644 --- a/src/default_lowlevel.h +++ b/src/default_lowlevel.h @@ -43,8 +43,6 @@ void default_vreg_init(void); void buck_init(void); void m12_init(void); -void uart1_init(uint16_t inc, uint16_t mod, uint8_t samp); -void uart2_init(uint16_t inc, uint16_t mod, uint8_t samp); void irq_register_timer_handler(int timer, void (*isr)(void));