2006-08-02 16:44:46 +02:00
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/*
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* Copyright (c) 2006, Swedish Institute of Computer Science
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2007-11-10 21:45:29 +01:00
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* All rights reserved.
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2006-08-02 16:44:46 +02:00
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*
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2007-11-10 21:45:29 +01:00
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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2006-08-02 16:44:46 +02:00
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*
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2007-11-10 21:45:29 +01:00
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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2006-08-02 16:44:46 +02:00
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*
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*/
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2007-11-10 21:45:29 +01:00
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/**
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* \file
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* Device driver for the ST M25P80 40MHz 1Mbyte external memory.
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* \author
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* Bj<EFBFBD>rn Gr<EFBFBD>nvall <bg@sics.se>
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2006-08-02 16:44:46 +02:00
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*
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2007-11-10 21:45:29 +01:00
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* Data is written bit inverted (~-operator) to flash so that
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* unwritten data will read as zeros (UNIX style).
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2006-08-02 16:44:46 +02:00
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*/
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2011-09-11 17:18:02 +02:00
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#include "contiki.h"
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2006-08-02 16:44:46 +02:00
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#include <stdio.h>
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#include <string.h>
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#include "dev/spi.h"
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#include "dev/xmem.h"
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2008-01-21 11:28:44 +01:00
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#include "dev/watchdog.h"
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2006-08-02 16:44:46 +02:00
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2006-08-10 18:42:11 +02:00
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#if 0
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#define PRINTF(...) printf(__VA_ARGS__)
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#else
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#define PRINTF(...) do {} while (0)
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#endif
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2006-08-02 16:44:46 +02:00
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#define SPI_FLASH_INS_WREN 0x06
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#define SPI_FLASH_INS_WRDI 0x04
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#define SPI_FLASH_INS_RDSR 0x05
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#define SPI_FLASH_INS_WRSR 0x01
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#define SPI_FLASH_INS_READ 0x03
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#define SPI_FLASH_INS_FAST_READ 0x0b
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#define SPI_FLASH_INS_PP 0x02
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#define SPI_FLASH_INS_SE 0xd8
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#define SPI_FLASH_INS_BE 0xc7
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#define SPI_FLASH_INS_DP 0xb9
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#define SPI_FLASH_INS_RES 0xab
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2007-11-10 21:45:29 +01:00
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/*---------------------------------------------------------------------------*/
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2006-08-10 18:42:11 +02:00
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static void
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2006-08-02 16:44:46 +02:00
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write_enable(void)
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{
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int s;
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s = splhigh();
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SPI_FLASH_ENABLE();
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2010-06-23 12:18:05 +02:00
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SPI_WRITE(SPI_FLASH_INS_WREN);
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2006-08-02 16:44:46 +02:00
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SPI_FLASH_DISABLE();
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splx(s);
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}
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2007-11-10 21:45:29 +01:00
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/*---------------------------------------------------------------------------*/
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2006-08-02 16:44:46 +02:00
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static unsigned
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read_status_register(void)
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{
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unsigned char u;
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int s;
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s = splhigh();
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SPI_FLASH_ENABLE();
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2010-06-23 12:18:05 +02:00
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SPI_WRITE(SPI_FLASH_INS_RDSR);
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2006-08-02 16:44:46 +02:00
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2010-06-23 12:18:05 +02:00
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SPI_FLUSH();
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SPI_READ(u);
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2006-08-02 16:44:46 +02:00
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SPI_FLASH_DISABLE();
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splx(s);
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return u;
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}
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2007-11-10 21:45:29 +01:00
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/*---------------------------------------------------------------------------*/
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2006-08-02 16:44:46 +02:00
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/*
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2006-08-10 18:42:11 +02:00
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* Wait for a write/erase operation to finish.
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2006-08-02 16:44:46 +02:00
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*/
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static unsigned
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2006-08-10 18:42:11 +02:00
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wait_ready(void)
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2006-08-02 16:44:46 +02:00
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{
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unsigned u;
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do {
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u = read_status_register();
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2011-01-18 15:03:55 +01:00
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watchdog_periodic();
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2006-08-02 16:44:46 +02:00
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} while(u & 0x01); /* WIP=1, write in progress */
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return u;
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}
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2007-11-10 21:45:29 +01:00
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/*---------------------------------------------------------------------------*/
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2006-08-02 16:44:46 +02:00
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/*
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2006-08-10 18:42:11 +02:00
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* Erase 64k bytes of data. It takes about 1s before WIP goes low!
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2006-08-02 16:44:46 +02:00
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*/
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static void
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2008-07-04 01:12:10 +02:00
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erase_sector(unsigned long offset)
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2006-08-02 16:44:46 +02:00
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{
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int s;
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2011-01-18 15:03:55 +01:00
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wait_ready();
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2006-08-02 16:44:46 +02:00
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write_enable();
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s = splhigh();
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SPI_FLASH_ENABLE();
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2010-06-23 12:18:05 +02:00
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SPI_WRITE_FAST(SPI_FLASH_INS_SE);
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SPI_WRITE_FAST(offset >> 16); /* MSB */
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SPI_WRITE_FAST(offset >> 8);
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SPI_WRITE_FAST(offset >> 0); /* LSB */
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2009-09-07 13:31:26 +02:00
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SPI_WAITFORTx_ENDED();
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2006-08-02 16:44:46 +02:00
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SPI_FLASH_DISABLE();
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splx(s);
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}
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2007-11-10 21:45:29 +01:00
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/*---------------------------------------------------------------------------*/
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2006-08-02 16:44:46 +02:00
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/*
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* Initialize external flash *and* SPI bus!
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*/
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void
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xmem_init(void)
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{
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2010-10-13 00:55:11 +02:00
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int s;
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2006-08-02 16:44:46 +02:00
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spi_init();
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P4DIR |= BV(FLASH_CS) | BV(FLASH_HOLD) | BV(FLASH_PWR);
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P4OUT |= BV(FLASH_PWR); /* P4.3 Output, turn on power! */
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2010-10-13 00:55:11 +02:00
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/* Release from Deep Power-down */
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_WRITE_FAST(SPI_FLASH_INS_RES);
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SPI_WAITFORTx_ENDED();
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2006-08-02 16:44:46 +02:00
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SPI_FLASH_DISABLE(); /* Unselect flash. */
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2010-10-13 00:55:11 +02:00
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splx(s);
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2006-08-02 16:44:46 +02:00
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SPI_FLASH_UNHOLD();
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}
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2007-11-10 21:45:29 +01:00
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/*---------------------------------------------------------------------------*/
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2006-08-02 16:44:46 +02:00
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int
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2008-07-04 01:12:10 +02:00
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xmem_pread(void *_p, int size, unsigned long offset)
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2006-08-02 16:44:46 +02:00
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{
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unsigned char *p = _p;
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const unsigned char *end = p + size;
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int s;
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2011-01-18 15:03:55 +01:00
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2006-08-10 18:42:11 +02:00
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wait_ready();
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2006-08-02 16:44:46 +02:00
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2009-05-11 17:26:24 +02:00
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ENERGEST_ON(ENERGEST_TYPE_FLASH_READ);
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2006-08-02 16:44:46 +02:00
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s = splhigh();
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SPI_FLASH_ENABLE();
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2010-06-23 12:18:05 +02:00
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SPI_WRITE_FAST(SPI_FLASH_INS_READ);
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SPI_WRITE_FAST(offset >> 16); /* MSB */
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SPI_WRITE_FAST(offset >> 8);
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SPI_WRITE_FAST(offset >> 0); /* LSB */
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2009-09-07 13:31:26 +02:00
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SPI_WAITFORTx_ENDED();
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2006-08-02 16:44:46 +02:00
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2010-06-23 12:18:05 +02:00
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SPI_FLUSH();
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2006-08-02 16:44:46 +02:00
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for(; p < end; p++) {
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unsigned char u;
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2010-06-23 12:18:05 +02:00
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SPI_READ(u);
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2006-08-02 16:44:46 +02:00
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*p = ~u;
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}
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SPI_FLASH_DISABLE();
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splx(s);
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2009-05-11 17:26:24 +02:00
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ENERGEST_OFF(ENERGEST_TYPE_FLASH_READ);
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2006-08-02 16:44:46 +02:00
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return size;
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}
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2007-11-10 21:45:29 +01:00
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/*---------------------------------------------------------------------------*/
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2011-02-19 09:25:29 +01:00
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static const unsigned char *
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2008-07-04 01:12:10 +02:00
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program_page(unsigned long offset, const unsigned char *p, int nbytes)
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2006-08-02 16:44:46 +02:00
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{
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const unsigned char *end = p + nbytes;
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int s;
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2006-08-10 18:42:11 +02:00
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wait_ready();
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2006-08-02 16:44:46 +02:00
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write_enable();
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s = splhigh();
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SPI_FLASH_ENABLE();
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2010-06-23 12:18:05 +02:00
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SPI_WRITE_FAST(SPI_FLASH_INS_PP);
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SPI_WRITE_FAST(offset >> 16); /* MSB */
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SPI_WRITE_FAST(offset >> 8);
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SPI_WRITE_FAST(offset >> 0); /* LSB */
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2006-08-02 16:44:46 +02:00
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for(; p < end; p++) {
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2010-06-23 12:18:05 +02:00
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SPI_WRITE_FAST(~*p);
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2006-08-02 16:44:46 +02:00
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}
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2009-09-07 13:31:26 +02:00
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SPI_WAITFORTx_ENDED();
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2006-08-02 16:44:46 +02:00
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SPI_FLASH_DISABLE();
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splx(s);
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return p;
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}
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2007-11-10 21:45:29 +01:00
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/*---------------------------------------------------------------------------*/
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2006-08-02 16:44:46 +02:00
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int
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2008-07-04 01:12:10 +02:00
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xmem_pwrite(const void *_buf, int size, unsigned long addr)
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2006-08-02 16:44:46 +02:00
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{
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2006-08-10 18:42:11 +02:00
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const unsigned char *p = _buf;
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2008-07-04 01:12:10 +02:00
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const unsigned long end = addr + size;
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unsigned long i, next_page;
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2009-05-11 17:26:24 +02:00
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ENERGEST_ON(ENERGEST_TYPE_FLASH_WRITE);
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2011-01-18 15:03:55 +01:00
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2006-08-02 16:44:46 +02:00
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for(i = addr; i < end;) {
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next_page = (i | 0xff) + 1;
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2008-02-11 11:43:31 +01:00
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if(next_page > end) {
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2006-08-02 16:44:46 +02:00
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next_page = end;
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2008-02-11 11:43:31 +01:00
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}
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2006-08-10 18:42:11 +02:00
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p = program_page(i, p, next_page - i);
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2006-08-02 16:44:46 +02:00
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i = next_page;
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}
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2009-05-11 17:26:24 +02:00
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ENERGEST_OFF(ENERGEST_TYPE_FLASH_WRITE);
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2006-08-02 16:44:46 +02:00
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return size;
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}
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2007-11-10 21:45:29 +01:00
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/*---------------------------------------------------------------------------*/
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2006-08-02 16:44:46 +02:00
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int
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2008-07-04 01:12:10 +02:00
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xmem_erase(long size, unsigned long addr)
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2006-08-02 16:44:46 +02:00
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{
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2008-07-04 01:12:10 +02:00
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unsigned long end = addr + size;
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2006-08-02 16:44:46 +02:00
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if(size % XMEM_ERASE_UNIT_SIZE != 0) {
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2006-08-10 18:42:11 +02:00
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PRINTF("xmem_erase: bad size\n");
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2006-08-02 16:44:46 +02:00
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return -1;
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}
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if(addr % XMEM_ERASE_UNIT_SIZE != 0) {
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2006-08-10 18:42:11 +02:00
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PRINTF("xmem_erase: bad offset\n");
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2006-08-02 16:44:46 +02:00
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return -1;
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}
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2008-01-21 11:28:44 +01:00
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for (; addr < end; addr += XMEM_ERASE_UNIT_SIZE) {
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2006-08-10 18:42:11 +02:00
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erase_sector(addr);
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2008-01-21 11:28:44 +01:00
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}
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2006-08-02 16:44:46 +02:00
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return size;
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}
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2007-11-10 21:45:29 +01:00
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/*---------------------------------------------------------------------------*/
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