419 lines
23 KiB
C++
419 lines
23 KiB
C++
/**
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* MFRC522.h - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT.
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* Based on code Dr.Leong ( WWW.B2CQSHOP.COM )
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* Created by Miguel Balboa (circuitito.com), Jan, 2012.
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* Rewritten by Søren Thing Andersen (access.thing.dk), fall of 2013 (Translation to English, refactored, comments, anti collision, cascade levels.)
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* Extended by Tom Clement with functionality to write to sector 0 of UID changeable Mifare cards.
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* Released into the public domain.
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*
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* Please read this file for an overview and then MFRC522.cpp for comments on the specific functions.
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* Search for "mf-rc522" on ebay.com to purchase the MF-RC522 board.
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*
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* There are three hardware components involved:
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* 1) The micro controller: An Arduino
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* 2) The PCD (short for Proximity Coupling Device): NXP MFRC522 Contactless Reader IC
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* 3) The PICC (short for Proximity Integrated Circuit Card): A card or tag using the ISO 14443A interface, eg Mifare or NTAG203.
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*
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* The microcontroller and card reader uses SPI for communication.
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* The protocol is described in the MFRC522 datasheet: http://www.nxp.com/documents/data_sheet/MFRC522.pdf
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*
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* The card reader and the tags communicate using a 13.56MHz electromagnetic field.
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* The protocol is defined in ISO/IEC 14443-3 Identification cards -- Contactless integrated circuit cards -- Proximity cards -- Part 3: Initialization and anticollision".
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* A free version of the final draft can be found at http://wg8.de/wg8n1496_17n3613_Ballot_FCD14443-3.pdf
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* Details are found in chapter 6, Type A – Initialization and anticollision.
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*
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* If only the PICC UID is wanted, the above documents has all the needed information.
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* To read and write from MIFARE PICCs, the MIFARE protocol is used after the PICC has been selected.
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* The MIFARE Classic chips and protocol is described in the datasheets:
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* 1K: http://www.mouser.com/ds/2/302/MF1S503x-89574.pdf
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* 4K: http://datasheet.octopart.com/MF1S7035DA4,118-NXP-Semiconductors-datasheet-11046188.pdf
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* Mini: http://www.idcardmarket.com/download/mifare_S20_datasheet.pdf
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* The MIFARE Ultralight chip and protocol is described in the datasheets:
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* Ultralight: http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf
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* Ultralight C: http://www.nxp.com/documents/short_data_sheet/MF0ICU2_SDS.pdf
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*
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* MIFARE Classic 1K (MF1S503x):
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* Has 16 sectors * 4 blocks/sector * 16 bytes/block = 1024 bytes.
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* The blocks are numbered 0-63.
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* Block 3 in each sector is the Sector Trailer. See http://www.mouser.com/ds/2/302/MF1S503x-89574.pdf sections 8.6 and 8.7:
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* Bytes 0-5: Key A
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* Bytes 6-8: Access Bits
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* Bytes 9: User data
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* Bytes 10-15: Key B (or user data)
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* Block 0 is read-only manufacturer data.
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* To access a block, an authentication using a key from the block's sector must be performed first.
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* Example: To read from block 10, first authenticate using a key from sector 3 (blocks 8-11).
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* All keys are set to FFFFFFFFFFFFh at chip delivery.
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* Warning: Please read section 8.7 "Memory Access". It includes this text: if the PICC detects a format violation the whole sector is irreversibly blocked.
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* To use a block in "value block" mode (for Increment/Decrement operations) you need to change the sector trailer. Use PICC_SetAccessBits() to calculate the bit patterns.
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* MIFARE Classic 4K (MF1S703x):
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* Has (32 sectors * 4 blocks/sector + 8 sectors * 16 blocks/sector) * 16 bytes/block = 4096 bytes.
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* The blocks are numbered 0-255.
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* The last block in each sector is the Sector Trailer like above.
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* MIFARE Classic Mini (MF1 IC S20):
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* Has 5 sectors * 4 blocks/sector * 16 bytes/block = 320 bytes.
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* The blocks are numbered 0-19.
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* The last block in each sector is the Sector Trailer like above.
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*
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* MIFARE Ultralight (MF0ICU1):
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* Has 16 pages of 4 bytes = 64 bytes.
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* Pages 0 + 1 is used for the 7-byte UID.
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* Page 2 contains the last check digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
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* Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
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* Pages 4-15 are read/write unless blocked by the lock bytes in page 2.
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* MIFARE Ultralight C (MF0ICU2):
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* Has 48 pages of 4 bytes = 192 bytes.
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* Pages 0 + 1 is used for the 7-byte UID.
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* Page 2 contains the last check digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
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* Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
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* Pages 4-39 are read/write unless blocked by the lock bytes in page 2.
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* Page 40 Lock bytes
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* Page 41 16 bit one way counter
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* Pages 42-43 Authentication configuration
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* Pages 44-47 Authentication key
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*/
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#ifndef MFRC522_h
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#define MFRC522_h
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#include <Arduino.h>
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#include <SPI.h>
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// Firmware data for self-test
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// Reference values based on firmware version
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// Hint: if needed, you can remove unused self-test data to save flash memory
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//
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// Version 0.0 (0x90)
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// Philips Semiconductors; Preliminary Specification Revision 2.0 - 01 August 2005; 16.1 self-test
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const byte MFRC522_firmware_referenceV0_0[] PROGMEM = {
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0x00, 0x87, 0x98, 0x0f, 0x49, 0xFF, 0x07, 0x19,
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0xBF, 0x22, 0x30, 0x49, 0x59, 0x63, 0xAD, 0xCA,
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0x7F, 0xE3, 0x4E, 0x03, 0x5C, 0x4E, 0x49, 0x50,
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0x47, 0x9A, 0x37, 0x61, 0xE7, 0xE2, 0xC6, 0x2E,
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0x75, 0x5A, 0xED, 0x04, 0x3D, 0x02, 0x4B, 0x78,
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0x32, 0xFF, 0x58, 0x3B, 0x7C, 0xE9, 0x00, 0x94,
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0xB4, 0x4A, 0x59, 0x5B, 0xFD, 0xC9, 0x29, 0xDF,
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0x35, 0x96, 0x98, 0x9E, 0x4F, 0x30, 0x32, 0x8D
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};
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// Version 1.0 (0x91)
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// NXP Semiconductors; Rev. 3.8 - 17 September 2014; 16.1.1 self-test
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const byte MFRC522_firmware_referenceV1_0[] PROGMEM = {
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0x00, 0xC6, 0x37, 0xD5, 0x32, 0xB7, 0x57, 0x5C,
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0xC2, 0xD8, 0x7C, 0x4D, 0xD9, 0x70, 0xC7, 0x73,
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0x10, 0xE6, 0xD2, 0xAA, 0x5E, 0xA1, 0x3E, 0x5A,
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0x14, 0xAF, 0x30, 0x61, 0xC9, 0x70, 0xDB, 0x2E,
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0x64, 0x22, 0x72, 0xB5, 0xBD, 0x65, 0xF4, 0xEC,
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0x22, 0xBC, 0xD3, 0x72, 0x35, 0xCD, 0xAA, 0x41,
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0x1F, 0xA7, 0xF3, 0x53, 0x14, 0xDE, 0x7E, 0x02,
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0xD9, 0x0F, 0xB5, 0x5E, 0x25, 0x1D, 0x29, 0x79
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};
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// Version 2.0 (0x92)
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// NXP Semiconductors; Rev. 3.8 - 17 September 2014; 16.1.1 self-test
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const byte MFRC522_firmware_referenceV2_0[] PROGMEM = {
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0x00, 0xEB, 0x66, 0xBA, 0x57, 0xBF, 0x23, 0x95,
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0xD0, 0xE3, 0x0D, 0x3D, 0x27, 0x89, 0x5C, 0xDE,
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0x9D, 0x3B, 0xA7, 0x00, 0x21, 0x5B, 0x89, 0x82,
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0x51, 0x3A, 0xEB, 0x02, 0x0C, 0xA5, 0x00, 0x49,
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0x7C, 0x84, 0x4D, 0xB3, 0xCC, 0xD2, 0x1B, 0x81,
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0x5D, 0x48, 0x76, 0xD5, 0x71, 0x61, 0x21, 0xA9,
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0x86, 0x96, 0x83, 0x38, 0xCF, 0x9D, 0x5B, 0x6D,
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0xDC, 0x15, 0xBA, 0x3E, 0x7D, 0x95, 0x3B, 0x2F
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};
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// Clone
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// Fudan Semiconductor FM17522 (0x88)
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const byte FM17522_firmware_reference[] PROGMEM = {
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0x00, 0xD6, 0x78, 0x8C, 0xE2, 0xAA, 0x0C, 0x18,
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0x2A, 0xB8, 0x7A, 0x7F, 0xD3, 0x6A, 0xCF, 0x0B,
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0xB1, 0x37, 0x63, 0x4B, 0x69, 0xAE, 0x91, 0xC7,
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0xC3, 0x97, 0xAE, 0x77, 0xF4, 0x37, 0xD7, 0x9B,
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0x7C, 0xF5, 0x3C, 0x11, 0x8F, 0x15, 0xC3, 0xD7,
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0xC1, 0x5B, 0x00, 0x2A, 0xD0, 0x75, 0xDE, 0x9E,
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0x51, 0x64, 0xAB, 0x3E, 0xE9, 0x15, 0xB5, 0xAB,
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0x56, 0x9A, 0x98, 0x82, 0x26, 0xEA, 0x2A, 0x62
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};
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class MFRC522 {
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public:
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// MFRC522 registers. Described in chapter 9 of the datasheet.
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// When using SPI all addresses are shifted one bit left in the "SPI address byte" (section 8.1.2.3)
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enum PCD_Register {
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// Page 0: Command and status
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// 0x00 // reserved for future use
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CommandReg = 0x01 << 1, // starts and stops command execution
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ComIEnReg = 0x02 << 1, // enable and disable interrupt request control bits
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DivIEnReg = 0x03 << 1, // enable and disable interrupt request control bits
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ComIrqReg = 0x04 << 1, // interrupt request bits
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DivIrqReg = 0x05 << 1, // interrupt request bits
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ErrorReg = 0x06 << 1, // error bits showing the error status of the last command executed
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Status1Reg = 0x07 << 1, // communication status bits
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Status2Reg = 0x08 << 1, // receiver and transmitter status bits
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FIFODataReg = 0x09 << 1, // input and output of 64 byte FIFO buffer
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FIFOLevelReg = 0x0A << 1, // number of bytes stored in the FIFO buffer
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WaterLevelReg = 0x0B << 1, // level for FIFO underflow and overflow warning
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ControlReg = 0x0C << 1, // miscellaneous control registers
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BitFramingReg = 0x0D << 1, // adjustments for bit-oriented frames
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CollReg = 0x0E << 1, // bit position of the first bit-collision detected on the RF interface
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// 0x0F // reserved for future use
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// Page 1: Command
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// 0x10 // reserved for future use
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ModeReg = 0x11 << 1, // defines general modes for transmitting and receiving
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TxModeReg = 0x12 << 1, // defines transmission data rate and framing
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RxModeReg = 0x13 << 1, // defines reception data rate and framing
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TxControlReg = 0x14 << 1, // controls the logical behavior of the antenna driver pins TX1 and TX2
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TxASKReg = 0x15 << 1, // controls the setting of the transmission modulation
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TxSelReg = 0x16 << 1, // selects the internal sources for the antenna driver
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RxSelReg = 0x17 << 1, // selects internal receiver settings
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RxThresholdReg = 0x18 << 1, // selects thresholds for the bit decoder
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DemodReg = 0x19 << 1, // defines demodulator settings
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// 0x1A // reserved for future use
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// 0x1B // reserved for future use
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MfTxReg = 0x1C << 1, // controls some MIFARE communication transmit parameters
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MfRxReg = 0x1D << 1, // controls some MIFARE communication receive parameters
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// 0x1E // reserved for future use
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SerialSpeedReg = 0x1F << 1, // selects the speed of the serial UART interface
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// Page 2: Configuration
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// 0x20 // reserved for future use
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CRCResultRegH = 0x21 << 1, // shows the MSB and LSB values of the CRC calculation
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CRCResultRegL = 0x22 << 1,
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// 0x23 // reserved for future use
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ModWidthReg = 0x24 << 1, // controls the ModWidth setting?
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// 0x25 // reserved for future use
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RFCfgReg = 0x26 << 1, // configures the receiver gain
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GsNReg = 0x27 << 1, // selects the conductance of the antenna driver pins TX1 and TX2 for modulation
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CWGsPReg = 0x28 << 1, // defines the conductance of the p-driver output during periods of no modulation
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ModGsPReg = 0x29 << 1, // defines the conductance of the p-driver output during periods of modulation
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TModeReg = 0x2A << 1, // defines settings for the internal timer
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TPrescalerReg = 0x2B << 1, // the lower 8 bits of the TPrescaler value. The 4 high bits are in TModeReg.
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TReloadRegH = 0x2C << 1, // defines the 16-bit timer reload value
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TReloadRegL = 0x2D << 1,
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TCounterValueRegH = 0x2E << 1, // shows the 16-bit timer value
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TCounterValueRegL = 0x2F << 1,
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// Page 3: Test Registers
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// 0x30 // reserved for future use
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TestSel1Reg = 0x31 << 1, // general test signal configuration
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TestSel2Reg = 0x32 << 1, // general test signal configuration
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TestPinEnReg = 0x33 << 1, // enables pin output driver on pins D1 to D7
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TestPinValueReg = 0x34 << 1, // defines the values for D1 to D7 when it is used as an I/O bus
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TestBusReg = 0x35 << 1, // shows the status of the internal test bus
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AutoTestReg = 0x36 << 1, // controls the digital self-test
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VersionReg = 0x37 << 1, // shows the software version
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AnalogTestReg = 0x38 << 1, // controls the pins AUX1 and AUX2
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TestDAC1Reg = 0x39 << 1, // defines the test value for TestDAC1
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TestDAC2Reg = 0x3A << 1, // defines the test value for TestDAC2
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TestADCReg = 0x3B << 1 // shows the value of ADC I and Q channels
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// 0x3C // reserved for production tests
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// 0x3D // reserved for production tests
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// 0x3E // reserved for production tests
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// 0x3F // reserved for production tests
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};
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// MFRC522 commands. Described in chapter 10 of the datasheet.
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enum PCD_Command {
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PCD_Idle = 0x00, // no action, cancels current command execution
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PCD_Mem = 0x01, // stores 25 bytes into the internal buffer
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PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number
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PCD_CalcCRC = 0x03, // activates the CRC coprocessor or performs a self-test
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PCD_Transmit = 0x04, // transmits data from the FIFO buffer
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PCD_NoCmdChange = 0x07, // no command change, can be used to modify the CommandReg register bits without affecting the command, for example, the PowerDown bit
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PCD_Receive = 0x08, // activates the receiver circuits
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PCD_Transceive = 0x0C, // transmits data from FIFO buffer to antenna and automatically activates the receiver after transmission
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PCD_MFAuthent = 0x0E, // performs the MIFARE standard authentication as a reader
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PCD_SoftReset = 0x0F // resets the MFRC522
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};
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// MFRC522 RxGain[2:0] masks, defines the receiver's signal voltage gain factor (on the PCD).
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// Described in 9.3.3.6 / table 98 of the datasheet at http://www.nxp.com/documents/data_sheet/MFRC522.pdf
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enum PCD_RxGain {
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RxGain_18dB = 0x00 << 4, // 000b - 18 dB, minimum
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RxGain_23dB = 0x01 << 4, // 001b - 23 dB
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RxGain_18dB_2 = 0x02 << 4, // 010b - 18 dB, it seems 010b is a duplicate for 000b
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RxGain_23dB_2 = 0x03 << 4, // 011b - 23 dB, it seems 011b is a duplicate for 001b
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RxGain_33dB = 0x04 << 4, // 100b - 33 dB, average, and typical default
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RxGain_38dB = 0x05 << 4, // 101b - 38 dB
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RxGain_43dB = 0x06 << 4, // 110b - 43 dB
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RxGain_48dB = 0x07 << 4, // 111b - 48 dB, maximum
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RxGain_min = 0x00 << 4, // 000b - 18 dB, minimum, convenience for RxGain_18dB
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RxGain_avg = 0x04 << 4, // 100b - 33 dB, average, convenience for RxGain_33dB
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RxGain_max = 0x07 << 4 // 111b - 48 dB, maximum, convenience for RxGain_48dB
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};
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// Commands sent to the PICC.
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enum PICC_Command {
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// The commands used by the PCD to manage communication with several PICCs (ISO 14443-3, Type A, section 6.4)
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PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
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PICC_CMD_WUPA = 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
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PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used during anti collision.
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PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1
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PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 2
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PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 3
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PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC to go to state HALT.
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// The commands used for MIFARE Classic (from http://www.mouser.com/ds/2/302/MF1S503x-89574.pdf, Section 9)
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// Use PCD_MFAuthent to authenticate access to a sector, then use these commands to read/write/modify the blocks on the sector.
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// The read/write commands can also be used for MIFARE Ultralight.
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PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A
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PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B
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PICC_CMD_MF_READ = 0x30, // Reads one 16 byte block from the authenticated sector of the PICC. Also used for MIFARE Ultralight.
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PICC_CMD_MF_WRITE = 0xA0, // Writes one 16 byte block to the authenticated sector of the PICC. Called "COMPATIBILITY WRITE" for MIFARE Ultralight.
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PICC_CMD_MF_DECREMENT = 0xC0, // Decrements the contents of a block and stores the result in the internal data register.
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PICC_CMD_MF_INCREMENT = 0xC1, // Increments the contents of a block and stores the result in the internal data register.
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PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the internal data register.
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PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal data register to a block.
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// The commands used for MIFARE Ultralight (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
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// The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for MIFARE Ultralight.
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PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 byte page to the PICC.
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};
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// MIFARE constants that does not fit anywhere else
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enum MIFARE_Misc {
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MF_ACK = 0xA, // The MIFARE Classic uses a 4 bit ACK/NAK. Any other value than 0xA is NAK.
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MF_KEY_SIZE = 6 // A Mifare Crypto1 key is 6 bytes.
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};
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// PICC types we can detect. Remember to update PICC_GetTypeName() if you add more.
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// last value set to 0xff, then compiler uses less ram, it seems some optimisations are triggered
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enum PICC_Type : byte {
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PICC_TYPE_UNKNOWN ,
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PICC_TYPE_ISO_14443_4 , // PICC compliant with ISO/IEC 14443-4
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PICC_TYPE_ISO_18092 , // PICC compliant with ISO/IEC 18092 (NFC)
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PICC_TYPE_MIFARE_MINI , // MIFARE Classic protocol, 320 bytes
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PICC_TYPE_MIFARE_1K , // MIFARE Classic protocol, 1KB
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PICC_TYPE_MIFARE_4K , // MIFARE Classic protocol, 4KB
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PICC_TYPE_MIFARE_UL , // MIFARE Ultralight or Ultralight C
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PICC_TYPE_MIFARE_PLUS , // MIFARE Plus
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PICC_TYPE_TNP3XXX , // Only mentioned in NXP AN 10833 MIFARE Type Identification Procedure
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PICC_TYPE_NOT_COMPLETE = 0xff // SAK indicates UID is not complete.
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};
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// Return codes from the functions in this class. Remember to update GetStatusCodeName() if you add more.
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// last value set to 0xff, then compiler uses less ram, it seems some optimisations are triggered
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enum StatusCode : byte {
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STATUS_OK , // Success
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STATUS_ERROR , // Error in communication
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STATUS_COLLISION , // Collission detected
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STATUS_TIMEOUT , // Timeout in communication.
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STATUS_NO_ROOM , // A buffer is not big enough.
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STATUS_INTERNAL_ERROR , // Internal error in the code. Should not happen ;-)
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STATUS_INVALID , // Invalid argument.
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STATUS_CRC_WRONG , // The CRC_A does not match
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STATUS_MIFARE_NACK = 0xff // A MIFARE PICC responded with NAK.
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};
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// A struct used for passing the UID of a PICC.
|
||
typedef struct {
|
||
byte size; // Number of bytes in the UID. 4, 7 or 10.
|
||
byte uidByte[10];
|
||
byte sak; // The SAK (Select acknowledge) byte returned from the PICC after successful selection.
|
||
} Uid;
|
||
|
||
// A struct used for passing a MIFARE Crypto1 key
|
||
typedef struct {
|
||
byte keyByte[MF_KEY_SIZE];
|
||
} MIFARE_Key;
|
||
|
||
// Member variables
|
||
Uid uid; // Used by PICC_ReadCardSerial().
|
||
|
||
// Size of the MFRC522 FIFO
|
||
static const byte FIFO_SIZE = 64; // The FIFO is 64 bytes.
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Functions for setting up the Arduino
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
MFRC522();
|
||
MFRC522(byte resetPowerDownPin);
|
||
MFRC522(byte chipSelectPin, byte resetPowerDownPin);
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Basic interface functions for communicating with the MFRC522
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
void PCD_WriteRegister(byte reg, byte value);
|
||
void PCD_WriteRegister(byte reg, byte count, byte *values);
|
||
byte PCD_ReadRegister(byte reg);
|
||
void PCD_ReadRegister(byte reg, byte count, byte *values, byte rxAlign = 0);
|
||
void setBitMask(unsigned char reg, unsigned char mask);
|
||
void PCD_SetRegisterBitMask(byte reg, byte mask);
|
||
void PCD_ClearRegisterBitMask(byte reg, byte mask);
|
||
StatusCode PCD_CalculateCRC(byte *data, byte length, byte *result);
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Functions for manipulating the MFRC522
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
void PCD_Init();
|
||
void PCD_Init(byte resetPowerDownPin);
|
||
void PCD_Init(byte chipSelectPin, byte resetPowerDownPin);
|
||
void PCD_Reset();
|
||
void PCD_AntennaOn();
|
||
void PCD_AntennaOff();
|
||
byte PCD_GetAntennaGain();
|
||
void PCD_SetAntennaGain(byte mask);
|
||
bool PCD_PerformSelfTest();
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Functions for communicating with PICCs
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
StatusCode PCD_TransceiveData(byte *sendData, byte sendLen, byte *backData, byte *backLen, byte *validBits = NULL, byte rxAlign = 0, bool checkCRC = false);
|
||
StatusCode PCD_CommunicateWithPICC(byte command, byte waitIRq, byte *sendData, byte sendLen, byte *backData = NULL, byte *backLen = NULL, byte *validBits = NULL, byte rxAlign = 0, bool checkCRC = false);
|
||
StatusCode PICC_RequestA(byte *bufferATQA, byte *bufferSize);
|
||
StatusCode PICC_WakeupA(byte *bufferATQA, byte *bufferSize);
|
||
StatusCode PICC_REQA_or_WUPA(byte command, byte *bufferATQA, byte *bufferSize);
|
||
StatusCode PICC_Select(Uid *uid, byte validBits = 0);
|
||
StatusCode PICC_HaltA();
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Functions for communicating with MIFARE PICCs
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
StatusCode PCD_Authenticate(byte command, byte blockAddr, MIFARE_Key *key, Uid *uid);
|
||
void PCD_StopCrypto1();
|
||
StatusCode MIFARE_Read(byte blockAddr, byte *buffer, byte *bufferSize);
|
||
StatusCode MIFARE_Write(byte blockAddr, byte *buffer, byte bufferSize);
|
||
StatusCode MIFARE_Ultralight_Write(byte page, byte *buffer, byte bufferSize);
|
||
StatusCode MIFARE_Decrement(byte blockAddr, long delta);
|
||
StatusCode MIFARE_Increment(byte blockAddr, long delta);
|
||
StatusCode MIFARE_Restore(byte blockAddr);
|
||
StatusCode MIFARE_Transfer(byte blockAddr);
|
||
StatusCode MIFARE_GetValue(byte blockAddr, long *value);
|
||
StatusCode MIFARE_SetValue(byte blockAddr, long value);
|
||
StatusCode PCD_NTAG216_AUTH(byte *passWord, byte pACK[]);
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Support functions
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
StatusCode PCD_MIFARE_Transceive(byte *sendData, byte sendLen, bool acceptTimeout = false);
|
||
// old function used too much memory, now name moved to flash; if you need char, copy from flash to memory
|
||
//const char *GetStatusCodeName(byte code);
|
||
static const __FlashStringHelper *GetStatusCodeName(StatusCode code);
|
||
static PICC_Type PICC_GetType(byte sak);
|
||
// old function used too much memory, now name moved to flash; if you need char, copy from flash to memory
|
||
//const char *PICC_GetTypeName(byte type);
|
||
static const __FlashStringHelper *PICC_GetTypeName(PICC_Type type);
|
||
|
||
// Support functions for debuging
|
||
void PCD_DumpVersionToSerial();
|
||
void PICC_DumpToSerial(Uid *uid);
|
||
void PICC_DumpDetailsToSerial(Uid *uid);
|
||
void PICC_DumpMifareClassicToSerial(Uid *uid, PICC_Type piccType, MIFARE_Key *key);
|
||
void PICC_DumpMifareClassicSectorToSerial(Uid *uid, MIFARE_Key *key, byte sector);
|
||
void PICC_DumpMifareUltralightToSerial();
|
||
|
||
// Advanced functions for MIFARE
|
||
void MIFARE_SetAccessBits(byte *accessBitBuffer, byte g0, byte g1, byte g2, byte g3);
|
||
bool MIFARE_OpenUidBackdoor(bool logErrors);
|
||
bool MIFARE_SetUid(byte *newUid, byte uidSize, bool logErrors);
|
||
bool MIFARE_UnbrickUidSector(bool logErrors);
|
||
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
// Convenience functions - does not add extra functionality
|
||
/////////////////////////////////////////////////////////////////////////////////////
|
||
bool PICC_IsNewCardPresent();
|
||
bool PICC_ReadCardSerial();
|
||
|
||
private:
|
||
byte _chipSelectPin; // Arduino pin connected to MFRC522's SPI slave select input (Pin 24, NSS, active low)
|
||
byte _resetPowerDownPin; // Arduino pin connected to MFRC522's reset and power down input (Pin 6, NRSTPD, active low)
|
||
StatusCode MIFARE_TwoStepHelper(byte command, byte blockAddr, long data);
|
||
};
|
||
|
||
#endif
|