141 lines
5.5 KiB
C
141 lines
5.5 KiB
C
/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#include <mc1322x.h>
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#include <stdint.h>
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void default_vreg_init(void) {
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volatile uint32_t i;
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*CRM_SYS_CNTL = 0x00000018; /* set default state */
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*CRM_VREG_CNTL = 0x00000f04; /* bypass the buck */
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for(i=0; i<0x161a8; i++) { continue; } /* wait for the bypass to take */
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// while((((*(volatile uint32_t *)(0x80003018))>>17) & 1) !=1) { continue; } /* wait for the bypass to take */
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*CRM_VREG_CNTL = 0x00000ff8; /* start the regulators */
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}
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void uart1_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) {
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/* UART must be disabled to set the baudrate */
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UART1->CON = 0;
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UART1->BR = ( inc << 16 ) | mod;
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/* TX and CTS as outputs */
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GPIO->PAD_DIR_SET.GPIO_14 = 1;
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GPIO->PAD_DIR_SET.GPIO_16 = 1;
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/* RX and RTS as inputs */
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GPIO->PAD_DIR_RESET.GPIO_15 = 1;
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GPIO->PAD_DIR_RESET.GPIO_17 = 1;
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/* see Section 11.5.1.2 Alternate Modes */
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/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
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/* From the datasheet: "The peripheral function will control operation of the pad IF */
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/* THE PERIPHERAL IS ENABLED. */
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#if UART1_RX_BUFFERSIZE > 32
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*UART1_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
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*UART1_URXCON = 30; /* interrupt when fifo is nearly full */
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u1_rx_head = 0; u1_rx_tail = 0;
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#elif UART1_RX_BUFFERSIZE < 32 /* enable receive, transmit, flow control, disable rx interrupt */
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*UART1_UCON = (1 << 0) | (1 << 1) | (1 << 12) | (1 << 14);
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*UART1_UCTS = UART1_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
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*GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART1 CTS and RTS */
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#else
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*UART1_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
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#endif
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if(samp == UCON_SAMP_16X)
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set_bit(*UART1_UCON,UCON_SAMP);
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/* set GPIO15-14 to UART (UART1 TX and RX)*/
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GPIO->FUNC_SEL.GPIO_14 = 1;
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GPIO->FUNC_SEL.GPIO_15 = 1;
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/* interrupt when there are this number or more bytes free in the TX buffer*/
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UART1->TXCON = 16;
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u1_tx_head = 0; u1_tx_tail = 0;
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/* enable UART1 interrupts in the interrupt controller */
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enable_irq(UART1);
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}
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void uart2_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) {
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/* UART must be disabled to set the baudrate */
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UART2->CON = 0;
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UART2->BR = ( inc << 16 ) | mod;
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/* TX and CTS as outputs */
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GPIO->PAD_DIR_SET.GPIO_18 = 1;
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GPIO->PAD_DIR_SET.GPIO_20 = 1;
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/* RX and RTS as inputs */
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GPIO->PAD_DIR_RESET.GPIO_19 = 1;
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GPIO->PAD_DIR_RESET.GPIO_21 = 1;
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/* see Section 11.5.1.2 Alternate Modes */
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/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
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/* From the datasheet: "The peripheral function will control operation of the pad IF */
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/* THE PERIPHERAL IS ENABLED. */
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#if UART2_RX_BUFFERSIZE > 32
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*UART2_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
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*UART2_URXCON = 30; /* interrupt when fifo is nearly full */
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u2_rx_head = 0; u2_rx_tail = 0;
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#elif UART2_RX_BUFFERSIZE < 32 /* enable receive, transmit, disable flow control, disable rx interrupt */
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*UART2_UCON = (1 << 0) | (1 << 1) | (0 << 12) | (1 << 14);
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*UART2_UCTS = UART2_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
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*GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART2 CTS and RTS */
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#else
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*UART2_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
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#endif
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if(samp == UCON_SAMP_16X)
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set_bit(*UART2_UCON,UCON_SAMP);
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/* set GPIO15-14 to UART (UART2 TX and RX)*/
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GPIO->FUNC_SEL.GPIO_18 = 1;
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GPIO->FUNC_SEL.GPIO_19 = 1;
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/* interrupt when there are this number or more bytes free in the TX buffer*/
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UART2->TXCON = 16;
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u2_tx_head = 0; u2_tx_tail = 0;
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/* enable UART2 interrupts in the interrupt controller */
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enable_irq(UART2);
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}
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