104 lines
3.4 KiB
C
104 lines
3.4 KiB
C
/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#include <mc1322x.h>
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#include <stdint.h>
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static void (*tmr_isr_funcs[4])(void) = {
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tmr0_isr,
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tmr1_isr,
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tmr2_isr,
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tmr3_isr
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};
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void irq_register_timer_handler(int timer, void (*isr)(void))
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{
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tmr_isr_funcs[timer] = isr;
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}
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__attribute__ ((section (".irq")))
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__attribute__ ((interrupt("IRQ")))
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void irq(void)
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{
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uint32_t pending;
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while ((pending = *NIPEND)) {
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if(bit_is_set(pending, INT_NUM_TMR)) {
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/* dispatch to individual timer isrs if they exist */
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/* timer isrs are responsible for determining if they
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* caused an interrupt */
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/* and clearing their own interrupt flags */
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if (tmr_isr_funcs[0] != 0) { (tmr_isr_funcs[0])(); }
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if (tmr_isr_funcs[1] != 0) { (tmr_isr_funcs[1])(); }
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if (tmr_isr_funcs[2] != 0) { (tmr_isr_funcs[2])(); }
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if (tmr_isr_funcs[3] != 0) { (tmr_isr_funcs[3])(); }
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}
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if(bit_is_set(pending, INT_NUM_MACA)) {
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if(maca_isr != 0) { maca_isr(); }
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}
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if(bit_is_set(pending, INT_NUM_UART1)) {
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if(uart1_isr != 0) { uart1_isr(); }
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}
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if(bit_is_set(pending, INT_NUM_UART2)) {
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if(uart2_isr != 0) { uart2_isr(); }
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}
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if(bit_is_set(pending, INT_NUM_CRM)) {
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if(rtc_wu_evt() && (rtc_isr != 0)) { rtc_isr(); }
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if(kbi_evnt(4) && (kbi4_isr != 0)) { kbi4_isr(); }
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if(kbi_evnt(5) && (kbi5_isr != 0)) { kbi5_isr(); }
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if(kbi_evnt(6) && (kbi6_isr != 0)) { kbi6_isr(); }
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if(kbi_evnt(7) && (kbi7_isr != 0)) { kbi7_isr(); }
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if (CRM->STATUSbits.CAL_DONE && CRM->CAL_CNTLbits.CAL_IEN && cal_isr)
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{
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CRM->STATUSbits.CAL_DONE = 0;
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cal_isr();
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}
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}
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if(bit_is_set(pending, INT_NUM_ASM)) {
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if(asm_isr != 0) { asm_isr(); }
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}
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if (bit_is_set(pending, INT_NUM_I2C)) {
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if (i2c_isr != 0) { i2c_isr(); }
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}
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*INTFRC = 0; /* stop forcing interrupts */
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}
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}
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