Commit graph

1458 commits

Author SHA1 Message Date
Andre Guedes c9020d95e7 x86: Build release image
This patch adds support for building release images. The main difference
between release images and default images is that the former is optimized
for size while the latter is "optimized" for debugging. To build a release
image, the BUILD_RELEASE variable should be set to 1. For instance, the
following command build a release image from the hello-world application:
$ cd examples/hello-world && make TARGET=galileo BUILD_RELEASE=1

To optimize for size we use the '-Os' option from gcc. This option also
enables the strict aliasing optimization. This generates lots of warning
messages since we use the '-Wall' option and lots of code in core/net/
break the strict-aliasing rules. Some test have shown that the strict
aliasing optimization it not taking effect in the final binary. For that
reasons, this patch manually disables the optimization. Also, the release
image is stripped.

For the sake of comparison, below follows the output from 'wc' and 'size'
for both debugging (default) and release images.

Default image:
$  wc -c hello-world.galileo
71112 hello-world.galileo
$ size hello-world.galileo
   text    data     bss     dec     hex filename
  20379    1188   12808   34375    8647 hello-world.galileo

Release image:
$ wc -c hello-world.galileo
26320 hello-world.galileo
$ size hello-world.galileo
   text    data     bss     dec     hex filename
  18146    1156   12808   32110    7d6e hello-world.galileo
2015-12-21 08:06:14 -02:00
Michael LeMay 15f947fe40 x86: Add Intel Quark X1000 UART support.
This patch adds a driver that wraps the generic 16X50 UART driver with
specific support for the two Intel Quark X1000 built-in UARTs.
2015-12-21 08:06:14 -02:00
Michael LeMay 6acdf50262 x86: Add driver for MMIO-accessible 16X50 UART
This patch adds a driver for an MMIO-accessible 16X50 UART.  It
assumes that the boot firmware assigned an MMIO range to the UART.  It
operates in polled mode with FIFOs enabled.
2015-12-21 08:06:14 -02:00
Michael LeMay c5f9cefac7 x86: Add generic driver structure and associated initialization code
This patch adds a generic device driver structure with a field for
referencing an MMIO range.  It also provides a structure
initialization procedure that initializes the MMIO range field with
the value read from the PCI BAR0 register for a device.
2015-12-21 08:06:14 -02:00
Michael LeMay 2dccb55e15 x86: Add PCI support
This patch adds the pci.c and pci.h files, which support access to PCI
configuration registers through a function interface.  It defines the
PCI configuration register access I/O port addresses and the
pci_config_addr union and structure to assist in specifying addresses
of PCI configuration registers.  It also defines the PCI configuration
register identifier for PCI BAR0.

This patch also adds wrappers for 32-bit 'in' and 'out' port I/O
instructions.  They were placed in helpers.S, since they may be useful
to other modules besides just the PCI support module.
2015-12-21 08:06:14 -02:00
Michael LeMay 62fc195d0f x86: Refactor GDT initialization code
This patch refactors the GDT initialization code in more of a
self-documenting style.
2015-12-21 08:06:14 -02:00
Andre Guedes 96e50ec2c4 galileo: Fix Makefile.galileo
This patch moves the compiler and linking options related to QuarkX1000
SoC to Makefile.x86_quarkX1000 since it is more suitable. For instance,
'-m32' should be used in any platform based on QuarkX1000, not only
Galileo. The same rationale applies for the others options (e.g. -march,
mtune).
2015-12-21 08:06:14 -02:00
Andre Guedes b697646b11 x86: Cleanup Makefile.x86_common
This patch does several cleanups in Makefile.x86_common file. The
changes are described above.

1) The CFLAGNO variable was removed since it is used only to assign
   the CFLAGS variable. Also, CFLAGNO is not used outside Makefile.x86_
   common.

2) The "-I/usr/local/include" option was removed since we provide manually
   the include path from newlib in the bsp/ directory.

3) We only support building x86-based platforms on Linux so there is no
   point in setting LDFLAGS conditionally.

4) The '-export-dynamic' option was removed from LDFLAGS since we are not
    creating a dynamically linked executable.

5) Makefile.x86_quarkX1000 is the only one that includes Makefile.x86_
   common. Since it doesn't use the custom rules from Makefile.x86_
   common we remove them.
2015-12-21 08:06:14 -02:00
Andre Guedes 13bbe8a5b5 x86: Don't generate .note.gnu.build-id section
This patch adds "--build-id=none" to default LDFLAGS so
.note.gnu.build-id section is not generated. This section
contains unique identification for the built files what is
not important to us (at least at this moment).

This change simplifies all linker scripts for SoCs based on x86
(at this moment we only have Quark X1000) since we don't have to
care about it anymore.
2015-12-21 08:06:14 -02:00
Andre Guedes cb0510ebcf x86: Disable NMI while initializing RTC
According to [1], we should disable non-maskable and maskable interrupts
while initializing RTC. Otherwise, the RTC may be left in an undefined
state (non-functional) if an interrupt occurs. Currently, maskable
interrupts are already disabled, but NMI is not.

This patch adds helpers APIs to enable/disable non-maskable interrupts
(NMI) and changes rtc_init() to disable NMI while initializing the RTC.

NMI enable/disable code is legacy-PC specific therefore it was put in
driver/legacy_pc/ directory.

Regarding the RTC initialization changes, just calling nmi_disable() and
nmi_enable is not enough since NMI and RTC share the same IO port. So We
should also set the NMI_ENABLE bit while selecting the RTC_INDEX.

Additionally, the nmi_disable() call is not strictly required since we
set the NMI_ENABLE bit while selecting the RTC_INDEX. However, to make
clear hat we are disabling NMI and to improve readability (by matching
NMI disable/enable), the nmi_disable() call was purposely used.

[1] http://wiki.osdev.org/RTC
2015-12-21 08:06:14 -02:00
Andre Guedes a8849b2909 x86: Move bootstrap code and linker script to cpu/x86
This is a refactoring patch, no functionality is changed. It moves
loader.S and galileo.ld from platform/galileo/ to cpu/x86/ directory
since they seem to be more SoC-specific than platform-specific.

It also renames galileo.ld to quarkX1000.ld since it can be used by
any platform based on Quark X1000 SoC, not only Galileo.

Furthermore, this patch also renames loader.S to bootstrap_quarkX1000.S
since it is pretty much a bootstrap code to any platform based on Quark
X1000 SoC.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia 80fe1de0b1 x86: Isolate SoC specific cpu_init code
This commit turns cpu_init() into a SoC-agnostic function by
removing any SoC specific calls and isolating them into their
own SoC implementation.

We start this by isolating all IRQs initialization code from
the legacy-pc target, pic_init() and spurious IRQ7 registration,
into a new interface: irq_init() from irq.h. Future SoCs will have
to provide their own implementation of this interface.

This model is to be followed by future initialization code that
we may need to add and which is not common to all x86 SoCs.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia e4bc1a1e8c x86: Add init folder and move code accordingly
The x86/init/common/ folder holds all cpu initialization
code - idt and gdt setup, interrupts and cpu initialization.

On this folder will also sit any SoC specific implementation of
the functions called from cpu_init().
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia b2fa72bb98 x86: Break Makefile.x86 into common and pc specific ones
Now the cpu/x86/ provides a Makefile.x86_common and a
Makefile.x86_pc. The former includes the common Makefile
and adds legacy pc specific implementations (currently,
drivers only) into the building context, while the latter
has everything that defines the bootstrap of a x86 CPU.

This commit also fixes platform/galileo/ so it includes the
correct makefile - Makefile.x86_quarkX1000. Galileo uses
a Quark X1000 SoC which is not an IBM Generic PC-like CPU,
but it does provide most of a PCs peripherals through
its "Legacy Bridge". Thus, it makes sense that QuarkX1000's
Makefile includes code from the legacy_pc x86 cpu.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia 23e8090257 x86: Move available drivers into drivers/legacy_pc/
All drivers implemented so far are for chips which are only available
on legacy x86 PCs. This commit moves them into a more appropriate folder,
also making the cpu/x86/drivers/ folder ready for other x86 based SoCs.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia 9d3b9cadc4 galileo: Concentrate core implementations in platform/galileo/core/
Currently, it is common to see Contiki's core/ interfaces implementations
spread in both cpu/ and platform/. We here take one step further starting
an effort to centralize all of these in platform's code instead.

This commit starts this by adding platform/galileo/core/ and its sys/
subfolder, adding a stubbed mtarch.h and moving clock and rtimer
implementations to this new folder. From now on we should concentrate
implementation from Contiki's core/ interfaces into the appropriate
subfolder in platform/galileo/core/.

Note that this is not the current fashion followed on other platforms
and cpus folders, as most of them add the core interface implementation
into its subfolder directly. For instance, on CC2538DK,
core/dev/button-sensor.h is implemented in platform/cc2538dk/dev/
directly, while on Galileo it would sit at platform/galileo/core/dev/.
We believe ours is a better approach to organize and escalate a
platform's code base.

We also remove previous x86 mtarch.h and mtarch.c since they weren't used
at all - both native and cooja platforms have their own mtarch
implementations.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia 3b01e04379 x86: Add a fake IRQ7 handler to avoid spurious interrupts
The 8259a PIC has a well known problem of generating flaky
IRQ7 interrupts. The correct solution is to always check
if an IRQ7 interrupt is real or not by probing the PIC's ISR
register. This check is only mandatory if the IRQ7 is actually
being used by the system. More importantly, the handler should
NEVER send and EOI if the interrupt was spurious.

This patch addresses this issue by implementing a fake empty
handler for this IRQ and, as stated, NOT sending the EOI.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia afd9b5b0b7 x86: Add APIs to 8259 PIC driver
This commit implements pic_eoi(int irq) and a helper macro PIC_INT(irq).
This first checks which PICs should be 'acked' given an IRQ number, while
the macro returns the actual system interrupt number for the IRQ according
to the offset used on the PIC initialization.
2015-12-21 08:06:14 -02:00
Andre Guedes 826ff7cb29 x86: Add pic_unmask_irq() helper
This patch implements the pic_unmask_irq() helper and uses it where
applicable. This function zeros the corresponding bit from the IRQ
number in IMR register.

This patch doesn't implement the pic_mask_irq() helper since it is not
useful at this moment.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia d70f67cd60 galileo: Add PIT driver
This patch adds a driver for the 8254 Programmable Interrupt Timer (PIT).
The driver introduced by this patch programs the PIT to generate interrupt
periodically. The interrupt frequency can be configured by the user.

On each PIT interrupt, a callback configured by the user is called. As
expected, that callback is executed in interrupt context so the user
should be aware of what it is not supposed to do (e.g. to call blocking
functions).

Issues marked as FIXME are all related to missing APIs on the PIC driver
so they will be addressed by a future commit.
2015-12-21 08:06:14 -02:00
Andre Guedes 5f47bafc6a x86: Add Real-Time Clock Driver
This patch adds a driver for Real-Time Clock (RTC). The RTC timer is
suitable to implement some operating system features such as the
system clock. Actually, the RTC will be used to implement the system
clock in galileo platform.

The driver introduced by this patch programs the RTC to generate
interrupt periodically. The interrupt frequency can be configured by the
user. On each RTC interrupt, a callback configured by the user is called.
As expected, that callback is executed in interrupt context so the user
should be aware of what it is not supposed to do (e.g. to call blocking
functions).

This patch also adds the inb() helper function to helpers.h. The helpers
is a wrapper for assembly 'in' instruction.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia 11098501d8 x86: Initialize the 8259 PIC
The Programmable Interrupt Controller is a chip responsible for
translating hardware interrupts to system interrupts. When it
receives an Interrupt Request (IRQ), it triggers the appropriate
interrupt line reaching the appropriate IDT gate, following a
previously setup offset.

There are 2 daisy-chained PICs. PIC1 handles IRQs 0-7 and PIC2
handles IRQs 8-15. If no vector offset is set, an IRQ0, for instance,
would trigger the interrupt 0, clashing with the "Division by zero exception"
handler. Thus the IRQs must be remapped.

This patch implements the PICs initialization through their 4
Initialization Command Words (ICWs) in a very "canonical" way:
- ICW1: the initializing command;
- ICW2: the vector offset for the PIC1 and PIC2 (we add an offset of 32 positions);
- ICW3: the inter-PICs wiring setup (we connect PIC2 to PIC1's IRQ2);
- ICW4: extra systems information (we set PIC1 as Master and PIC2 as slave).

It then masks the Interrupt Mask Register, blocking all IRQs but #2 initially.
These must be unmasked on demand. The IMR is 8-bits long, so setting the n^th bit to 1
would DISABLE the IRQ n while setting it to 0 would ENABLE IRQ n.

As stated, this is an implementation of the legacy 8259 PIC. More
investigation is needed so we decide if it is enough or if we need
the (newer) APIC implementation instead.

This patch also adds the outb() helper function to helpers.h. The helpers
is a wrapper for assembly 'out' instruction.

Finally, since we now properly support hardware interrupts, this patch
also enables IRQs in platform main().

More information:
- Quark X1000 Datasheet, section 21.12, page 898.
- http://wiki.osdev.org/8259_PIC
- http://stanislavs.org/helppc/8259.html
2015-12-21 08:06:14 -02:00
Andre Guedes 604538ed62 x86: Set interrupt handler for Double Fault exception
This patch sets an interrupt handler for Double Fault exception during
CPU initialization. In case such exception is raised, we halt the system.
This way, we avoid the system to triple fault (due to an unhandled
interrupt for instance), leaving no trace about what cause the triple
fault.
2015-12-21 08:06:14 -02:00
Andre Guedes e28f400e0c x86: Introduce interrupt.h
This patch introduces the interrupt.h header file which provides some
helper macros to set a interrupt handler and disable/enable maskable
hardware interrupts.

Since there is no easy way to write an Interrupt Service Routines
(ISR) in C (for further information on this, see [1]), we introduce
the SET_INTERRUPT_HANDLER helper macro.

The macro does two things:
1) Defines an assembly trampolin to a C function that will, indeed,
   handle the interrupt.
2) Sets the corresponding interrupt gate descriptor in IDT.

The macro usage is pretty straightforward. The macro is defined as
SET_INTERRUPT_HANDLER(num, has_error_code, handler) where:
@num:             Interrupt number (0-255)
@has_error_code:  0 if processor doesn't push error code onto the
                  stack. Otherwise, set this argument to 1.
@handler:         Pointer to function that should be called once the
                  interrupt is raised. In case has_error_code == 0
                  the function prototype should be the following:
                  void handler(void)
                  Otherwise, it should be:
                  void handler(struct interrupt_context context)

For instance, let's say we want to set a handler for a device interrupt
(for example, interrupt number 101). Remember, hardware interrupts don't
have error code. So we should have something like this:

void interrupt_handler(void)
{
        /* Handling code here */
}

void my_device_init(void)
{
        ...

        SET_INTERRUPT_HANDLER(101, 0, interrupt_handler);

        ...
}

Now, let's say we want to set an interrupt handler for Page Fault
(interrupt number 14). Some exceptions, such as Page Fault, pushes an
error code onto the stack and may require registers values in order
to be properly be handled. Thus, the code should look like this:

void pagefault_handler(struct interrupt_context context)
{
        /* Handling code here */
}

void init_memory(void)
{
        ...

        SET_INTERRUPT_HANDLER(14, 1, pagefault_handler);

        ...
}

For further information about exceptions and error code, refer to Intel
Combined Manual, Vol. 3, Sections 6.3 and 6.13.

Finally, we don't define any API to unregister interrupt handlers since
we believe that it wouldn't be useful at all, at least at this moment.
Considering Contiki's context, interrupt handler registration is pretty
"static" and defined at compile-time by platform code (or the device
drivers used by the platform).

[1] http://wiki.osdev.org/Interrupt_Service_Routines
2015-12-21 08:06:14 -02:00
Andre Guedes f6644d9208 x86: CPU Initialization
This patch defines the cpu_init() function which should encapsulate
all code related to x86 CPU initialization. For now, this function
initializes GDT and IDT.
2015-12-21 08:06:14 -02:00
Andre Guedes 13d92cf67a x86: Initialize Interrupt Descriptor Table
This patch adds code to handle Interrupt Descriptor Table (IDT)
initialization. The IDT is initialized with null descriptors
therefore any interrupt at this point will cause a triple fault.
The IDT initialization is part of x86 CPU initialization.

Strictly speaking, there is no need to use attribute packed in struct
intr_gate_desc however we use it for readability reasons.
2015-12-21 08:06:14 -02:00
Andre Guedes b8feaea30d x86: Add helpers.h
This patch adds the helpers.h. This file should contain only x86-related
helper functions and macros. For now, we define the BIT macro and halt()
helpers which will be used in upcoming patches.

Additionally, this patch also changes loader.S to call the halt().
2015-12-21 08:06:14 -02:00
Andre Guedes 41bca35c1e x86: Initialize Global Descriptor Table
This patch adds code to initialize the Global Descriptor Table. For
simplicity, the memory is organized following the flat model. Thus,
memory appears to Contiki as a single, continuous address space. Code,
data, and stack are all contained in this address space (so called
linear address space).

The macros to manipulate bits from segment descriptor and the
set_descriptor() helper are based on the ones described in [1].

[1] http://wiki.osdev.org/GDT_Tutorial
2015-12-21 08:06:14 -02:00
Andre Guedes 7e13081776 galileo: Print elf sections sizes after build
This patch changes Galileo's buildsystem to print the elf sections
sizes after a new image is built. This way we can easily track how
these sections increase or decrease after any change.

To achieve that, we define a custom linking rule which is pretty much
the same as the default linking rule define in Makefile.include, but
we run 'size' command after the image is built.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia 3a26d9dbc7 x86: Only add elfloader-x86.c to the platforms using it
Currently there are only one platform using CPU x86: Cooja. The
elfloader-x86.c is rather a POSIX implementation, so the Galileo port
won't use it for now. This patch fixes this by moving this source file to
be included by the platforms using it instead of the cpu's Makefile.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia 5a0e2a7654 x86: Fix missing include warning due to memset usage 2015-12-21 08:06:14 -02:00
Andreas Dröscher 31230a856e Implement generic Newlib syscalls 2015-12-16 19:50:49 +01:00
Antonio Lignan af35e04ad7 Merge pull request #1419 from bthebaudeau/cc2538-pwm-lpm-register-peripheral
cc2538: pwm: Fix clock and automatically disable PM1+ if running
2015-12-14 02:25:54 -06:00
Benoît Thébaudeau 4a6e19ed38 cc2538: pwm: Automatically disable PM1+ if running
The peripheral core clocks of the PWM timers are gated in PM1+, so these
power modes must be disabled if a PWM timer is running. Use
lpm_register_peripheral() to handle this automatically and dynamically.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-12-13 02:39:55 +01:00
Benoît Thébaudeau 9c6d9a7fe0 cc2538: pwm: Fix clock
The peripheral core clock of the general-purpose timers used by the PWM
driver is the system clock, not the I/O clock.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-12-13 02:39:39 +01:00
Benoît Thébaudeau 5b1457e4ab cc2538: Fix stack alignment
According to the Procedure Call Standard for the ARM Architecture
(AAPCS) - ABI r2.09 [1], §5.2.1.2, the stack pointer must be
double-word-aligned at a public interface. The stack implementation
being full-descending, this requires that the top of stack be
double-word-aligned too.

[1] http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-12-12 22:33:05 +01:00
Simon Duquennoy 4302e23ddc Merge pull request #1285 from simonduq/pr/tsch
TSCH + Basic 6TiSCH
2015-12-07 14:29:10 +01:00
Benoît Thébaudeau 648b6926b5 Merge pull request #1102 from bthebaudeau/cc2538-build-without-contiki-target-library
cc2538: Build without the Contiki target library
2015-12-05 00:42:31 +01:00
Benoît Thébaudeau 6166693a11 Merge pull request #1133 from bkozak-scanimetrics/cc-gcc
put gcc specific stuff into seperate .h
2015-12-05 00:39:59 +01:00
Simon Duquennoy 20c97367a9 Adding definitions required for TSCH to the sky and z1 platforms 2015-12-04 15:21:53 +01:00
George Oikonomou 27835eee2c Merge pull request #1399 from alignan/pull/pwm-driver
Added PWM driver for the Zolertia Zoul module and CC2538 platforms
2015-12-02 15:39:52 +00:00
Simon Duquennoy ebc8d9fb1c Merge pull request #1344 from tsparber/fix-doxygen
doxygen: Fixed all warnings
2015-11-30 22:07:15 +01:00
Antonio Lignan e47b309536 Added note in PWM driver and example about PM0 2015-11-30 09:43:35 +01:00
Nicolas Tsiftes 6def22b3c5 Merge pull request #1376 from sumanpanchal/wismote-uart1-dma
Wismote : Direct memory access using UART.
2015-11-26 11:08:43 +01:00
Antonio Lignan 37fcb927be Added PWM driver for the Zolertia Zoul module and CC2538 platforms 2015-11-25 23:56:29 +01:00
Marco Grella e47c69c170 Merge remote-tracking branch 'upstream/master' into stm32nucleo-spirit1 2015-11-25 12:36:01 +01:00
George Oikonomou 41ea0308a3 Merge pull request #1390 from tsparber/fix-doxygen-whitespace
Cleanup some trailing spaces and convert tabs to spaces
2015-11-22 11:53:01 +00:00
Antonio Lignan 6e481d56fa Merge pull request #1162 from bthebaudeau/cc2538-add-coffee
cc2538: Add support for Coffee
2015-11-21 07:51:32 +01:00
Benoît Thébaudeau 5d98cb71e2 cc2538: Add support for Coffee
Coffee is placed by default at the beginning of the flash memory, right
before the firmware. This avoids the memory gaps that there could be
before and after Coffee if it were placed after the firmware, because it
is unlikely that the end of the firmware is aligned with a flash page
boundary, and the CCA is not flash-page-aligned. Thanks to that, Coffee
is also always in the same flash area if its size remains unchanged,
even if the firmware changes, which makes it possible to keep the Coffee
files when reprogramming the firmware after a partial flash erase
command.

The default configuration of Coffee is set to use sensible values for a
typical usage on this SoC, i.e. for sensor data logging.

The default size of Coffee is set to 0 in order not to waste flash if
Coffee is unused.

COFFEE_CONF_CUSTOM_PORT can be defined to a header file to be used with
"#include" in order to override the default CC2538 port of Coffee. This
makes it possible to use Coffee with an external memory device rather
than with the internal flash memory, without having to alter the Contiki
files.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-11-19 01:22:58 +01:00
Benoît Thébaudeau ee3ee049e4 cc2538: Set the entry point to the CCA
No entry point was defined, so it defaulted to the beginning of the
.text output section where the vector table is located by default in
Contiki. Actually, the vector table may be located elsewhere, and the
ROM-based boot loader first reads the CCA to find the vector table.

Consequently, this commit sets the entry point to the CCA, which fixes
both the entry point and the initial symbol reference, so this commit
also removes the now-unneeded "__used__" and "KEEP" keywords from the
CCA.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-11-19 01:18:34 +01:00