lpm_enter() must not enter PM1+ if the UART is transmitting. Otherwise,
the UART clock gets disabled, and its TX is broken.
The commit b8b54a033c had already
partially fixed this issue, but it could still occur while transmitting
stop bits because, contrary to UART_FR.BUSY, UART_FR.TXFE takes only the
data bits into account, not the stop bits.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
After reading a frame, `read()` checks the status of the RX FIFO:
* If an overflow is detected, the FIFO gets flushed
* If there are more frames in the FIFO, the `cc2538_rf_process` will get polled again in order to read out the next frame.
#1550 changed `read()`, which now performs the above check for non-poll mode, but it then flushes the FIFO unconditionally. Therefore, if there are two or more frames in the FIFO, they will get flushed before the `cc2538_rf_process` has had a chance to read them out. This results in missed frames.
Reproducing this is trivial: Build a CC2538 sniffer and see how it will never show you .15.4 ACK frames. ACK reception completes while `read()` is still streaming the previous captured frame to the host. Upon completion, the FIFO will get flushed and the ACK will get lost.
This pull proposes removing the unconditional flush and reverting to the original logic for non-TSCH operation.
Pinging @thomas-ha here for input regarding poll mode.
This pull sits on top of #1778
Depending on the use case and on the timings,
aes_auth_crypt_check_status() sometimes never reported an available
result, leading to a deadlock of any protothread waiting for this event,
and to a WDT reset if a protothread was polling it.
This was caused by aes_auth_crypt_start() clearing the result available
interrupt after operations that may rightfully trigger it, leading to a
missed interrupt.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Introduce FLASH_CONF_FW_ADDR and FLASH_CONF_FW_SIZE in order to make it
possible to place the firmware anywhere, regardless of Coffee, and
without having to write a custom linker script. Also, handle the default
values properly in order to fix the link breakage reported by
Arthur Fabre <arthur@arthurfabre.com> with COFFEE_CONF_CUSTOM_PORT.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Add functions providing the last reset cause, one as an integer (ID),
and one as a string.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Fix the following warning issued by GCC ARM Embedded 5-2015-q4-major:
../../cpu/cc2538/dev/udma.c: In function 'udma_init':
../../cpu/cc2538/dev/udma.c:59:10: warning: passing argument 1 of 'memset' discards 'volatile' qualifier from pointer target type [-Wdiscarded-array-qualifiers]
memset(&channel_config, 0, sizeof(channel_config));
^
In file included from <toolchain-path>/arm-none-eabi/include/string.h:10:0,
from ../../platform/cc2538dk/./contiki-conf.h:12,
from ../../cpu/cc2538/dev/udma.c:38:
<toolchain-path>/arm-none-eabi/include/string.h:25:7: note: expected 'void *' but argument is of type 'volatile struct channel_ctrl (*)[4]'
_PTR _EXFUN(memset,(_PTR, int, size_t));
^
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
The PKA drivers and examples were full of include paths missing the
appropriate prefix, or using angle brackets instead of double quotes or
the other way around.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Add generic AES functions that should be able to support all the modes
of operation of the hardware AES crypto engine, i.e. ECB, CBC, CTR,
CBC-MAC, GCM, and CCM.
This makes it possible to easily implement these modes of operation
without duplicating code.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
The peripheral core clocks of the PWM timers are gated in PM1+, so these
power modes must be disabled if a PWM timer is running. Use
lpm_register_peripheral() to handle this automatically and dynamically.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
The peripheral core clock of the general-purpose timers used by the PWM
driver is the system clock, not the I/O clock.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
