Optimized CS8900A driver for speed and size.
- Speed: The primary byte copy loops are reduzed to the bare minimum by adjusting the base pointer 'ptr' and loop register 'y' in such a way that the 'y' overflow matches the low byte of the loop size. - Size: Factored out all repeated code into subroutines. Introduced a loop for setting the MAC address. Additional minor changes: - Activate frame reception as last step of initialization after CS8900A configuration. - Properly set internal address bits used by the CS8900A.
This commit is contained in:
parent
eb33d5e4c5
commit
ea08635ca4
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@ -74,14 +74,7 @@ fixup: .byte fixup02-fixup01, fixup03-fixup02, fixup04-fixup03
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.byte fixup17-fixup16, fixup18-fixup17, fixup19-fixup18
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.byte fixup17-fixup16, fixup18-fixup17, fixup19-fixup18
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.byte fixup20-fixup19, fixup21-fixup20, fixup22-fixup21
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.byte fixup20-fixup19, fixup21-fixup20, fixup22-fixup21
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.byte fixup23-fixup22, fixup24-fixup23, fixup25-fixup24
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.byte fixup23-fixup22, fixup24-fixup23, fixup25-fixup24
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.byte fixup26-fixup25, fixup27-fixup26, fixup28-fixup27
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.byte fixup26-fixup25
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.byte fixup29-fixup28, fixup30-fixup29, fixup31-fixup30
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.byte fixup32-fixup31, fixup33-fixup32, fixup34-fixup33
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.byte fixup35-fixup34, fixup36-fixup35, fixup37-fixup36
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.byte fixup38-fixup37, fixup39-fixup38, fixup40-fixup39
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.byte fixup41-fixup40, fixup42-fixup41, fixup43-fixup42
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.byte fixup44-fixup43, fixup45-fixup44, fixup46-fixup45
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.byte fixup47-fixup46, fixup48-fixup47
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fixups = * - fixup
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fixups = * - fixup
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@ -140,56 +133,39 @@ fixup01:lda isq+1
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ora #$01 ; Set clockport bit
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ora #$01 ; Set clockport bit
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fixup02:sta isq+1
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fixup02:sta isq+1
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; Turn on transmission and reception of frames
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; PACKETPP = $0112, PPDATA = $00C0
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lda #$12
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ldx #$01
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fixup03:sta packetpp
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fixup04:stx packetpp+1
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lda #$C0
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ldx #$00
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fixup05:sta ppdata
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fixup06:stx ppdata+1
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; Accept valid unicast + broadcast frames
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; Accept valid unicast + broadcast frames
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; PACKETPP = $0104, PPDATA = $0D05
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; PACKETPP = $0104, PPDATA = $0D05
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lda #$04
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lda #$04
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ldx #$01
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jsr packetpp_01
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fixup07:sta packetpp
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fixup08:stx packetpp+1
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lda #$05
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lda #$05
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ldx #$0D
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ldx #$0D
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fixup09:sta ppdata
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fixup03:sta ppdata
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fixup10:stx ppdata+1
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fixup04:stx ppdata+1
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; Set MAC address
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; Set MAC address
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; PACKETPP = $0158, PPDATA = MAC[0], MAC[1]
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; PACKETPP = $0158, PPDATA = MAC[0], MAC[1]
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lda #$58
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ldx #$01
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fixup11:sta packetpp
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fixup12:stx packetpp+1
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lda mac
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ldx mac+1
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fixup13:sta ppdata
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fixup14:stx ppdata+1
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; PACKETPP = $015A, PPDATA = MAC[2], MAC[3]
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; PACKETPP = $015A, PPDATA = MAC[2], MAC[3]
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lda #$5A
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; PACKETPP = $015C, PPDATA = MAC[4], MAC[5]
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ldx #$01
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ldy #$58
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fixup15:sta packetpp
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: tya
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fixup16:stx packetpp+1
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jsr packetpp_01
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lda mac+2
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lda mac-$58,y
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ldx mac+3
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ldx mac-$58+1,y
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fixup17:sta ppdata
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fixup05:sta ppdata
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fixup18:stx ppdata+1
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fixup06:stx ppdata+1
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; PACKETPP = 0x015C, PPDATA = MAC[4], MAC[5]
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iny
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lda #$5C
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iny
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ldx #$01
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cpy #$58+6
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fixup19:sta packetpp
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bcc :-
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fixup20:stx packetpp+1
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lda mac+4
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; Turn on transmission and reception of frames
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ldx mac+5
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; PACKETPP = $0112, PPDATA = $00D3
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fixup21:sta ppdata
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lda #$12
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fixup22:stx ppdata+1
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jsr packetpp_01
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lda #$D3
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ldx #$00
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fixup07:sta ppdata
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fixup08:stx ppdata+1
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rts
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rts
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;---------------------------------------------------------------------
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;---------------------------------------------------------------------
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@ -199,10 +175,8 @@ poll:
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; are any valid unicast frames avaliable
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; are any valid unicast frames avaliable
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; PACKETPP = $0124, PPDATA & $0D00 ?
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; PACKETPP = $0124, PPDATA & $0D00 ?
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lda #$24
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lda #$24
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ldx #$01
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jsr packetpp_01
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fixup23:sta packetpp
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fixup09:lda ppdata+1
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fixup24:stx packetpp+1
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fixup25:lda ppdata+1
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and #$0D
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and #$0D
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bne :+
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bne :+
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@ -216,27 +190,23 @@ fixup25:lda ppdata+1
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; Read receiver event and discard it
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; Read receiver event and discard it
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; RXTXREG
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; RXTXREG
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:
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:
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fixup26:ldx rxtxreg+1
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fixup10:ldx rxtxreg+1
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fixup27:lda rxtxreg
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fixup11:lda rxtxreg
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; Read frame length
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; Read frame length
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; cnt = len = RXTXREG
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; cnt = len = RXTXREG
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fixup28:ldx rxtxreg+1
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fixup12:ldx rxtxreg+1
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fixup29:lda rxtxreg
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fixup13:lda rxtxreg
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sta len
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sta len
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stx len+1
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stx len+1
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sta cnt
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sta cnt
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stx cnt+1
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stx cnt+1
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; Adjust odd frame length
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; Adjust odd frame length
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lsr
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jsr adjustcnt
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bcc :+
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inc cnt
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bne :+
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inc cnt+1
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; Is bufsize < cnt ?
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; Is bufsize < cnt ?
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: sec
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sec
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lda bufsize
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lda bufsize
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sbc cnt
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sbc cnt
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lda bufsize+1
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lda bufsize+1
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@ -244,14 +214,7 @@ fixup29:lda rxtxreg
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bcs :+
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bcs :+
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; Yes, skip frame
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; Yes, skip frame
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; PACKETPP = $0102, PPDATA = PPDATA | $0040
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jsr skipframe
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lda #$02
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ldx #$01
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fixup30:sta packetpp
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fixup31:stx packetpp+1
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fixup32:lda ppdata
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ora #$40
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fixup33:sta ppdata
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; No frame ready
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; No frame ready
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lda #$00
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lda #$00
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@ -259,25 +222,18 @@ fixup33:sta ppdata
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rts
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rts
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; Read bytes into buffer
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; Read bytes into buffer
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: lda bufaddr
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: jsr adjustptr
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ldx bufaddr+1
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:
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sta ptr
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fixup14:lda rxtxreg
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stx ptr+1
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ldx cnt+1
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ldy #$00
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read:
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fixup34:lda rxtxreg
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sta (ptr),y
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sta (ptr),y
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iny
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iny
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fixup35:lda rxtxreg+1
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fixup15:lda rxtxreg+1
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sta (ptr),y
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sta (ptr),y
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iny
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iny
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bne :+
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bne :-
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inc ptr+1
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inc ptr+1
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: cpy cnt
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bne read
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dex
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dex
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bpl read
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bpl :-
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; Return frame length
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; Return frame length
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lda len
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lda len
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@ -292,44 +248,31 @@ send:
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stx cnt+1
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stx cnt+1
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; Transmit command
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; Transmit command
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lda #$C0
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lda #$C9
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ldx #$00
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ldx #$00
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fixup36:sta txcmd
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fixup16:sta txcmd
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fixup37:stx txcmd+1
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fixup17:stx txcmd+1
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lda cnt
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lda cnt
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ldx cnt+1
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ldx cnt+1
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fixup38:sta txlen
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fixup18:sta txlen
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fixup39:stx txlen+1
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fixup19:stx txlen+1
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; Adjust odd frame length
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; Adjust odd frame length
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lsr
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jsr adjustcnt
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bcc :+
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inc cnt
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bne :+
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inc cnt+1
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; 8 retries
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; 8 retries
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: ldy #$08
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ldy #$08
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; Check for avaliable buffer space
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; Check for avaliable buffer space
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; PACKETPP = $0138, PPDATA & $0100 ?
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; PACKETPP = $0138, PPDATA & $0100 ?
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: lda #$38
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: lda #$38
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ldx #$01
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jsr packetpp_01
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fixup40:sta packetpp
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fixup20:lda ppdata+1
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fixup41:stx packetpp+1
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fixup42:lda ppdata+1
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and #$01
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and #$01
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bne :+
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bne :+
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; No space avaliable, skip a received frame
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; No space avaliable, skip a received frame
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; PACKETPP = $0102, PPDATA = PPDATA | $0040
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jsr skipframe
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lda #$02
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ldx #$01
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fixup43:sta packetpp
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fixup44:stx packetpp+1
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fixup45:lda ppdata
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ora #$40
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fixup46:sta ppdata
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; And try again
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; And try again
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dey
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dey
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; --------------
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; --------------
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; Write bytes from buffer
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; Write bytes from buffer
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: lda bufaddr
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: jsr adjustptr
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ldx bufaddr+1
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: lda (ptr),y
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sta ptr
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fixup21:sta rxtxreg
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stx ptr+1
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ldx cnt+1
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ldy #$00
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write: lda (ptr),y
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fixup47:sta rxtxreg
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iny
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iny
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lda (ptr),y
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lda (ptr),y
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fixup48:sta rxtxreg+1
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fixup22:sta rxtxreg+1
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iny
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iny
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bne :+
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bne :-
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inc ptr+1
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inc ptr+1
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: cpy cnt
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bne write
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dex
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dex
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bpl write
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bpl :-
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rts
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rts
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;---------------------------------------------------------------------
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;---------------------------------------------------------------------
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@ -366,3 +302,50 @@ exit:
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rts
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rts
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;---------------------------------------------------------------------
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;---------------------------------------------------------------------
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packetpp_01:
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ldx #$01
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fixup23:sta packetpp
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fixup24:stx packetpp+1
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rts
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;---------------------------------------------------------------------
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skipframe:
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; PACKETPP = $0102, PPDATA = PPDATA | $0040
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lda #$02
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jsr packetpp_01
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fixup25:lda ppdata
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ora #$40
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fixup26:sta ppdata
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rts
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;---------------------------------------------------------------------
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adjustcnt:
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lsr
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bcc :+
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inc cnt
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bne :+
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inc cnt+1
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: rts
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;---------------------------------------------------------------------
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adjustptr:
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lda cnt
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eor #$FF ; Two's complement part 1
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tay
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iny ; Two's complement part 2
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sty reg
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sec
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lda bufaddr
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sbc reg
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sta ptr
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lda bufaddr+1
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sbc #$00
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sta ptr+1
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ldx cnt+1
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rts
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;---------------------------------------------------------------------
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