commit
eb33d5e4c5
1 changed files with 18 additions and 4 deletions
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@ -100,6 +100,20 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
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#define GPIO_SET_OUTPUT(PORT_BASE, PIN_MASK) \
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do { REG(PORT_BASE | GPIO_DIR) |= PIN_MASK; } while(0)
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/** \brief Set pins with PIN_MASK of port with PORT_BASE high.
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* \param PORT_BASE GPIO Port register offset
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* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
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*/
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#define GPIO_SET_PIN(PORT_BASE, PIN_MASK) \
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do { REG((PORT_BASE | GPIO_DATA) + (PIN_MASK << 2)) = 0xFF; } while(0)
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/** \brief Set pins with PIN_MASK of port with PORT_BASE low.
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* \param PORT_BASE GPIO Port register offset
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* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
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*/
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#define GPIO_CLR_PIN(PORT_BASE, PIN_MASK) \
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do { REG((PORT_BASE | GPIO_DATA) + (PIN_MASK << 2)) = 0x00; } while(0)
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/** \brief Set pins with PIN_MASK of port with PORT_BASE to detect edge.
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* \param PORT_BASE GPIO Port register offset
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* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
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@ -162,16 +176,16 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
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#define GPIO_DISABLE_INTERRUPT(PORT_BASE, PIN_MASK) \
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do { REG(PORT_BASE | GPIO_IE) &= ~PIN_MASK; } while(0)
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/** \brief Enable interrupt triggering for pins with PIN_MASK of port with
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* PORT_BASE.
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/** \brief Configure the pin to be under peripheral control with PIN_MASK of
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* port with PORT_BASE.
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* \param PORT_BASE GPIO Port register offset
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* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
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*/
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#define GPIO_PERIPHERAL_CONTROL(PORT_BASE, PIN_MASK) \
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do { REG(PORT_BASE | GPIO_AFSEL) |= PIN_MASK; } while(0)
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/** \brief Disable interrupt triggering for pins with PIN_MASK of port with
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* PORT_BASE.
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/** \brief Configure the pin to be software controlled with PIN_MASK of port
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* with PORT_BASE.
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* \param PORT_BASE GPIO Port register offset
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* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
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*/
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