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Fix for hardware with less gpio pins

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Some implementations don't have enough pins to implement CC2520_FIFO on a
separate pin. By not defining CC2520_FIFO_IS_1 an alternative
implementation uses an spi command to retrieve the FIFO overflow
exception info.
This commit is contained in:
Ralf Schlatterbeck 2016-05-08 16:44:49 +02:00
parent d7e6935ec2
commit b9fc6a8324
1 changed files with 10 additions and 0 deletions
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10
dev/cc2520/cc2520.c
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@ -752,7 +752,17 @@ cc2520_read(void *buf, unsigned short bufsize)
} }
if(CC2520_FIFOP_IS_1) { if(CC2520_FIFOP_IS_1) {
/* Some implementations don't have enough pins for CC2520_FIFO_IS_1
* So if this is not defined we need to explicitly check for RX FIFO
* overflow, this is bit 6 in EXCFLAG0, see p.112 of spec.
*/
#ifdef CC2520_FIFO_IS_1
if(!CC2520_FIFO_IS_1) { if(!CC2520_FIFO_IS_1) {
#else
uint8_t data;
CC2520_READ_REG(CC2520_EXCFLAG0,data);
if(data & BV(6)) {
#endif
/* Clean up in case of FIFO overflow! This happens for every /* Clean up in case of FIFO overflow! This happens for every
* full length frame and is signaled by FIFOP = 1 and FIFO = * full length frame and is signaled by FIFOP = 1 and FIFO =
* 0. */ * 0. */