Working ping

Biggest problem was definitions in rtimer_arch.h -- we have a 16-bit
rtimer_clock_t so this was overflowing and not working. Therefore most
delays in the radio implementation didn't work.
This commit is contained in:
Ralf Schlatterbeck 2016-05-12 13:51:20 +02:00
parent cb1e085ebf
commit b87ba1f526
8 changed files with 59 additions and 48 deletions

View file

@ -72,9 +72,6 @@ irq_handler(uint32_t irq_mask, uint32_t *regs)
int i;
for (i=0; i<=MAXIRQ; i++) {
if (irq_mask & (1<<i)) {
if (i>0) {
printf ("irq: %d\n", i);
}
if (irq_callback_functions [i] == NULL) {
printf ("Ooops: IRQ without callback: %d\n", i);
} else {
@ -112,14 +109,12 @@ void irq_init(void)
void register_irq (int irq, void (*callback)(void))
{
printf ("register: %d\n", irq);
assert (irq <= MAXIRQ);
irq_callback_functions [irq] = callback;
}
void enable_irq (int irq)
{
printf ("enable: %d\n", irq);
assert (irq <= MAXIRQ);
if (irq_callback_functions [irq] != NULL) {
irqmask &= (~(1<<irq));

View file

@ -35,7 +35,7 @@
#include <sys/clock.h>
#define RTIMER_ARCH_SECOND F_CPU
#define RTIMER_ARCH_SECOND 65536L
#define rtimer_arch_now() (clock_time ())
#define rtimer_arch_now() ((rtimer_clock_t)(clock_time () * 65536 / F_CPU))
#endif /* RTIMER_ARCH_H_ */

View file

@ -215,12 +215,17 @@ static void
flushrx(void)
{
uint8_t dummy;
uint8_t tmp [2] = {0, 0};
/* This read may cause an RX-fifo underflow which is cleared below */
CC2520_READ_FIFO_BYTE(dummy);
/* read and discard dummy to avoid "variable set but not used" warning */
(void)dummy;
/* Read twice, see errata */
CC2520_STROBE(CC2520_INS_SFLUSHRX);
CC2520_STROBE(CC2520_INS_SFLUSHRX);
/* Reset exception flags for next round incl RX-fifo underflow */
CC2520_WRITE_RAM(&tmp, CC2520_EXCFLAG0, 2);
}
/*---------------------------------------------------------------------------*/
static void
@ -342,12 +347,6 @@ cc2520_init(void)
setreg(CC2520_TXCTRL, 0x94);
setreg(CC2520_TXPOWER, 0x13); // Output power 1 dBm
/* write test data to memory */
setreg(0x200, 0x47);
setreg(0x201, 0x11);
printf ("getreg: %x\n", getreg(0x200));
printf ("getreg: %x\n", getreg(0x201));
/*
valeurs de TXPOWER
@ -435,7 +434,16 @@ cc2520_transmit(unsigned short payload_len)
#endif
#if WITH_SEND_CCA
strobe(CC2520_INS_SRXON);
/* Errata says to flush after SRXON to prevent erroneous reception
* We turn receiver on only if RXENMASK[15] (RXENABLE1 & 0x80) is
* *not* set.
*/
if (!(getreg (CC2520_RXENABLE1) & 0x80)) {
strobe(CC2520_INS_SRXON);
printf ("send: enabling receiver\n");
flushrx();
}
/* Wait for valid RSSI to get correct CCA */
BUSYWAIT_UNTIL(status() & BV(CC2520_RSSI_VALID) , RTIMER_SECOND / 10);
strobe(CC2520_INS_STXONCCA);
#else /* WITH_SEND_CCA */
@ -758,20 +766,11 @@ cc2520_read(void *buf, unsigned short bufsize)
}
if(CC2520_FIFOP_IS_1) {
/* Some implementations don't have enough pins for CC2520_FIFO_IS_1
* So if this is not defined we need to explicitly check for RX FIFO
* overflow, this is bit 6 in EXCFLAG0, see p.112 of spec.
*/
#ifdef CC2520_FIFO_IS_1
if(!CC2520_FIFO_IS_1) {
#else
uint8_t data;
CC2520_READ_REG(CC2520_EXCFLAG0,data);
if(data & BV(6)) {
#endif
/* Clean up in case of FIFO overflow! This happens for every
* full length frame and is signaled by FIFOP = 1 and FIFO =
* 0. */
printf ("ovl\n");
flushrx();
} else {
/* Another packet has been received and needs attention. */

View file

@ -22,14 +22,14 @@ mod extirq cc2520_fifop
interrupt 3
connect pin pmod1_7
# pmod1_9 sfd
# pmod1_10 sfd
mod extirq cc2520_sfd
address 4
interrupt 4
connect pin pmod1_9
connect pin pmod1_10
# pmod1_8 Reset: *Output*
# pmod1_10 cca
# pmod1_9 cca
mod gpio cc2520_io
address 5
connect IO pmod1_10 pmod1_8
connect IO pmod1_9 pmod1_8

View file

@ -52,6 +52,13 @@ void icosoc_cc2520_fifop_irq (void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
/* See Errata 1.2.2 */
if (!CC2520_FIFOP_IS_1) {
return;
}
if (!CC2520_FIFOP_IS_1) {
return;
}
cc2520_interrupt();
ENERGEST_OFF(ENERGEST_TYPE_IRQ);

View file

@ -54,7 +54,13 @@ extern void icosoc_cc2520_fifop_irq (void);
#define CC2520_CCA_SHIFT 1
/* Pin status.CC2520 */
/* This implementation doesn't have enough pins for CC2520_FIFO_IS_1
* on a separate pin. So we need to explicitly check for FIFO in
* register with a SPI command, this is bit 7 in FSMSTAT1, see p.119 of
* spec.
*/
#define CC2520_FIFOP_IS_1 (!!(icosoc_cc2520_fifop_read()))
#define CC2520_FIFO_IS_1 (!!(getreg(CC2520_FSMSTAT1) & BV(7)))
#define CC2520_SFD_IS_1 (!!(icosoc_cc2520_sfd_read()))
#define CC2520_CCA_IS_1 (!!(icosoc_cc2520_io_get() & (1<<CC2520_CCA_SHIFT)))
@ -93,4 +99,9 @@ extern void icosoc_cc2520_fifop_irq (void);
#define CC2520_SPI_DISABLE() icosoc_cc2520_spi_cs(1)
#define CC2520_SPI_IS_ENABLED() icosoc_cc2520_spi_getcs()
#if TIMESYNCH_CONF_ENABLED
#undef CC2520_CONF_SFD_TIMESTAMPS
#define CC2520_CONF_SFD_TIMESTAMPS 1
#endif /* TIMESYNCH_CONF_ENABLED */
#endif /* RADIO_CONF_H_ */

View file

@ -123,14 +123,7 @@ typedef unsigned short uip_stats_t;
#define NETSTACK_CONF_MAC nullmac_driver
#define NETSTACK_CONF_RDC sicslowmac_driver
#define NETSTACK_CONF_FRAMER framer_802154
/* AUTOACK receive mode gives better rssi measurements, even if ACK is never requested */
#define RF230_CONF_AUTOACK 1
/* 1 + Number of auto retry attempts 0-15 (0 implies don't use extended TX_ARET_ON mode) */
#define RF230_CONF_FRAME_RETRIES 2
/* Number of csma retry attempts 0-5 in extended tx mode (7 does immediate tx with no csma) */
#define RF230_CONF_CSMA_RETRIES 5
/* Default is one RAM buffer for received packets. More than one may benefit multiple TCP connections or ports */
#define RF230_CONF_RX_BUFFERS 3
#define CC2520_CONF_AUTOACK 1
#define SICSLOWPAN_CONF_FRAG 1
/* Most browsers reissue GETs after 3 seconds which stops fragment reassembly so a longer MAXAGE does no good */
#define SICSLOWPAN_CONF_MAXAGE 3

View file

@ -60,6 +60,8 @@
#include "contiki-net.h"
#include "contiki-lib.h"
#include "dev/cc2520/cc2520.h"
//#include "dev/rs232.h"
//#include "dev/serial-line.h"
//#include "dev/slip.h"
@ -155,10 +157,10 @@ uint16_t *p=&__bss_end;
#endif
linkaddr_set_node_addr(&addr);
// FIXME undefined
//rf230_set_pan_addr(params_get_panid(),params_get_panaddr(),(uint8_t *)&addr.u8);
//rf230_set_channel(params_get_channel());
//rf230_set_txpower(params_get_txpower());
cc2520_set_pan_addr(params_get_panid(),params_get_panaddr(),(uint8_t *)&addr.u8);
cc2520_set_channel(params_get_channel());
// set in init to 1dBm, needs special encoding!
//cc2520_set_txpower(params_get_txpower());
#if NETSTACK_CONF_WITH_IPV6
PRINTA("EUI-64 MAC: %x-%x-%x-%x-%x-%x-%x-%x\n",addr.u8[0],addr.u8[1],addr.u8[2],addr.u8[3],addr.u8[4],addr.u8[5],addr.u8[6],addr.u8[7]);
@ -178,10 +180,18 @@ uint16_t *p=&__bss_end;
NETSTACK_NETWORK.init();
#if ANNOUNCE_BOOT
//FIXME: undefined
//PRINTA("%s %s, channel %u , check rate %u Hz tx power %u\n",NETSTACK_MAC.name, NETSTACK_RDC.name, rf230_get_channel(),
// CLOCK_SECOND / (NETSTACK_RDC.channel_check_interval() == 0 ? 1:NETSTACK_RDC.channel_check_interval()),
// rf230_get_txpower());
PRINTA ( "%s %s, channel %u , check rate %u Hz tx power %u\n"
, NETSTACK_MAC.name
, NETSTACK_RDC.name
, cc2520_get_channel()
, (uint16_t)(CLOCK_SECOND
/ (NETSTACK_RDC.channel_check_interval() == 0
? 1
: NETSTACK_RDC.channel_check_interval()
)
)
, cc2520_get_txpower()
);
#if UIP_CONF_IPV6_RPL
PRINTA("RPL Enabled\n");
#endif
@ -195,10 +205,6 @@ uint16_t *p=&__bss_end;
process_start(&tcpip_process, NULL);
#endif
#ifdef RAVEN_LCD_INTERFACE
process_start(&raven_lcd_process, NULL);
#endif
/* Autostart other processes */
autostart_start(autostart_processes);