From b87ba1f526fde0da859a49366d76dc5a96689e27 Mon Sep 17 00:00:00 2001 From: Ralf Schlatterbeck Date: Thu, 12 May 2016 13:51:20 +0200 Subject: [PATCH] Working ping Biggest problem was definitions in rtimer_arch.h -- we have a 16-bit rtimer_clock_t so this was overflowing and not working. Therefore most delays in the radio implementation didn't work. --- cpu/pico-rv32/irq.c | 5 ---- cpu/pico-rv32/rtimer-arch.h | 4 +-- dev/cc2520/cc2520.c | 33 +++++++++++----------- examples/osd/ico-wallclock-time/icosoc.cfg | 8 +++--- platform/pico-rv32-icoboard/cc2520-arch.c | 7 +++++ platform/pico-rv32-icoboard/cc2520-arch.h | 11 ++++++++ platform/pico-rv32-icoboard/contiki-conf.h | 9 +----- platform/pico-rv32-icoboard/contiki-main.c | 30 ++++++++++++-------- 8 files changed, 59 insertions(+), 48 deletions(-) diff --git a/cpu/pico-rv32/irq.c b/cpu/pico-rv32/irq.c index 97039826f..90a108bcf 100644 --- a/cpu/pico-rv32/irq.c +++ b/cpu/pico-rv32/irq.c @@ -72,9 +72,6 @@ irq_handler(uint32_t irq_mask, uint32_t *regs) int i; for (i=0; i<=MAXIRQ; i++) { if (irq_mask & (1<0) { - printf ("irq: %d\n", i); - } if (irq_callback_functions [i] == NULL) { printf ("Ooops: IRQ without callback: %d\n", i); } else { @@ -112,14 +109,12 @@ void irq_init(void) void register_irq (int irq, void (*callback)(void)) { - printf ("register: %d\n", irq); assert (irq <= MAXIRQ); irq_callback_functions [irq] = callback; } void enable_irq (int irq) { - printf ("enable: %d\n", irq); assert (irq <= MAXIRQ); if (irq_callback_functions [irq] != NULL) { irqmask &= (~(1< -#define RTIMER_ARCH_SECOND F_CPU +#define RTIMER_ARCH_SECOND 65536L -#define rtimer_arch_now() (clock_time ()) +#define rtimer_arch_now() ((rtimer_clock_t)(clock_time () * 65536 / F_CPU)) #endif /* RTIMER_ARCH_H_ */ diff --git a/dev/cc2520/cc2520.c b/dev/cc2520/cc2520.c index 581fb7ba0..125faee6a 100644 --- a/dev/cc2520/cc2520.c +++ b/dev/cc2520/cc2520.c @@ -215,12 +215,17 @@ static void flushrx(void) { uint8_t dummy; + uint8_t tmp [2] = {0, 0}; + /* This read may cause an RX-fifo underflow which is cleared below */ CC2520_READ_FIFO_BYTE(dummy); /* read and discard dummy to avoid "variable set but not used" warning */ (void)dummy; + /* Read twice, see errata */ CC2520_STROBE(CC2520_INS_SFLUSHRX); CC2520_STROBE(CC2520_INS_SFLUSHRX); + /* Reset exception flags for next round incl RX-fifo underflow */ + CC2520_WRITE_RAM(&tmp, CC2520_EXCFLAG0, 2); } /*---------------------------------------------------------------------------*/ static void @@ -342,12 +347,6 @@ cc2520_init(void) setreg(CC2520_TXCTRL, 0x94); setreg(CC2520_TXPOWER, 0x13); // Output power 1 dBm - /* write test data to memory */ - setreg(0x200, 0x47); - setreg(0x201, 0x11); - printf ("getreg: %x\n", getreg(0x200)); - printf ("getreg: %x\n", getreg(0x201)); - /* valeurs de TXPOWER @@ -435,7 +434,16 @@ cc2520_transmit(unsigned short payload_len) #endif #if WITH_SEND_CCA - strobe(CC2520_INS_SRXON); + /* Errata says to flush after SRXON to prevent erroneous reception + * We turn receiver on only if RXENMASK[15] (RXENABLE1 & 0x80) is + * *not* set. + */ + if (!(getreg (CC2520_RXENABLE1) & 0x80)) { + strobe(CC2520_INS_SRXON); + printf ("send: enabling receiver\n"); + flushrx(); + } + /* Wait for valid RSSI to get correct CCA */ BUSYWAIT_UNTIL(status() & BV(CC2520_RSSI_VALID) , RTIMER_SECOND / 10); strobe(CC2520_INS_STXONCCA); #else /* WITH_SEND_CCA */ @@ -758,20 +766,11 @@ cc2520_read(void *buf, unsigned short bufsize) } if(CC2520_FIFOP_IS_1) { -/* Some implementations don't have enough pins for CC2520_FIFO_IS_1 - * So if this is not defined we need to explicitly check for RX FIFO - * overflow, this is bit 6 in EXCFLAG0, see p.112 of spec. - */ -#ifdef CC2520_FIFO_IS_1 if(!CC2520_FIFO_IS_1) { -#else - uint8_t data; - CC2520_READ_REG(CC2520_EXCFLAG0,data); - if(data & BV(6)) { -#endif /* Clean up in case of FIFO overflow! This happens for every * full length frame and is signaled by FIFOP = 1 and FIFO = * 0. */ + printf ("ovl\n"); flushrx(); } else { /* Another packet has been received and needs attention. */ diff --git a/examples/osd/ico-wallclock-time/icosoc.cfg b/examples/osd/ico-wallclock-time/icosoc.cfg index 93fad168d..7afbcab2d 100644 --- a/examples/osd/ico-wallclock-time/icosoc.cfg +++ b/examples/osd/ico-wallclock-time/icosoc.cfg @@ -22,14 +22,14 @@ mod extirq cc2520_fifop interrupt 3 connect pin pmod1_7 -# pmod1_9 sfd +# pmod1_10 sfd mod extirq cc2520_sfd address 4 interrupt 4 - connect pin pmod1_9 + connect pin pmod1_10 # pmod1_8 Reset: *Output* -# pmod1_10 cca +# pmod1_9 cca mod gpio cc2520_io address 5 - connect IO pmod1_10 pmod1_8 + connect IO pmod1_9 pmod1_8 diff --git a/platform/pico-rv32-icoboard/cc2520-arch.c b/platform/pico-rv32-icoboard/cc2520-arch.c index 949671d38..790c850f7 100644 --- a/platform/pico-rv32-icoboard/cc2520-arch.c +++ b/platform/pico-rv32-icoboard/cc2520-arch.c @@ -52,6 +52,13 @@ void icosoc_cc2520_fifop_irq (void) { ENERGEST_ON(ENERGEST_TYPE_IRQ); + /* See Errata 1.2.2 */ + if (!CC2520_FIFOP_IS_1) { + return; + } + if (!CC2520_FIFOP_IS_1) { + return; + } cc2520_interrupt(); ENERGEST_OFF(ENERGEST_TYPE_IRQ); diff --git a/platform/pico-rv32-icoboard/cc2520-arch.h b/platform/pico-rv32-icoboard/cc2520-arch.h index 8eaa85b0b..d5783d94c 100644 --- a/platform/pico-rv32-icoboard/cc2520-arch.h +++ b/platform/pico-rv32-icoboard/cc2520-arch.h @@ -54,7 +54,13 @@ extern void icosoc_cc2520_fifop_irq (void); #define CC2520_CCA_SHIFT 1 /* Pin status.CC2520 */ +/* This implementation doesn't have enough pins for CC2520_FIFO_IS_1 + * on a separate pin. So we need to explicitly check for FIFO in + * register with a SPI command, this is bit 7 in FSMSTAT1, see p.119 of + * spec. + */ #define CC2520_FIFOP_IS_1 (!!(icosoc_cc2520_fifop_read())) +#define CC2520_FIFO_IS_1 (!!(getreg(CC2520_FSMSTAT1) & BV(7))) #define CC2520_SFD_IS_1 (!!(icosoc_cc2520_sfd_read())) #define CC2520_CCA_IS_1 (!!(icosoc_cc2520_io_get() & (1<