deac/osd-contiki
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity

working on nvm-read.

Browse source 
fixed lib ordering on link command
This commit is contained in:
Mariano Alvira 2010-02-26 12:37:13 -05:00
parent 59dca22769
commit 9a8004c177
11 changed files with 122 additions and 15 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
Makefile.include
View file

@ -12,12 +12,15 @@ include $(MC1322X)/board/Makefile.board
include $(MC1322X)/libmc1322x/Makefile.lib
# default start and isr
CFLAGS += -I$(MC1322X)/src
ifndef START
START = $(MC1322X)/src/start.o
endif
ifndef ISR
ISR = $(MC1322X)/src/isr.o
endif
SRCOBJS += $(MC1322X)/src/default_lowlevel.o
ARCH = arm
CPU = arm7tdmi-s
@ -34,9 +37,8 @@ $(ISR): $(ISR:.o=.c)
%_$(BOARD).elf: %.elf
mv $< $@
%.elf: $(START) $(ISR) $(LIBMC1322X)/libmc1322x.a $(OBJDIR)/%.o $(LINKERSCRIPT)
$(LD) $(LDFLAGS) $(AOBJS) \
--start-group $(PLATFORM_LIBS) --end-group \
%.elf: $(START) $(ISR) $(SRCOBJS) $(OBJDIR)/%.o $(LINKERSCRIPT) $(LIBMC1322X)/libmc1322x.a
$(CC) $(LDFLAGS) $(AOBJS) \
$(filter %.o %.a,$+) -o $@
%.srec: %.elf

2
board/Makefile.board
View file

@ -4,7 +4,7 @@
BOARDS := redbee-dev redbee-r1
OBJDIR := obj_$(BOARD)_board
CFLAGS += -I$(OBJDIR)
CFLAGS += -I$(OBJDIR) -I$(MC1322X)/board
$(OBJDIR):
ifndef BOARD

2
board/redbee-r1.h
View file

@ -1,6 +1,8 @@
#ifndef BOARD_REDBEE_R1_H
#define BOARD_REDBEE_R1_H
#include <std_conf.h>
#define LED_RED (1 << 8)
#define LED_GREEN (1 << 9)
#define LED_BLUE (1 << 10)

4
board/std_conf.h
View file

@ -1,7 +1,9 @@
#ifndef STDCONF_H
#define STDCONF_H
#ifndef vreg_init()
#include <default_lowlevel.h>
#ifndef vreg_init
#define vreg_init() default_vreg_init()
#endif

4
config.mk
View file

@ -27,8 +27,6 @@ OBJCFLAGS += --gap-fill=0xff
gccincdir := $(shell $(CC) -print-file-name=include)
PLATFORM_LIBS += --no-warn-mismatch -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc
CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS) \
-D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE) \
-fno-builtin -ffreestanding -nostdinc -isystem \
@ -39,7 +37,7 @@ CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes -Wcast-align -Wcast-align
AFLAGS_DEBUG := -Wa,-gstabs
AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS)
LDFLAGS += -T $(LINKERSCRIPT) -nostartfiles -static -Map=$*.map -export-dynamic
LDFLAGS += -T $(LINKERSCRIPT) -nostartfiles -static -Wl,-Map=$*.map -export-dynamic
#########################################################################

2
libmc1322x/Makefile.lib
View file

@ -5,4 +5,4 @@ CFLAGS += -I$(LIBMC1322X)/include
LIBOBJS = $(patsubst %.c,%.o,$(wildcard $(LIBMC1322X)/*.c))
$(LIBMC1322X)/libmc1322x.a: $(LIBOBJS)
$(AR) r $(LIBMC1322X)/libmc1322x.a $(LIBOBJS)
$(AR) rcs $(LIBMC1322X)/libmc1322x.a $(LIBOBJS)

100
libmc1322x/include/crm.h Normal file
View file

@ -0,0 +1,100 @@
#ifndef CRM_H
#define CRM_H
#include <types.h>
#define CRM_BASE (0x80003000)
#define CRM_SYS_CNTL ((volatile uint32_t *) (CRM_BASE+0x00))
#define CRM_WU_CNTL ((volatile uint32_t *) (CRM_BASE+0x04))
#define CRM_SLEEP_CNTL ((volatile uint32_t *) (CRM_BASE+0x08))
#define CRM_BS_CNTL ((volatile uint32_t *) (CRM_BASE+0x0c))
#define CRM_COP_CNTL ((volatile uint32_t *) (CRM_BASE+0x10))
#define CRM_COP_SERVICE ((volatile uint32_t *) (CRM_BASE+0x14))
#define CRM_STATUS ((volatile uint32_t *) (CRM_BASE+0x18))
#define CRM_MOD_STATUS ((volatile uint32_t *) (CRM_BASE+0x1c))
#define CRM_WU_COUNT ((volatile uint32_t *) (CRM_BASE+0x20))
#define CRM_WU_TIMEOUT ((volatile uint32_t *) (CRM_BASE+0x24))
#define CRM_RTC_COUNT ((volatile uint32_t *) (CRM_BASE+0x28))
#define CRM_RTC_TIMEOUT ((volatile uint32_t *) (CRM_BASE+0x2c))
#define CRM_CAL_CNTL ((volatile uint32_t *) (CRM_BASE+0x34))
#define CRM_CAL_COUNT ((volatile uint32_t *) (CRM_BASE+0x38))
#define CRM_RINGOSC_CNTL ((volatile uint32_t *) (CRM_BASE+0x3c))
#define CRM_XTAL_CNTL ((volatile uint32_t *) (CRM_BASE+0x40))
#define CRM_XTAL32_CNTL ((volatile uint32_t *) (CRM_BASE+0x44))
#define CRM_VREG_CNTL ((volatile uint32_t *) (CRM_BASE+0x48))
#define CRM_SW_RST ((volatile uint32_t *) (CRM_BASE+0x50))
/* CRM_SYS_CNTL bit locations */
#define XTAL32_EXISTS 5
/* CRM_WU_CNTL bit locations */
#define EXT_WU_IEN 20 /* 4 bits */
#define EXT_WU_EN 4 /* 4 bits */
#define EXT_WU_EDGE 8 /* 4 bits */
#define EXT_WU_POL 12 /* 4 bits */
#define TIMER_WU_EN 0
#define RTC_WU_EN 1
#define TIMER_WU_IEN 16
#define RTC_WU_IEN 17
/* CRM_STATUS bit locations */
#define EXT_WU_EVT 4 /* 4 bits, rw1c */
#define RTC_WU_EVT 3 /* rw1c */
/* RINGOSC_CNTL bit locations */
#define ROSC_CTUNE 9 /* 4 bits */
#define ROSC_FTUNE 4 /* 4 bits */
#define ROSC_EN 0
#define ring_osc_on() (set_bit(reg32(CRM_RINGOSC_CNTL),ROSC_EN))
#define ring_osc_off() (clear_bit(reg32(CRM_RINGOSC_CNTL),ROSC_EN))
#define REF_OSC 24000000ULL /* reference osc. frequency */
#define NOMINAL_RING_OSC_SEC 2000 /* nominal ring osc. frequency */
//extern uint32_t cal_rtc_secs; /* calibrated 2khz rtc seconds */
/* XTAL32_CNTL bit locations */
#define XTAL32_GAIN 4 /* 2 bits */
#define XTAL32_EN 0
#define xtal32_on() (set_bit(reg32(CRM_XTAL32_CNTL),XTAL32_EN))
#define xtal32_off() (clear_bit(reg32(CRM_XTAL32_CNTL),XTAL32_EN))
#define xtal32_exists() (set_bit(reg32(CRM_SYS_CNTL),XTAL32_EXISTS))
/* enable external wake-ups on kbi 4-7 */
/* see kbi.h for other kbi specific macros */
#define enable_ext_wu(kbi) (set_bit(reg32(CRM_WU_CNTL),(EXT_WU_EN+kbi-4)))
#define disable_ext_wu(kbi) (clear_bit(reg32(CRM_WU_CNTL),(EXT_WU_EN+kbi-4)))
#define is_ext_wu_evt(kbi) (bit_is_set(reg32(CRM_STATUS),(EXT_WU_EVT+kbi-4)))
#define clear_ext_wu_evt(kbi) (set_bit(reg32(CRM_STATUS),(EXT_WU_EVT+kbi-4))) /* r1wc bit */
/* enable wake-up timer */
#define enable_timer_wu_irq() ((set_bit(reg32(CRM_WU_CNTL),(TIMER_WU_IEN))))
#define disable_timer_wu_irq() ((clear_bit(reg32(CRM_WU_CNTL),(TIMER_WU_IEN))))
#define enable_timer_wu() ((set_bit(reg32(CRM_WU_CNTL),(TIMER_WU_EN))))
#define disable_timer_wu() ((clear_bit(reg32(CRM_WU_CNTL),(TIMER_WU_EN))))
/* enable wake-up from RTC compare */
#define enable_rtc_wu_irq() (set_bit(reg32(CRM_WU_CNTL),RTC_WU_IEN))
#define disable_rtc_wu_irq() (clear_bit(reg32(CRM_WU_CNTL),RTC_WU_IEN))
#define enable_rtc_wu() ((set_bit(reg32(CRM_WU_CNTL),(RTC_WU_EN))))
#define disable_rtc_wu() ((clear_bit(reg32(CRM_WU_CNTL),(RTC_WU_EN))))
#define clear_rtc_wu_evt() (set_bit(reg32(CRM_STATUS),RTC_WU_EVT))
#define rtc_wu_evt() (bit_is_set(reg32(CRM_STATUS),RTC_WU_EVT))
#define SLEEP_MODE_HIBERNATE bit(0)
#define SLEEP_MODE_DOZE bit(1)
#define SLEEP_PAD_PWR bit(7)
#define SLEEP_RETAIN_MCU bit(6)
#define sleep_ram_retain(x) (x<<4) /* 0-3 */
#define SLEEP_RAM_8K sleep_ram_retain(0)
#define SLEEP_RAM_32K sleep_ram_retain(1)
#define SLEEP_RAM_64K sleep_ram_retain(2)
#define SLEEP_RAM_96K sleep_ram_retain(3)
#endif

1
libmc1322x/nvm.c
View file

@ -19,3 +19,4 @@ volatile nvmErr_t (*nvm_erase)
volatile void(*nvm_setsvar)
(uint32_t zero_for_awesome)
= (void *)0x00007085;

1
board/lowlevel.c → src/default_lowlevel.c
View file

@ -1,3 +1,4 @@
#include <types.h>
#include <crm.h>
void default_vreg_init(void) {

0
board/lowlevel.h → src/default_lowlevel.h
View file

13
tests/nvm-read.c
View file

@ -1,6 +1,7 @@
#include <mc1322x.h>
#include <board.h>
#include <uart1.h>
#include <nvm.h>
/* INC = 767; MOD = 9999 works: 115200 @ 24 MHz 16 bit sample */
#define INC 767
@ -29,19 +30,19 @@ void main(void) {
/* Restore UART regs. to default */
/* in case there is still bootloader state leftover */
reg(UART1_CON) = 0x0000c800; /* mask interrupts, 16 bit sample --- helps explain the baud rate */
*UART1_CON = 0x0000c800; /* mask interrupts, 16 bit sample --- helps explain the baud rate */
/* INC = 767; MOD = 9999 works: 115200 @ 24 MHz 16 bit sample */
#define INC 767
#define MOD 9999
reg(UART1_BR) = INC<<16 | MOD;
*UART1_BR = INC<<16 | MOD;
/* see Section 11.5.1.2 Alternate Modes */
/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
/* From the datasheet: "The peripheral function will control operation of the pad IF */
/* THE PERIPHERAL IS ENABLED. */
reg(UART1_CON) = 0x00000003; /* enable receive and transmit */
reg(GPIO_FUNC_SEL0) = ( (0x01 << (14*2)) | (0x01 << (15*2)) ); /* set GPIO15-14 to UART (UART1 TX and RX)*/
*UART1_CON = 0x00000003; /* enable receive and transmit */
*GPIO_FUNC_SEL0 = ( (0x01 << (14*2)) | (0x01 << (15*2)) ); /* set GPIO15-14 to UART (UART1 TX and RX)*/
vreg_init();
@ -77,8 +78,8 @@ void main(void) {
}
void putc(uint8_t c) {
while(reg(UT1CON)==31); /* wait for there to be room in the buffer */
reg(UART1_DATA) = c;
while(*UT1CON == 31); /* wait for there to be room in the buffer */
*UART1_DATA = c;
}
void puts(uint8_t *s) {