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ARM: CMSIS-CORE: Introduce NVIC_IsIRQEnabled()

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This function returns the enable state of an interrupt.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
This commit is contained in:
Benoît Thébaudeau 2016-07-23 23:43:34 +02:00
parent d3158897c2
commit 9195b49c18
5 changed files with 65 additions and 0 deletions
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13
cpu/arm/common/CMSIS/core_cm0.h
View file

@ -621,6 +621,19 @@ typedef struct
#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
/**
\brief Get External Interrupt Enable State
\details Returns whether a device-specific interrupt is enabled in the NVIC interrupt controller.
\param [in] IRQn External interrupt number. Value cannot be negative.
\return 0 Interrupt is disabled.
\return 1 Interrupt is enabled.
*/
__STATIC_INLINE uint32_t NVIC_IsIRQEnabled(IRQn_Type IRQn)
{
return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
}
/**
\brief Enable External Interrupt
\details Enables a device-specific interrupt in the NVIC interrupt controller.

13
cpu/arm/common/CMSIS/core_cm0plus.h
View file

@ -737,6 +737,19 @@ typedef struct
#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
/**
\brief Get External Interrupt Enable State
\details Returns whether a device-specific interrupt is enabled in the NVIC interrupt controller.
\param [in] IRQn External interrupt number. Value cannot be negative.
\return 0 Interrupt is disabled.
\return 1 Interrupt is enabled.
*/
__STATIC_INLINE uint32_t NVIC_IsIRQEnabled(IRQn_Type IRQn)
{
return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
}
/**
\brief Enable External Interrupt
\details Enables a device-specific interrupt in the NVIC interrupt controller.

13
cpu/arm/common/CMSIS/core_cm3.h
View file

@ -1444,6 +1444,19 @@ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
}
/**
\brief Get External Interrupt Enable State
\details Returns whether a device-specific interrupt is enabled in the NVIC interrupt controller.
\param [in] IRQn External interrupt number. Value cannot be negative.
\return 0 Interrupt is disabled.
\return 1 Interrupt is enabled.
*/
__STATIC_INLINE uint32_t NVIC_IsIRQEnabled(IRQn_Type IRQn)
{
return((uint32_t)(((NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
}
/**
\brief Enable External Interrupt
\details Enables a device-specific interrupt in the NVIC interrupt controller.

13
cpu/arm/common/CMSIS/core_cm4.h
View file

@ -1618,6 +1618,19 @@ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
}
/**
\brief Get External Interrupt Enable State
\details Returns whether a device-specific interrupt is enabled in the NVIC interrupt controller.
\param [in] IRQn External interrupt number. Value cannot be negative.
\return 0 Interrupt is disabled.
\return 1 Interrupt is enabled.
*/
__STATIC_INLINE uint32_t NVIC_IsIRQEnabled(IRQn_Type IRQn)
{
return((uint32_t)(((NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
}
/**
\brief Enable External Interrupt
\details Enables a device-specific interrupt in the NVIC interrupt controller.

13
cpu/arm/common/CMSIS/core_cm7.h
View file

@ -1826,6 +1826,19 @@ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
}
/**
\brief Get External Interrupt Enable State
\details Returns whether a device-specific interrupt is enabled in the NVIC interrupt controller.
\param [in] IRQn External interrupt number. Value cannot be negative.
\return 0 Interrupt is disabled.
\return 1 Interrupt is enabled.
*/
__STATIC_INLINE uint32_t NVIC_IsIRQEnabled(IRQn_Type IRQn)
{
return((uint32_t)(((NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
}
/**
\brief Enable External Interrupt
\details Enables a device-specific interrupt in the NVIC interrupt controller.