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MSP430/F2xxx: fix ubr msb byte being hardcoded to zero

master-01022017
Antonio Lignan 2016-09-01 10:25:07 +02:00
parent 4ce322b7b0
commit 6dd17f5eec
1 changed files with 2 additions and 2 deletions
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4
cpu/msp430/f2xxx/uart0.c
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@ -146,8 +146,8 @@ uart0_init(unsigned long ubr)
UCA0CTL1 |= UCSWRST; /* Hold peripheral in reset state */
UCA0CTL1 |= UCSSEL_2; /* CLK = SMCLK */
UCA0BR0 = ubr; /* 8MHz/115200 = 69 = 0x45 */
UCA0BR1 = 0x00;
UCA0BR0 = ((uint8_t *)&ubr)[0]; /* 8MHz/115200 = 69 = 0x45 */
UCA0BR1 = ((uint8_t *)&ubr)[1];
UCA0MCTL = UCBRS_3; /* Modulation UCBRSx = 3 */
P3DIR &= ~0x20; /* P3.5 = USCI_A0 RXD as input */