From 6dd17f5eecf2cba9e4c1413e45ede6c5313bfa45 Mon Sep 17 00:00:00 2001
From: Antonio Lignan <alinan@zolertia.com>
Date: Thu, 1 Sep 2016 10:25:07 +0200
Subject: [PATCH] MSP430/F2xxx: fix ubr msb byte being hardcoded to zero

---
 cpu/msp430/f2xxx/uart0.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/cpu/msp430/f2xxx/uart0.c b/cpu/msp430/f2xxx/uart0.c
index 79c75f877..cbba2e7b9 100644
--- a/cpu/msp430/f2xxx/uart0.c
+++ b/cpu/msp430/f2xxx/uart0.c
@@ -146,8 +146,8 @@ uart0_init(unsigned long ubr)
   UCA0CTL1 |= UCSWRST;            /* Hold peripheral in reset state */
   UCA0CTL1 |= UCSSEL_2;           /* CLK = SMCLK */
 
-  UCA0BR0 = ubr;                 /* 8MHz/115200 = 69 = 0x45 */
-  UCA0BR1 = 0x00;
+  UCA0BR0 = ((uint8_t *)&ubr)[0]; /* 8MHz/115200 = 69 = 0x45 */
+  UCA0BR1 = ((uint8_t *)&ubr)[1];
   UCA0MCTL = UCBRS_3;             /* Modulation UCBRSx = 3 */
 
   P3DIR &= ~0x20;                 /* P3.5 = USCI_A0 RXD as input */