isr updates
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parent
0037fd9527
commit
20f6a749d1
2 changed files with 32 additions and 6 deletions
31
src/isr.c
31
src/isr.c
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@ -5,7 +5,32 @@ __attribute__ ((section (".irq")))
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__attribute__ ((interrupt("IRQ")))
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void irq(void)
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{
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if(tmr_isr != 0) {
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tmr_isr();
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}
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uint32_t pending;
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while (pending = *NIPEND) {
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if(bit_is_set(pending, INT_NUM_TMR)) {
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/* dispatch to individual timer isrs if they exist */
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/* timer isrs are responsible for determining if they
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* caused an interrupt */
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/* and clearing their own interrupt flags */
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if(tmr0_isr != 0) { tmr0_isr(); }
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if(tmr1_isr != 0) { tmr1_isr(); }
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if(tmr2_isr != 0) { tmr2_isr(); }
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if(tmr3_isr != 0) { tmr3_isr(); }
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}
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if(bit_is_set(pending, INT_NUM_MACA)) {
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if(maca_isr != 0) { maca_isr(); }
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}
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if(bit_is_set(pending, INT_NUM_UART1)) {
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if(uart1_isr != 0) { uart1_isr(); }
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}
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if(bit_is_set(pending, INT_NUM_CRM)) {
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if(rtc_wu_evt() && (rtc_isr != 0)) { rtc_isr(); }
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if(kbi_evnt(4) && (kbi4_isr != 0)) { kbi4_isr(); }
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if(kbi_evnt(5) && (kbi5_isr != 0)) { kbi5_isr(); }
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if(kbi_evnt(6) && (kbi6_isr != 0)) { kbi6_isr(); }
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if(kbi_evnt(7) && (kbi7_isr != 0)) { kbi7_isr(); }
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}
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}
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}
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@ -21,7 +21,7 @@ void toggle_led(void) {
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}
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}
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void tmr_isr(void) {
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void tmr0_isr(void) {
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toggle_led();
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*TMR0_SCTRL = 0;
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@ -58,9 +58,10 @@ void main(void) {
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led_on();
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enable_tmr_irq();
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enable_irq(TMR);
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while(1) {
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while(1) {
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/* sit here and let the interrupts do the work */
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continue;
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};
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}
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