229 lines
7.8 KiB
C
229 lines
7.8 KiB
C
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/*
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* Contiki SeedEye Platform project
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*
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* Copyright (c) 2012,
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* Scuola Superiore Sant'Anna (http://www.sssup.it) and
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* Consorzio Nazionale Interuniversitario per le Telecomunicazioni
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* (http://www.cnit.it).
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/**
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* \defgroup mrf24j40 MRF24J40 Driver
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*
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* @{
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*/
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/**
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* \file mrf24j40.h
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* \brief MRF24J40 Driver
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* \author Giovanni Pellerano <giovanni.pellerano@evilaliv3.org>
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* \date 2012-03-21
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*/
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#ifndef __MRF24J40_H__
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#define __MRF24J40_H__
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#include <pic32_irq.h>
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#include <pic32_spi.h>
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extern const struct radio_driver mrf24j40_driver;
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#define MRF24J40_DEFAULT_CHANNEL 11
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#define MRF24J40_TX_ERR_NONE 0
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#define MRF24J40_TX_ERR_NOTSPECIFIED 1
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#define MRF24J40_TX_ERR_COLLISION 2
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#define MRF24J40_TX_ERR_MAXRETRY 3
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#define MRF24J40_TX_WAIT 4
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/* Functions prototypes */
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void mrf24j40_set_channel(uint16_t ch);
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void mrf24j40_set_panid(uint16_t id);
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void mrf24j40_set_short_mac_addr(uint16_t addr);
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void mrf24j40_set_extended_mac_addr(uint64_t addr);
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void mrf24j40_get_short_mac_addr(uint16_t * addr);
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void mrf24j40_get_extended_mac_addr(uint64_t * addr);
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void mrf24j40_set_tx_power(uint8_t pwr);
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void mrf24j40_set_csma_par(uint8_t be, uint8_t nb);
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uint8_t mrf24j40_get_status(void);
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uint8_t mrf24j40_get_rssi(void);
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uint8_t mrf24j40_get_last_rssi(void);
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uint8_t mrf24j40_get_last_lqi(void);
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int32_t mrf24j40_set_txfifo(const uint8_t * buf, uint8_t buf_len);
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int32_t mrf24j40_get_rxfifo(uint8_t * buf, uint8_t buf_len);
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/* Long address registers */
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#define MRF24J40_RFCON0 (0x200)
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#define MRF24J40_RFCON1 (0x201)
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#define MRF24J40_RFCON2 (0x202)
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#define MRF24J40_RFCON3 (0x203)
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#define MRF24J40_RFCON5 (0x205)
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#define MRF24J40_RFCON6 (0x206)
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#define MRF24J40_RFCON7 (0x207)
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#define MRF24J40_RFCON8 (0x208)
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#define MRF24J40_SPCAL0 (0x209)
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#define MRF24J40_SPCAL1 (0x20A)
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#define MRF24J40_SPCAL2 (0x20B)
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#define MRF24J40_RFSTATE (0x20F)
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#define MRF24J40_RSSI (0x210)
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#define MRF24J40_SLPCON0 (0x211)
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#define MRF24J40_SLPCON1 (0x220)
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#define MRF24J40_WAKETIMEL (0x222)
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#define MRF24J40_WAKETIMEH (0x223)
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#define MRF24J40_REMCNTL (0x224)
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#define MRF24J40_REMCNTH (0x225)
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#define MRF24J40_MAINCNT0 (0x226)
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#define MRF24J40_MAINCNT1 (0x227)
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#define MRF24J40_MAINCNT2 (0x228)
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#define MRF24J40_MAINCNT3 (0x229)
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#define MRF24J40_TESTMODE (0x22F)
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#define MRF24J40_NORMAL_TX_FIFO (0x000)
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#define MRF24J40_BEACON_TX_FIFO (0x080)
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#define MRF24J40_GTS1_TX_FIFO (0x100)
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#define MRF24J40_GTS2_TX_FIFO (0x180)
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#define MRF24J40_RX_FIFO (0x300)
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#define MRF24J40_SECURITY_FIFO (0x280)
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#define MRF24J40_UPNONCE0 (0x240)
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/* Short address registers */
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#define MRF24J40_RXMCR (0x00)
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#define MRF24J40_PANIDL (0x01)
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#define MRF24J40_PANIDH (0x02)
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#define MRF24J40_SADRL (0x03)
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#define MRF24J40_SADRH (0x04)
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#define MRF24J40_EADR0 (0x05)
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#define MRF24J40_EADR1 (0x06)
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#define MRF24J40_EADR2 (0x07)
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#define MRF24J40_EADR3 (0x08)
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#define MRF24J40_EADR4 (0x09)
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#define MRF24J40_EADR5 (0x0A)
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#define MRF24J40_EADR6 (0x0B)
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#define MRF24J40_EADR7 (0x0C)
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#define MRF24J40_RXFLUSH (0x0D)
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#define MRF24J40_ORDER (0x10)
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#define MRF24J40_TXMCR (0x11)
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#define MRF24J40_ACKTMOUT (0x12)
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#define MRF24J40_ESLOTG1 (0x13)
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#define MRF24J40_SYMTICKL (0x14)
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#define MRF24J40_SYMTICKH (0x15)
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#define MRF24J40_PACON0 (0x16)
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#define MRF24J40_PACON1 (0x17)
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#define MRF24J40_PACON2 (0x18)
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#define MRF24J40_TXBCON0 (0x1A)
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#define MRF24J40_TXNCON (0x1B)
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#define MRF24J40_TXG1CON (0x1C)
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#define MRF24J40_TXG2CON (0x1D)
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#define MRF24J40_ESLOTG23 (0x1E)
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#define MRF24J40_ESLOTG45 (0x1F)
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#define MRF24J40_ESLOTG87 (0x20)
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#define MRF24J40_TXPEND (0x21)
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#define MRF24J40_WAKECON (0x22)
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#define MRF24J40_FRMOFFSET (0x23)
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#define MRF24J40_TXSTAT (0x24)
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#define MRF24J40_TXBCON1 (0x25)
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#define MRF24J40_GATECLK (0x26)
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#define MRF24J40_TXTIME (0x27)
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#define MRF24J40_HSYMTMRL (0x28)
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#define MRF24J40_HSYMTMRH (0x29)
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#define MRF24J40_SOFTRST (0x2A)
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#define MRF24J40_SECCON0 (0x2C)
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#define MRF24J40_SECCON1 (0x2D)
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#define MRF24J40_TXSTBL (0x2E)
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#define MRF24J40_RXSR (0x30)
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#define MRF24J40_INTSTAT (0x31)
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#define MRF24J40_INTCON (0x32)
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#define MRF24J40_GPIO (0x33)
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#define MRF24J40_TRISGPIO (0x34)
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#define MRF24J40_SLPACK (0x35)
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#define MRF24J40_RFCTL (0x36)
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#define MRF24J40_SECCR2 (0x37)
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#define MRF24J40_BBREG0 (0x38)
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#define MRF24J40_BBREG1 (0x39)
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#define MRF24J40_BBREG2 (0x3A)
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#define MRF24J40_BBREG3 (0x3B)
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#define MRF24J40_BBREG4 (0x3C)
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#define MRF24J40_BBREG6 (0x3E)
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#define MRF24J40_CCAEDTH (0x3F)
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/*
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* TX power setting generation:
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* tx_pwr_set(large_val, small_val) computes the value for the RFCON3 register.
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* Examples:
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* - if we want to set tx power to -11,2 dB then:
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* mrf24j40_tx_pwr_set(#define MRF24J40_PWR_H_MINUS_10dB, #define MRF24J40_PWR_L_MINUS_1.2dB).
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*/
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#define MRF24J40_PWR_H_MINUS_30dB (0b11)
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#define MRF24J40_PWR_H_MINUS_20dB (0b10)
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#define MRF24J40_PWR_H_MINUS_10dB (0b01)
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#define MRF24J40_PWR_H_0dB (0b00)
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#define MRF24J40_PWR_L_MINUS_6_3dB (0b111)
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#define MRF24J40_PWR_L_MINUS_4_9dB (0b110)
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#define MRF24J40_PWR_L_MINUS_3_7dB (0b101)
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#define MRF24J40_PWR_L_MINUS_2_8dB (0b100)
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#define MRF24J40_PWR_L_MINUS_1_9dB (0b011)
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#define MRF24J40_PWR_L_MINUS_1_2dB (0b010)
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#define MRF24J40_PWR_L_MINUS_0_5dB (0b001)
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#define MRF24J40_PWR_L_0dB (0b000)
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#define MRF24J40_TX_PWR_SET(large_val, small_val) ((large_val << 6) | (small_val << 3))
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typedef union _TX_status {
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uint8_t val;
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struct TX_bits {
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uint8_t TXNSTAT:1;
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uint8_t TXG1STAT:1;
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uint8_t TXG2STAT:1;
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uint8_t TXG1FNT:1;
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uint8_t TXG2FNT:1;
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uint8_t CCAFAIL:1;
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uint8_t TXNRETRY:2;
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} bits;
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} TX_status;
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typedef union _INT_status {
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uint8_t val;
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struct INT_bits {
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uint8_t TXNIF:1;
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uint8_t TXG1IF:1;
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uint8_t TXG2IF:1;
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uint8_t RXIF:1;
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uint8_t SECIF:1;
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uint8_t HSYMTMRIF:1;
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uint8_t WAKEIF:1;
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uint8_t SLPIF:1;
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} bits;
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} INT_status;
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#endif /* __MRF24J40_H__ */
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/** @} */
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