11f5bca7c4
Conflicts: cpu/mc1322x/board/redbee-econotag.h
330 lines
10 KiB
C
330 lines
10 KiB
C
/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#ifndef CRM_H
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#define CRM_H
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#include <stdint.h>
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#define CRM_BASE (0x80003000)
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/* Structure-based CRM access */
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struct CRM_struct {
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union {
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uint32_t SYS_CNTL;
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struct CRM_SYS_CNTL {
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uint32_t PWR_SOURCE:2;
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uint32_t PADS_1P8V_SEL:1;
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uint32_t :1;
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uint32_t JTAG_SECU_OFF:1;
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uint32_t XTAL32_EXISTS:1;
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uint32_t :2;
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uint32_t XTAL_CLKDIV:6;
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uint32_t :18;
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} SYS_CNTLbits;
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};
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union {
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uint32_t WU_CNTL;
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struct CRM_WU_CNTL {
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uint32_t TIMER_WU_EN:1;
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uint32_t RTC_WU_EN:1;
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uint32_t HOST_WAKE:1;
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uint32_t AUTO_ADC:1;
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uint32_t EXT_WU_EN:4;
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uint32_t EXT_WU_EDGE:4;
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uint32_t EXT_WU_POL:4;
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uint32_t TIMER_WU_IEN:1;
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uint32_t RTC_WU_IEN:1;
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uint32_t :2;
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uint32_t EXT_WU_IEN:4;
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uint32_t :4;
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uint32_t EXT_OUT_POL:4;
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} WU_CNTLbits;
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};
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union {
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uint32_t SLEEP_CNTL;
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struct CRM_SLEEP_CNTL {
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uint32_t HIB:1;
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uint32_t DOZE:1;
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uint32_t :2;
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uint32_t RAM_RET:2;
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uint32_t MCU_RET:1;
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uint32_t DIG_PAD_EN:1;
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uint32_t :24;
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} SLEEP_CNTLbits;
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};
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union {
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uint32_t BS_CNTL;
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struct CRM_BS_CNTL {
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uint32_t BS_EN:1;
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uint32_t WAIT4IRQ:1;
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uint32_t BS_MAN_EN:1;
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uint32_t :2;
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uint32_t ARM_OFF_TIME:6;
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uint32_t :18;
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} BS_CNTLbits;
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};
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union {
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uint32_t COP_CNTL;
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struct CRM_COP_CNTL {
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uint32_t COP_EN:1;
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uint32_t COP_OUT:1;
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uint32_t COP_WP:1;
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uint32_t :5;
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uint32_t COP_TIMEOUT:7;
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uint32_t :1;
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uint32_t COP_COUNT:7;
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uint32_t :9;
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} COP_CNTLbits;
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};
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uint32_t COP_SERVICE;
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union {
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uint32_t STATUS;
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struct CRM_STATUS {
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uint32_t SLEEP_SYNC:1;
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uint32_t HIB_WU_EVT:1;
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uint32_t DOZE_WU_EVT:1;
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uint32_t RTC_WU_EVT:1;
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uint32_t EXT_WU_EVT:4;
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uint32_t :1;
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uint32_t CAL_DONE:1;
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uint32_t COP_EVT:1;
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uint32_t :6;
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uint32_t VREG_BUCK_RDY:1;
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uint32_t VREG_1P8V_RDY:1;
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uint32_t VREG_1P5V_RDY:1;
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uint32_t :12;
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} STATUSbits;
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};
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union {
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uint32_t MOD_STATUS;
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struct CRM_MOD_STATUS {
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uint32_t ARM_EN:1;
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uint32_t MACA_EN:1;
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uint32_t ASM_EN:1;
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uint32_t SPI_EN:1;
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uint32_t GPIO_EN:1;
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uint32_t UART1_EN:1;
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uint32_t UART2_EN:1;
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uint32_t TMR_EN:1;
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uint32_t RIF_EN:1;
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uint32_t I2C_EN:1;
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uint32_t SSI_EN:1;
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uint32_t SPIF_EN:1;
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uint32_t ADC_EN:1;
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uint32_t :1;
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uint32_t JTA_EN:1;
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uint32_t NEX_EN:1;
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uint32_t :1;
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uint32_t AIM_EN:1;
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uint32_t :14;
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} MOD_STATUSbits;
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};
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uint32_t WU_COUNT;
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uint32_t WU_TIMEOUT;
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uint32_t RTC_COUNT;
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uint32_t RTC_TIMEOUT;
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uint32_t reserved1;
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union {
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uint32_t CAL_CNTL;
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struct CRM_CAL_CNTL {
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uint32_t CAL_TIMEOUT:16;
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uint32_t CAL_EN:1;
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uint32_t CAL_IEN:1;
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uint32_t :14;
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} CAL_CNTLbits;
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};
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uint32_t CAL_COUNT;
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union {
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uint32_t RINGOSC_CNTL;
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struct CRM_RINGOSC_CNTL {
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uint32_t ROSC_EN:1;
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uint32_t :3;
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uint32_t ROSC_FTUNE:5;
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uint32_t ROSC_CTUNE:4;
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uint32_t :19;
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} RINGOSC_CNTLbits;
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};
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union {
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uint32_t XTAL_CNTL;
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struct CRM_XTAL_CNTL {
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uint32_t :8;
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uint32_t XTAL_IBIAS_SEL:4;
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uint32_t :4;
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uint32_t XTAL_FTUNE:5;
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uint32_t XTAL_CTUNE:5;
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uint32_t :6;
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} XTAL_CNTLbits;
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};
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union {
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uint32_t XTAL32_CNTL;
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struct CRM_XTAL32_CNTL {
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uint32_t XTAL32_EN:1;
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uint32_t :3;
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uint32_t XTAL32_GAIN:2;
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uint32_t :26;
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} XTAL32_CNTLbits;
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};
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union {
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uint32_t VREG_CNTL;
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struct CRM_VREG_CNTL {
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uint32_t BUCK_EN:1;
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uint32_t BUCK_SYNC_REC_EN:1;
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uint32_t BUCK_BYPASS_EN:1;
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uint32_t VREG_1P5V_EN:2;
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uint32_t VREG_1P5V_SEL:2;
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uint32_t VREG_1P8V_EN:1;
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uint32_t BUCK_CLKDIV:4;
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uint32_t :20;
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} VREG_CNTLbits;
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};
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uint32_t reserved2;
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uint32_t SW_RST;
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uint32_t reserved3;
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uint32_t reserved4;
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uint32_t reserved5;
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uint32_t reserved6;
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};
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static volatile struct CRM_struct * const CRM = (void *) (CRM_BASE);
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/* COP watchdog timer helpers */
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/* set the cop timout in milliseconds */
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#define cop_timeout_ms(x) (CRM->COP_CNTLbits.COP_TIMEOUT = x/87)
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#define cop_service() (CRM->COP_SERVICE = 0xc0de5afe)
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/* Old register definitions, for compatibility */
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#ifndef REG_NO_COMPAT
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static volatile uint32_t * const CRM_SYS_CNTL = ((volatile uint32_t *) (CRM_BASE+0x00));
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static volatile uint32_t * const CRM_WU_CNTL = ((volatile uint32_t *) (CRM_BASE+0x04));
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static volatile uint32_t * const CRM_SLEEP_CNTL = ((volatile uint32_t *) (CRM_BASE+0x08));
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static volatile uint32_t * const CRM_BS_CNTL = ((volatile uint32_t *) (CRM_BASE+0x0c));
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static volatile uint32_t * const CRM_COP_CNTL = ((volatile uint32_t *) (CRM_BASE+0x10));
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static volatile uint32_t * const CRM_COP_SERVICE= ((volatile uint32_t *) (CRM_BASE+0x14));
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static volatile uint32_t * const CRM_STATUS = ((volatile uint32_t *) (CRM_BASE+0x18));
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static volatile uint32_t * const CRM_MOD_STATUS = ((volatile uint32_t *) (CRM_BASE+0x1c));
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static volatile uint32_t * const CRM_WU_COUNT = ((volatile uint32_t *) (CRM_BASE+0x20));
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static volatile uint32_t * const CRM_WU_TIMEOUT = ((volatile uint32_t *) (CRM_BASE+0x24));
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static volatile uint32_t * const CRM_RTC_COUNT = ((volatile uint32_t *) (CRM_BASE+0x28));
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static volatile uint32_t * const CRM_RTC_TIMEOUT= ((volatile uint32_t *) (CRM_BASE+0x2c));
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static volatile uint32_t * const CRM_CAL_CNTL = ((volatile uint32_t *) (CRM_BASE+0x34));
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static volatile uint32_t * const CRM_CAL_COUNT = ((volatile uint32_t *) (CRM_BASE+0x38));
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static volatile uint32_t * const CRM_RINGOSC_CNT= ((volatile uint32_t *) (CRM_BASE+0x3c));
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static volatile uint32_t * const CRM_XTAL_CNTL = ((volatile uint32_t *) (CRM_BASE+0x40));
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static volatile uint32_t * const CRM_XTAL32_CNTL= ((volatile uint32_t *) (CRM_BASE+0x44));
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static volatile uint32_t * const CRM_VREG_CNTL = ((volatile uint32_t *) (CRM_BASE+0x48));
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static volatile uint32_t * const CRM_SW_RST = ((volatile uint32_t *) (CRM_BASE+0x50));
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/* CRM_SYS_CNTL bit locations */
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static const int XTAL32_EXISTS = 5;
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/* CRM_WU_CNTL bit locations */
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static const int EXT_WU_IEN = 20; /* 4 bits */
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static const int EXT_WU_EN = 4; /* 4 bits */
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static const int EXT_WU_EDGE = 8; /* 4 bits */
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static const int EXT_WU_POL = 12; /* 4 bits */
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static const int TIMER_WU_EN = 0;
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static const int RTC_WU_EN = 1;
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static const int TIMER_WU_IEN = 16;
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static const int RTC_WU_IEN = 17;
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/* CRM_STATUS bit locations */
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static const int EXT_WU_EVT = 4; /* 4 bits, rw1c */
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static const int RTC_WU_EVT = 3; /* rw1c */
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/* RINGOSC_CNTL bit locations */
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static const int ROSC_CTUNE = 9; /* 4 bits */
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static const int ROSC_FTUNE = 4; /* 4 bits */
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static const int ROSC_EN = 0;
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#define ring_osc_on() (CRM->RINGOSC_CNTLbits.ROSC_EN = 1)
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#define ring_osc_off() (CRM->RINGOSC_CNTLbits.ROSC_EN = 0)
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#define REF_OSC 24000000UL /* reference osc. frequency */
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#define NOMINAL_RING_OSC_SEC 2000 /* nominal ring osc. frequency */
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extern uint32_t cal_rtc_secs; /* calibrated 2khz rtc seconds */
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/* XTAL32_CNTL bit locations */
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static const int XTAL32_GAIN = 4; /* 2 bits */
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static const int XTAL32_EN = 0;
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#define xtal32_on() (set_bit(*CRM_XTAL32_CNTL,XTAL32_EN))
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#define xtal32_off() (clear_bit(*CRM_XTAL32_CNTL,XTAL32_EN))
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#define xtal32_exists() (set_bit(*CRM_SYS_CNTL,XTAL32_EXISTS))
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/* enable external wake-ups on kbi 4-7 */
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/* see kbi.h for other kbi specific macros */
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#define enable_ext_wu(kbi) (set_bit(*CRM_WU_CNTL,(EXT_WU_EN+kbi-4)))
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#define disable_ext_wu(kbi) (clear_bit(*CRM_WU_CNTL,(EXT_WU_EN+kbi-4)))
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#define is_ext_wu_evt(kbi) (bit_is_set(*CRM_STATUS,(EXT_WU_EVT+kbi-4)))
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#define clear_ext_wu_evt(kbi) (set_bit(*CRM_STATUS,(EXT_WU_EVT+kbi-4))) /* r1wc bit */
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/* enable wake-up timer */
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#define enable_timer_wu_irq() ((set_bit(*CRM_WU_CNTL,(TIMER_WU_IEN))))
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#define disable_timer_wu_irq() ((clear_bit(*CRM_WU_CNTL,(TIMER_WU_IEN))))
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#define enable_timer_wu() ((set_bit(*CRM_WU_CNTL,(TIMER_WU_EN))))
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#define disable_timer_wu() ((clear_bit(*CRM_WU_CNTL,(TIMER_WU_EN))))
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/* enable wake-up from RTC compare */
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#define enable_rtc_wu_irq() (set_bit(*CRM_WU_CNTL,RTC_WU_IEN))
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#define disable_rtc_wu_irq() (clear_bit(*CRM_WU_CNTL,RTC_WU_IEN))
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#define enable_rtc_wu() ((set_bit(*CRM_WU_CNTL,(RTC_WU_EN))))
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#define disable_rtc_wu() ((clear_bit(*CRM_WU_CNTL,(RTC_WU_EN))))
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#define clear_rtc_wu_evt() (set_bit(*CRM_STATUS,RTC_WU_EVT))
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#define rtc_wu_evt() (bit_is_set(*CRM_STATUS,RTC_WU_EVT))
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#define SLEEP_MODE_HIBERNATE bit(0)
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#define SLEEP_MODE_DOZE bit(1)
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#define SLEEP_PAD_PWR bit(7)
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#define SLEEP_RETAIN_MCU bit(6)
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#define sleep_ram_retain(x) (x<<4) /* 0-3 */
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#define SLEEP_RAM_8K sleep_ram_retain(0)
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#define SLEEP_RAM_32K sleep_ram_retain(1)
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#define SLEEP_RAM_64K sleep_ram_retain(2)
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#define SLEEP_RAM_96K sleep_ram_retain(3)
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#define pack_XTAL_CNTL(ctune4pf, ctune, ftune, ibias) \
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(*CRM_XTAL_CNTL = ((ctune4pf << 25) | (ctune << 21) | ( ftune << 16) | (ibias << 8) | 0x52))
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#endif /* REG_NO_COMPAT */
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#endif
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