04bbba6c12
Rename guhRF platform to osd-merkur-256, previous osd-merkur platform is now osd-merkur-128. Also check that everything is consistent. Add both platforms to the regression tests. Move redundant files in platform dev directory of both platforms to cpu/avr/dev. Note that this probably needs some rework. Already discovered some inconsistency in io definitions of both devices in the avr/io.h includes. Added a workaround in the obvious cases. The platform makefiles now set correct parameters for bootloader and for reading mac-address from flash memory. Factor the flash programming into cpu/avr and platform/osd-merkur* and rework *all* osd example makefiles to use the new settings. Also update all the flash.sh and run.sh to use the new settings. The suli ledstrip modules (and osd example) have also been removed.
546 lines
16 KiB
C
546 lines
16 KiB
C
/*
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twi.c - TWI/I2C library for Wiring & Arduino
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Copyright (c) 2006 Nicholas Zambetti. All right reserved.
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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Modified 2012 by Todd Krein (todd@krein.org) to implement repeated starts
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*/
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#include <math.h>
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#include <stdlib.h>
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#include <inttypes.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <compat/twi.h>
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#include "Arduino.h" // for digitalWrite
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#ifndef cbi
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#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit))
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#endif
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#ifndef sbi
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#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit))
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#endif
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#include "pins_arduino.h"
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#include "twi.h"
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static volatile uint8_t twi_state;
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static volatile uint8_t twi_slarw;
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static volatile uint8_t twi_sendStop; // should the transaction end with a stop
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static volatile uint8_t twi_inRepStart; // in the middle of a repeated start
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static void (*twi_onSlaveTransmit)(void);
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static void (*twi_onSlaveReceive)(uint8_t*, int);
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static uint8_t twi_masterBuffer[TWI_BUFFER_LENGTH];
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static volatile uint8_t twi_masterBufferIndex;
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static volatile uint8_t twi_masterBufferLength;
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static uint8_t twi_txBuffer[TWI_BUFFER_LENGTH];
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static volatile uint8_t twi_txBufferIndex;
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static volatile uint8_t twi_txBufferLength;
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static uint8_t twi_rxBuffer[TWI_BUFFER_LENGTH];
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static volatile uint8_t twi_rxBufferIndex;
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static volatile uint8_t twi_error;
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/*
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* Function twi_init
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* Desc readys twi pins and sets twi bitrate
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* Input none
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* Output none
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*/
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void twi_init(void)
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{
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// initialize state
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twi_state = TWI_READY;
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twi_sendStop = true; // default value
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twi_inRepStart = false;
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// activate internal pullups for twi.
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digitalWrite(SDA, 1);
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digitalWrite(SCL, 1);
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// initialize twi prescaler and bit rate
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cbi(TWSR, TWPS0);
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cbi(TWSR, TWPS1);
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TWBR = ((F_CPU / TWI_FREQ) - 16) / 2;
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/* twi bit rate formula from atmega128 manual pg 204
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SCL Frequency = CPU Clock Frequency / (16 + (2 * TWBR))
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note: TWBR should be 10 or higher for master mode
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It is 72 for a 16mhz Wiring board with 100kHz TWI */
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// enable twi module, acks, and twi interrupt
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TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWEA);
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}
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/*
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* Function twi_disable
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* Desc disables twi pins
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* Input none
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* Output none
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*/
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void twi_disable(void)
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{
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// disable twi module, acks, and twi interrupt
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TWCR &= ~(_BV(TWEN) | _BV(TWIE) | _BV(TWEA));
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// deactivate internal pullups for twi.
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digitalWrite(SDA, 0);
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digitalWrite(SCL, 0);
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}
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/*
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* Function twi_slaveInit
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* Desc sets slave address and enables interrupt
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* Input none
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* Output none
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*/
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void twi_setAddress(uint8_t address)
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{
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// set twi slave address (skip over TWGCE bit)
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TWAR = address << 1;
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}
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/*
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* Function twi_readFrom
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* Desc attempts to become twi bus master and read a
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* series of bytes from a device on the bus
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* Input address: 7bit i2c device address
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* data: pointer to byte array
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* length: number of bytes to read into array
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* sendStop: Boolean indicating whether to send a stop at the end
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* Output number of bytes read
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*/
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uint8_t twi_readFrom(uint8_t address, uint8_t* data, uint8_t length, uint8_t sendStop)
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{
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uint8_t i;
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// ensure data will fit into buffer
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if(TWI_BUFFER_LENGTH < length){
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return 0;
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}
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// wait until twi is ready, become master receiver
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while(TWI_READY != twi_state){
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continue;
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}
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twi_state = TWI_MRX;
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twi_sendStop = sendStop;
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// reset error state (0xFF.. no error occured)
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twi_error = 0xFF;
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// initialize buffer iteration vars
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twi_masterBufferIndex = 0;
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twi_masterBufferLength = length-1; // This is not intuitive, read on...
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// On receive, the previously configured ACK/NACK setting is transmitted in
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// response to the received byte before the interrupt is signalled.
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// Therefor we must actually set NACK when the _next_ to last byte is
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// received, causing that NACK to be sent in response to receiving the last
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// expected byte of data.
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// build sla+w, slave device address + w bit
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twi_slarw = TW_READ;
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twi_slarw |= address << 1;
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if (true == twi_inRepStart) {
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// if we're in the repeated start state, then we've already sent the start,
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// (@@@ we hope), and the TWI statemachine is just waiting for the address byte.
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// We need to remove ourselves from the repeated start state before we enable interrupts,
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// since the ISR is ASYNC, and we could get confused if we hit the ISR before cleaning
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// up. Also, don't enable the START interrupt. There may be one pending from the
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// repeated start that we sent outselves, and that would really confuse things.
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twi_inRepStart = false; // remember, we're dealing with an ASYNC ISR
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do {
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TWDR = twi_slarw;
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} while(TWCR & _BV(TWWC));
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TWCR = _BV(TWINT) | _BV(TWEA) | _BV(TWEN) | _BV(TWIE); // enable INTs, but not START
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}
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else
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// send start condition
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TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWEA) | _BV(TWINT) | _BV(TWSTA);
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// wait for read operation to complete
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while(TWI_MRX == twi_state){
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continue;
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}
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if (twi_masterBufferIndex < length)
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length = twi_masterBufferIndex;
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// copy twi buffer to data
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for(i = 0; i < length; ++i){
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data[i] = twi_masterBuffer[i];
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}
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return length;
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}
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/*
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* Function twi_writeTo
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* Desc attempts to become twi bus master and write a
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* series of bytes to a device on the bus
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* Input address: 7bit i2c device address
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* data: pointer to byte array
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* length: number of bytes in array
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* wait: boolean indicating to wait for write or not
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* sendStop: boolean indicating whether or not to send a stop at the end
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* Output 0 .. success
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* 1 .. length to long for buffer
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* 2 .. address send, NACK received
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* 3 .. data send, NACK received
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* 4 .. other twi error (lost bus arbitration, bus error, ..)
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*/
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uint8_t twi_writeTo(uint8_t address, uint8_t* data, uint8_t length, uint8_t wait, uint8_t sendStop)
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{
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uint8_t i;
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// ensure data will fit into buffer
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if(TWI_BUFFER_LENGTH < length){
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return 1;
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}
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// wait until twi is ready, become master transmitter
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while(TWI_READY != twi_state){
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continue;
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}
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twi_state = TWI_MTX;
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twi_sendStop = sendStop;
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// reset error state (0xFF.. no error occured)
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twi_error = 0xFF;
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// initialize buffer iteration vars
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twi_masterBufferIndex = 0;
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twi_masterBufferLength = length;
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// copy data to twi buffer
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for(i = 0; i < length; ++i){
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twi_masterBuffer[i] = data[i];
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}
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// build sla+w, slave device address + w bit
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twi_slarw = TW_WRITE;
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twi_slarw |= address << 1;
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// if we're in a repeated start, then we've already sent the START
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// in the ISR. Don't do it again.
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//
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if (true == twi_inRepStart) {
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// if we're in the repeated start state, then we've already sent the start,
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// (@@@ we hope), and the TWI statemachine is just waiting for the address byte.
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// We need to remove ourselves from the repeated start state before we enable interrupts,
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// since the ISR is ASYNC, and we could get confused if we hit the ISR before cleaning
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// up. Also, don't enable the START interrupt. There may be one pending from the
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// repeated start that we sent outselves, and that would really confuse things.
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twi_inRepStart = false; // remember, we're dealing with an ASYNC ISR
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do {
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TWDR = twi_slarw;
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} while(TWCR & _BV(TWWC));
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TWCR = _BV(TWINT) | _BV(TWEA) | _BV(TWEN) | _BV(TWIE); // enable INTs, but not START
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}
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else
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// send start condition
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TWCR = _BV(TWINT) | _BV(TWEA) | _BV(TWEN) | _BV(TWIE) | _BV(TWSTA); // enable INTs
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// wait for write operation to complete
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while(wait && (TWI_MTX == twi_state)){
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continue;
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}
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if (twi_error == 0xFF)
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return 0; // success
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else if (twi_error == TW_MT_SLA_NACK)
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return 2; // error: address send, nack received
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else if (twi_error == TW_MT_DATA_NACK)
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return 3; // error: data send, nack received
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else
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return 4; // other twi error
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}
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/*
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* Function twi_transmit
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* Desc fills slave tx buffer with data
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* must be called in slave tx event callback
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* Input data: pointer to byte array
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* length: number of bytes in array
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* Output 1 length too long for buffer
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* 2 not slave transmitter
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* 0 ok
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*/
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uint8_t twi_transmit(const uint8_t* data, uint8_t length)
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{
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uint8_t i;
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// ensure data will fit into buffer
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if(TWI_BUFFER_LENGTH < length){
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return 1;
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}
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// ensure we are currently a slave transmitter
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if(TWI_STX != twi_state){
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return 2;
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}
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// set length and copy data into tx buffer
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twi_txBufferLength = length;
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for(i = 0; i < length; ++i){
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twi_txBuffer[i] = data[i];
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}
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return 0;
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}
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/*
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* Function twi_attachSlaveRxEvent
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* Desc sets function called before a slave read operation
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* Input function: callback function to use
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* Output none
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*/
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void twi_attachSlaveRxEvent( void (*function)(uint8_t*, int) )
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{
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twi_onSlaveReceive = function;
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}
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/*
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* Function twi_attachSlaveTxEvent
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* Desc sets function called before a slave write operation
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* Input function: callback function to use
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* Output none
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*/
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void twi_attachSlaveTxEvent( void (*function)(void) )
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{
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twi_onSlaveTransmit = function;
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}
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/*
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* Function twi_reply
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* Desc sends byte or readys receive line
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* Input ack: byte indicating to ack or to nack
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* Output none
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*/
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void twi_reply(uint8_t ack)
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{
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// transmit master read ready signal, with or without ack
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if(ack){
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TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT) | _BV(TWEA);
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}else{
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TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT);
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}
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}
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/*
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* Function twi_stop
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* Desc relinquishes bus master status
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* Input none
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* Output none
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*/
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void twi_stop(void)
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{
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// send stop condition
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TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWEA) | _BV(TWINT) | _BV(TWSTO);
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// wait for stop condition to be exectued on bus
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// TWINT is not set after a stop condition!
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while(TWCR & _BV(TWSTO)){
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continue;
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}
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// update twi state
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twi_state = TWI_READY;
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}
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/*
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* Function twi_releaseBus
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* Desc releases bus control
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* Input none
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* Output none
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*/
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void twi_releaseBus(void)
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{
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// release bus
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TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWEA) | _BV(TWINT);
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// update twi state
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twi_state = TWI_READY;
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}
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ISR(TWI_vect)
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{
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switch(TW_STATUS){
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// All Master
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case TW_START: // sent start condition
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case TW_REP_START: // sent repeated start condition
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// copy device address and r/w bit to output register and ack
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TWDR = twi_slarw;
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twi_reply(1);
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break;
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// Master Transmitter
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case TW_MT_SLA_ACK: // slave receiver acked address
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case TW_MT_DATA_ACK: // slave receiver acked data
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// if there is data to send, send it, otherwise stop
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if(twi_masterBufferIndex < twi_masterBufferLength){
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// copy data to output register and ack
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TWDR = twi_masterBuffer[twi_masterBufferIndex++];
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twi_reply(1);
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}else{
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if (twi_sendStop)
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twi_stop();
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else {
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twi_inRepStart = true; // we're gonna send the START
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// don't enable the interrupt. We'll generate the start, but we
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// avoid handling the interrupt until we're in the next transaction,
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// at the point where we would normally issue the start.
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TWCR = _BV(TWINT) | _BV(TWSTA)| _BV(TWEN) ;
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twi_state = TWI_READY;
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}
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}
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break;
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case TW_MT_SLA_NACK: // address sent, nack received
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twi_error = TW_MT_SLA_NACK;
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twi_stop();
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break;
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case TW_MT_DATA_NACK: // data sent, nack received
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twi_error = TW_MT_DATA_NACK;
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twi_stop();
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break;
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case TW_MT_ARB_LOST: // lost bus arbitration
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twi_error = TW_MT_ARB_LOST;
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twi_releaseBus();
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break;
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// Master Receiver
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case TW_MR_DATA_ACK: // data received, ack sent
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// put byte into buffer
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twi_masterBuffer[twi_masterBufferIndex++] = TWDR;
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case TW_MR_SLA_ACK: // address sent, ack received
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// ack if more bytes are expected, otherwise nack
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if(twi_masterBufferIndex < twi_masterBufferLength){
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twi_reply(1);
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}else{
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twi_reply(0);
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}
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break;
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case TW_MR_DATA_NACK: // data received, nack sent
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// put final byte into buffer
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twi_masterBuffer[twi_masterBufferIndex++] = TWDR;
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if (twi_sendStop)
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twi_stop();
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else {
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twi_inRepStart = true; // we're gonna send the START
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// don't enable the interrupt. We'll generate the start, but we
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// avoid handling the interrupt until we're in the next transaction,
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// at the point where we would normally issue the start.
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TWCR = _BV(TWINT) | _BV(TWSTA)| _BV(TWEN) ;
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twi_state = TWI_READY;
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}
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break;
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case TW_MR_SLA_NACK: // address sent, nack received
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twi_stop();
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break;
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// TW_MR_ARB_LOST handled by TW_MT_ARB_LOST case
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// Slave Receiver
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case TW_SR_SLA_ACK: // addressed, returned ack
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case TW_SR_GCALL_ACK: // addressed generally, returned ack
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case TW_SR_ARB_LOST_SLA_ACK: // lost arbitration, returned ack
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case TW_SR_ARB_LOST_GCALL_ACK: // lost arbitration, returned ack
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// enter slave receiver mode
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twi_state = TWI_SRX;
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// indicate that rx buffer can be overwritten and ack
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twi_rxBufferIndex = 0;
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twi_reply(1);
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break;
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case TW_SR_DATA_ACK: // data received, returned ack
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case TW_SR_GCALL_DATA_ACK: // data received generally, returned ack
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// if there is still room in the rx buffer
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if(twi_rxBufferIndex < TWI_BUFFER_LENGTH){
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// put byte in buffer and ack
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twi_rxBuffer[twi_rxBufferIndex++] = TWDR;
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twi_reply(1);
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}else{
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// otherwise nack
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twi_reply(0);
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}
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break;
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case TW_SR_STOP: // stop or repeated start condition received
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// ack future responses and leave slave receiver state
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twi_releaseBus();
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// put a null char after data if there's room
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if(twi_rxBufferIndex < TWI_BUFFER_LENGTH){
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twi_rxBuffer[twi_rxBufferIndex] = '\0';
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}
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// callback to user defined callback
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twi_onSlaveReceive(twi_rxBuffer, twi_rxBufferIndex);
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// since we submit rx buffer to "wire" library, we can reset it
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twi_rxBufferIndex = 0;
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break;
|
|
case TW_SR_DATA_NACK: // data received, returned nack
|
|
case TW_SR_GCALL_DATA_NACK: // data received generally, returned nack
|
|
// nack back at master
|
|
twi_reply(0);
|
|
break;
|
|
|
|
// Slave Transmitter
|
|
case TW_ST_SLA_ACK: // addressed, returned ack
|
|
case TW_ST_ARB_LOST_SLA_ACK: // arbitration lost, returned ack
|
|
// enter slave transmitter mode
|
|
twi_state = TWI_STX;
|
|
// ready the tx buffer index for iteration
|
|
twi_txBufferIndex = 0;
|
|
// set tx buffer length to be zero, to verify if user changes it
|
|
twi_txBufferLength = 0;
|
|
// request for txBuffer to be filled and length to be set
|
|
// note: user must call twi_transmit(bytes, length) to do this
|
|
twi_onSlaveTransmit();
|
|
// if they didn't change buffer & length, initialize it
|
|
if(0 == twi_txBufferLength){
|
|
twi_txBufferLength = 1;
|
|
twi_txBuffer[0] = 0x00;
|
|
}
|
|
// transmit first byte from buffer, fall
|
|
case TW_ST_DATA_ACK: // byte sent, ack returned
|
|
// copy data to output register
|
|
TWDR = twi_txBuffer[twi_txBufferIndex++];
|
|
// if there is more to send, ack, otherwise nack
|
|
if(twi_txBufferIndex < twi_txBufferLength){
|
|
twi_reply(1);
|
|
}else{
|
|
twi_reply(0);
|
|
}
|
|
break;
|
|
case TW_ST_DATA_NACK: // received nack, we are done
|
|
case TW_ST_LAST_DATA: // received ack, but we are done already!
|
|
// ack future responses
|
|
twi_reply(1);
|
|
// leave slave receiver state
|
|
twi_state = TWI_READY;
|
|
break;
|
|
|
|
// All
|
|
case TW_NO_INFO: // no state information
|
|
break;
|
|
case TW_BUS_ERROR: // bus error, illegal stop/start
|
|
twi_error = TW_BUS_ERROR;
|
|
twi_stop();
|
|
break;
|
|
}
|
|
}
|
|
|