d958ee3125
Since the introduction of a purpose-written routine, the old generic one (which was written in asm) was never being used. There was a configuration directive which allowed us to switch between the two. All references to this configuration directive have also been removed.
386 lines
9.5 KiB
C
386 lines
9.5 KiB
C
#include "contiki.h"
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#include "sys/clock.h"
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#include "sys/autostart.h"
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#include "dev/serial-line.h"
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#include "dev/slip.h"
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#include "dev/bus.h"
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#include "dev/leds.h"
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#include "dev/uart1.h"
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#include "dev/dma.h"
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#include "dev/models.h"
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#include "dev/cc2430_rf.h"
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#include "dev/watchdog.h"
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#include "dev/lpm.h"
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#include "net/rime.h"
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#include "net/netstack.h"
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#include "net/mac/frame802154.h"
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#include "sensinode-debug.h"
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#include "dev/watchdog-cc2430.h"
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#include "dev/sensinode-sensors.h"
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#include "disco.h"
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#include "contiki-lib.h"
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#include "contiki-net.h"
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unsigned short node_id = 0; /* Manually sets MAC address when > 0 */
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#if VIZTOOL_CONF_ON
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PROCESS_NAME(viztool_process);
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#endif
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#if BATMON_CONF_ON
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PROCESS_NAME(batmon_process);
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#endif
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#if SHORTCUTS_CONF_NETSTACK
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static __data int len;
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#endif
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#ifdef STARTUP_CONF_VERBOSE
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#define STARTUP_VERBOSE STARTUP_CONF_VERBOSE
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#else
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#define STARTUP_VERBOSE 0
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#endif
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#if STARTUP_VERBOSE
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#define PUTSTRING(...) putstring(__VA_ARGS__)
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#define PUTHEX(...) puthex(__VA_ARGS__)
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#define PUTBIN(...) putbin(__VA_ARGS__)
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#define PUTCHAR(...) putchar(__VA_ARGS__)
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#else
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#define PUTSTRING(...) do {} while(0)
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#define PUTHEX(...) do {} while(0)
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#define PUTBIN(...) do {} while(0)
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#define PUTCHAR(...) do {} while(0)
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#endif
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#if !CLOCK_CONF_ACCURATE
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extern volatile __data clock_time_t count;
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/* accurate clock is stack hungry */
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extern volatile __bit sleep_flag;
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#endif
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extern rimeaddr_t rimeaddr_node_addr;
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static __data int r;
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#if ENERGEST_CONF_ON
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static unsigned long irq_energest = 0;
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#define ENERGEST_IRQ_SAVE(a) do { \
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a = energest_type_time(ENERGEST_TYPE_IRQ); } while(0)
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#define ENERGEST_IRQ_RESTORE(a) do { \
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energest_type_set(ENERGEST_TYPE_IRQ, a); } while(0)
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#else
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#define ENERGEST_IRQ_SAVE(a) do {} while(0)
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#define ENERGEST_IRQ_RESTORE(a) do {} while(0)
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#endif
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/*---------------------------------------------------------------------------*/
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static void
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fade(int l)
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{
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volatile int i, a;
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int k, j;
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for(k = 0; k < 400; ++k) {
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j = k > 200? 400 - k: k;
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leds_on(l);
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for(i = 0; i < j; ++i) {
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a = i;
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}
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leds_off(l);
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for(i = 0; i < 200 - j; ++i) {
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a = i;
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}
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}
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}
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/*---------------------------------------------------------------------------*/
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static void
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set_rime_addr(void)
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{
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uint8_t *addr_long = NULL;
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uint16_t addr_short = 0;
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char i;
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__code unsigned char * macp;
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PUTSTRING("Rime is 0x");
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PUTHEX(sizeof(rimeaddr_t));
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PUTSTRING(" bytes long\n");
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if(node_id == 0) {
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PUTSTRING("Reading MAC from flash\n");
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/*
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* The MAC is always stored in 0x1FFF8 of our flash. This maps to address
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* 0xFFF8 of our CODE segment, when BANK3 is selected.
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* Switch to BANK3, read 8 bytes starting at 0xFFF8 and restore last BANK
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* Since we are called from main(), this MUST be BANK1 or something is very
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* wrong. This code can be used even without banking
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*/
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/* Don't interrupt us to make sure no BANK switching happens while working */
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DISABLE_INTERRUPTS();
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/* Switch to BANK3, map CODE: 0x8000 – 0xFFFF to FLASH: 0x18000 – 0x1FFFF */
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FMAP = 3;
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/* Set our pointer to the correct address and fetch 8 bytes of MAC */
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macp = (__code unsigned char *) 0xFFF8;
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for(i = (RIMEADDR_SIZE - 1); i >= 0; --i) {
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rimeaddr_node_addr.u8[i] = *macp;
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macp++;
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}
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/* Remap 0x8000 – 0xFFFF to BANK1 */
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FMAP = 1;
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ENABLE_INTERRUPTS();
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} else {
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PUTSTRING("Setting manual address from node_id\n");
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rimeaddr_node_addr.u8[RIMEADDR_SIZE - 1] = node_id >> 8;
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rimeaddr_node_addr.u8[RIMEADDR_SIZE - 2] = node_id & 0xff;
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}
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/* Now the address is stored MSB first */
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#if STARTUP_VERBOSE
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PUTSTRING("Rime configured with address ");
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for(i = 0; i < RIMEADDR_SIZE - 1; i++) {
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PUTHEX(rimeaddr_node_addr.u8[i]);
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PUTCHAR(':');
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}
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PUTHEX(rimeaddr_node_addr.u8[i]);
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PUTCHAR('\n');
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#endif
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/* Set the cc2430 RF addresses */
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#if (RIMEADDR_SIZE==8)
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addr_short = (rimeaddr_node_addr.u8[6] * 256) + rimeaddr_node_addr.u8[7];
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addr_long = (uint8_t *) &rimeaddr_node_addr;
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#else
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addr_short = (rimeaddr_node_addr.u8[0] * 256) + rimeaddr_node_addr.u8[1];
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#endif
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cc2430_rf_set_addr(IEEE802154_PANID, addr_short, addr_long);
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}
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/*---------------------------------------------------------------------------*/
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int
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main(void)
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{
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/* Hardware initialization */
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bus_init();
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rtimer_init();
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/* model-specific h/w init. */
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model_init();
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/* Init LEDs here */
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leds_init();
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fade(LEDS_GREEN);
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/* initialize process manager. */
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process_init();
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/* Init UART1 */
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uart1_init();
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#if DMA_ON
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dma_init();
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#endif
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#if SLIP_ARCH_CONF_ENABLE
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/* On cc2430, the argument is not used */
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slip_arch_init(0);
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#else
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uart1_set_input(serial_line_input_byte);
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serial_line_init();
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#endif
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PUTSTRING("##########################################\n");
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putstring(CONTIKI_VERSION_STRING "\n");
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putstring(SENSINODE_MODEL " (CC24");
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puthex(((CHIPID >> 3) | 0x20));
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putstring("-" FLASH_SIZE ")\n");
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#if STARTUP_VERBOSE
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#ifdef HAVE_SDCC_BANKING
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PUTSTRING(" With Banking.\n");
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#endif /* HAVE_SDCC_BANKING */
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#ifdef SDCC_MODEL_LARGE
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PUTSTRING(" --model-large\n");
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#endif /* SDCC_MODEL_LARGE */
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#ifdef SDCC_MODEL_HUGE
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PUTSTRING(" --model-huge\n");
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#endif /* SDCC_MODEL_HUGE */
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#ifdef SDCC_STACK_AUTO
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PUTSTRING(" --stack-auto\n");
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#endif /* SDCC_STACK_AUTO */
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PUTCHAR('\n');
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PUTSTRING(" Net: ");
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PUTSTRING(NETSTACK_NETWORK.name);
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PUTCHAR('\n');
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PUTSTRING(" MAC: ");
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PUTSTRING(NETSTACK_MAC.name);
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PUTCHAR('\n');
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PUTSTRING(" RDC: ");
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PUTSTRING(NETSTACK_RDC.name);
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PUTCHAR('\n');
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PUTSTRING("##########################################\n");
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#endif
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watchdog_init();
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/* Initialise the cc2430 RNG engine. */
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random_init(0);
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/* start services */
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process_start(&etimer_process, NULL);
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ctimer_init();
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/* initialize the netstack */
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netstack_init();
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set_rime_addr();
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#if BUTTON_SENSOR_ON || ADC_SENSOR_ON
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process_start(&sensors_process, NULL);
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sensinode_sensors_activate();
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#endif
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#if UIP_CONF_IPV6
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memcpy(&uip_lladdr.addr, &rimeaddr_node_addr, sizeof(uip_lladdr.addr));
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queuebuf_init();
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process_start(&tcpip_process, NULL);
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#if DISCO_ENABLED
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process_start(&disco_process, NULL);
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#endif /* DISCO_ENABLED */
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#if VIZTOOL_CONF_ON
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process_start(&viztool_process, NULL);
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#endif
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#if (!UIP_CONF_IPV6_RPL)
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{
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uip_ipaddr_t ipaddr;
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uip_ip6addr(&ipaddr, 0x2001, 0x630, 0x301, 0x6453, 0, 0, 0, 0);
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uip_ds6_set_addr_iid(&ipaddr, &uip_lladdr);
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uip_ds6_addr_add(&ipaddr, 0, ADDR_TENTATIVE);
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}
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#endif /* UIP_CONF_IPV6_RPL */
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#endif /* UIP_CONF_IPV6 */
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/*
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* Acknowledge the UART1 RX interrupt
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* now that we're sure we are ready to process it
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*/
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model_uart_intr_en();
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energest_init();
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ENERGEST_ON(ENERGEST_TYPE_CPU);
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fade(LEDS_RED);
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#if BATMON_CONF_ON
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process_start(&batmon_process, NULL);
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#endif
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autostart_start(autostart_processes);
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watchdog_start();
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while(1) {
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do {
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/* Reset watchdog and handle polls and events */
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watchdog_periodic();
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/**/
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#if !CLOCK_CONF_ACCURATE
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if(sleep_flag) {
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if(etimer_pending() &&
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(etimer_next_expiration_time() - count - 1) > MAX_TICKS) { /*core/sys/etimer.c*/
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etimer_request_poll();
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}
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sleep_flag = 0;
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}
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#endif
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r = process_run();
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} while(r > 0);
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#if SHORTCUTS_CONF_NETSTACK
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len = NETSTACK_RADIO.pending_packet();
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if(len) {
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packetbuf_clear();
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len = NETSTACK_RADIO.read(packetbuf_dataptr(), PACKETBUF_SIZE);
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if(len > 0) {
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packetbuf_set_datalen(len);
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NETSTACK_RDC.input();
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}
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}
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#endif
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#if LPM_MODE
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#if (LPM_MODE==LPM_MODE_PM2)
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SLEEP &= ~OSC_PD; /* Make sure both HS OSCs are on */
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while(!(SLEEP & HFRC_STB)); /* Wait for RCOSC to be stable */
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CLKCON |= OSC; /* Switch to the RCOSC */
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while(!(CLKCON & OSC)); /* Wait till it's happened */
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SLEEP |= OSC_PD; /* Turn the other one off */
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#endif /* LPM_MODE==LPM_MODE_PM2 */
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/*
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* Set MCU IDLE or Drop to PM1. Any interrupt will take us out of LPM
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* Sleep Timer will wake us up in no more than 7.8ms (max idle interval)
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*/
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SLEEP = (SLEEP & 0xFC) | (LPM_MODE - 1);
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#if (LPM_MODE==LPM_MODE_PM2)
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/*
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* Wait 3 NOPs. Either an interrupt occurred and SLEEP.MODE was cleared or
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* no interrupt occurred and we can safely power down
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*/
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__asm
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nop
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nop
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nop
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__endasm;
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if (SLEEP & SLEEP_MODE0) {
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#endif /* LPM_MODE==LPM_MODE_PM2 */
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ENERGEST_OFF(ENERGEST_TYPE_CPU);
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ENERGEST_ON(ENERGEST_TYPE_LPM);
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/* We are only interested in IRQ energest while idle or in LPM */
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ENERGEST_IRQ_RESTORE(irq_energest);
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/* Go IDLE or Enter PM1 */
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PCON |= IDLE;
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/* First instruction upon exiting PM1 must be a NOP */
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__asm
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nop
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__endasm;
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/* Remember energest IRQ for next pass */
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ENERGEST_IRQ_SAVE(irq_energest);
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ENERGEST_ON(ENERGEST_TYPE_CPU);
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ENERGEST_OFF(ENERGEST_TYPE_LPM);
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#if (LPM_MODE==LPM_MODE_PM2)
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SLEEP &= ~OSC_PD; /* Make sure both HS OSCs are on */
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while(!(SLEEP & XOSC_STB)); /* Wait for XOSC to be stable */
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CLKCON &= ~OSC; /* Switch to the XOSC */
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/*
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* On occasion the XOSC is reported stable when in reality it's not.
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* We need to wait for a safeguard of 64us or more before selecting it
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*/
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clock_delay(10);
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while(CLKCON & OSC); /* Wait till it's happened */
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}
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#endif /* LPM_MODE==LPM_MODE_PM2 */
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#endif /* LPM_MODE */
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}
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}
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/*---------------------------------------------------------------------------*/
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