a5046e83c7
This is a general cleanup of things like code style issues and code structure of the STM32w port to make it more like the rest of Contiki is structured.
260 lines
6.3 KiB
C
260 lines
6.3 KiB
C
/** @file hal/micro/cortexm3/uart.c
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* @brief STM32W uart drivers, supporting IAR's standard library
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* IO routines.
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*
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* <!--(C) COPYRIGHT 2010 STMicroelectronics. All rights reserved. -->
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*/
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#include PLATFORM_HEADER
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#include "hal/micro/micro-common.h"
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#include "hal/micro/cortexm3/micro-common.h"
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#include "uart.h"
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#ifdef __GNUC__
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#include <sys/stat.h>
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#include <stdio.h>
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#define _LLIO_STDIN ((int) stdin)
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#define _LLIO_STDOUT ((int) stdout)
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#define _LLIO_STDERR ((int) stderr)
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#define _LLIO_ERROR (-1)
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#define __write _write
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#define __read _read
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#undef putchar
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void __io_putchar( char c );
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int putchar (int c)
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{
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__io_putchar((char) c);
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return c;
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}
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#endif
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#define RECEIVE_QUEUE_SIZE (128)
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uint8_t rxQ[RECEIVE_QUEUE_SIZE];
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uint16_t rxHead;
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uint16_t rxTail;
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uint16_t rxUsed;
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//////////////////////////////////////////////////////////////////////////////
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// Initialization
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void uartInit(uint32_t baudrate, uint8_t databits, SerialParity parity, uint8_t stopbits)
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{
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uint32_t tempcfg;
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uint32_t tmp;
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assert( (baudrate >= 300) && (baudrate <=921600) );
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tmp = (2*12000000L + baudrate/2) / baudrate;
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SC1_UARTFRAC = tmp & 1;
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SC1_UARTPER = tmp / 2;
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if(databits == 7) {
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tempcfg = 0;
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} else {
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tempcfg = SC_UART8BIT;
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}
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if (parity == PARITY_ODD) {
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tempcfg |= SC_UARTPAR | SC_UARTODD;
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} else if( parity == PARITY_EVEN ) {
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tempcfg |= SC_UARTPAR;
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}
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if ((stopbits & 0x0F) >= 2) {
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tempcfg |= SC_UART2STP;
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}
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SC1_UARTCFG = tempcfg;
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SC1_MODE = SC1_MODE_UART;
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rxHead=0;
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rxTail=0;
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rxUsed=0;
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halGpioConfig(PORTB_PIN(1),GPIOCFG_OUT_ALT);
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halGpioConfig(PORTB_PIN(2),GPIOCFG_IN);
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// Make the RX Valid interrupt level sensitive (instead of edge)
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SC1_INTMODE = SC_RXVALLEVEL;
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// Enable just RX interrupts; TX interrupts are controlled separately
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INT_SC1CFG |= (INT_SCRXVAL |
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INT_SCRXOVF |
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INT_SC1FRMERR |
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INT_SC1PARERR);
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INT_SC1FLAG = 0xFFFF; // Clear any stale interrupts
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INT_CFGSET = INT_SC1;
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}
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//////////////////////////////////////////////////////////////////////////////
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// Transmit
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// IAR Standard library hook for serial output
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size_t __write(int handle, const unsigned char * buffer, size_t size)
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{
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size_t nChars = 0;
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/* This template only writes to "standard out" and "standard err",
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* for all other file handles it returns failure. */
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if (handle != _LLIO_STDOUT && handle != _LLIO_STDERR) {
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return _LLIO_ERROR;
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}
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if (buffer == 0) {
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// This means that we should flush internal buffers.
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//spin until TX complete (TX is idle)
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while ((SC1_UARTSTAT&SC_UARTTXIDLE)!=SC_UARTTXIDLE) {}
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return 0;
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}
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// ensure port is configured for UART
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if(SC1_MODE != SC1_MODE_UART) {
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return _LLIO_ERROR;
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}
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while(size--) {
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//spin until data register has room for more data
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while ((SC1_UARTSTAT&SC_UARTTXFREE)!=SC_UARTTXFREE) {}
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SC1_DATA = *buffer;
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buffer++;
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++nChars;
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}
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return nChars;
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}
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#ifdef __GNUC__
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int fflush (FILE *f)
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#endif
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#ifdef __ICCARM__
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size_t fflush(int handle)
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#endif
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{
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return __write(_LLIO_STDOUT, NULL, 0);
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}
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static void halInternalUart1TxIsr(void)
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{
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// Nothing for now, as ouput is blocking from the __write function
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}
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//////////////////////////////////////////////////////////////////////////////
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// Receive
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// IAR Standard library hook for serial input
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size_t __read(int handle, unsigned char * buffer, size_t size)
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{
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int nChars = 0;
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/* This template only reads from "standard in", for all other file
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* handles it returns failure. */
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if (handle != _LLIO_STDIN)
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{
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return _LLIO_ERROR;
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}
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for(nChars = 0; (rxUsed>0) && (nChars < size); nChars++) {
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ATOMIC(
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*buffer++ = rxQ[rxTail];
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rxTail = (rxTail+1) % RECEIVE_QUEUE_SIZE;
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rxUsed--;
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)
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}
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return nChars;
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}
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static void halInternalUart1RxIsr(void)
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{
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// At present we really don't care which interrupt(s)
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// occurred, just that one did. Loop reading RXVALID
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// data, processing any errors noted
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// along the way.
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while ( SC1_UARTSTAT & SC_UARTRXVAL ) {
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uint8_t errors = SC1_UARTSTAT & (SC_UARTFRMERR |
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SC_UARTRXOVF |
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SC_UARTPARERR );
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uint8_t incoming = (uint8_t) SC1_DATA;
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if ( (errors == 0) && (rxUsed < (RECEIVE_QUEUE_SIZE-1)) ) {
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rxQ[rxHead] = incoming;
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rxHead = (rxHead+1) % RECEIVE_QUEUE_SIZE;
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rxUsed++;
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} else {
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// IAR standard library doesn't allow for any error handling in the
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// case of rx errors or not having space in the receive queue, so the
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// errors are just silently dropped.
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}
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} // end of while ( SC1_UARTSTAT & SC1_UARTRXVAL )
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}
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//////////////////////////////////////////////////////////////////////////////
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// Interrupts
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void halSc1Isr(void)
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{
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uint32_t interrupt;
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//this read and mask is performed in two steps otherwise the compiler
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//will complain about undefined order of volatile access
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interrupt = INT_SC1FLAG;
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interrupt &= INT_SC1CFG;
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while (interrupt != 0) {
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INT_SC1FLAG = interrupt; // acknowledge the interrupts early
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// RX events
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if ( interrupt & (INT_SCRXVAL | // RX has data
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INT_SCRXOVF | // RX Overrun error
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INT_SC1FRMERR | // RX Frame error
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INT_SC1PARERR ) // RX Parity error
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) {
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halInternalUart1RxIsr();
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}
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// TX events
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if ( interrupt & (INT_SCTXFREE | // TX has room
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INT_SCTXIDLE ) // TX idle (more room)
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) {
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halInternalUart1TxIsr();
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}
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interrupt = INT_SC1FLAG;
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interrupt &= INT_SC1CFG;
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}
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}
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/*******************************************************************************
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* Function Name : __io_getcharNonBlocking
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* Description : Non blocking read
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* Input : none
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* Output : dataByte: buffer containing the read byte if any
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* Return : TRUE if there is a data, FALSE otherwise
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*******************************************************************************/
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boolean __io_getcharNonBlocking(uint8_t *data)
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{
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if (__read(_LLIO_STDIN,data,1))
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return TRUE;
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else
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return FALSE;
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}/* end serialReadByte() */
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void __io_putchar( char c )
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{
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__write(_LLIO_STDOUT, (unsigned char *)&c, 1);
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}
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int __io_getchar()
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{
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unsigned char c;
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__read(_LLIO_STDIN, &c, 1);
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return (int)(c);
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}
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void __io_flush( void )
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{
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__write(_LLIO_STDOUT, NULL, 0);
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}
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