570 lines
22 KiB
C
570 lines
22 KiB
C
/* Copyright (c) 2008, Swedish Institute of Computer Science
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* All rights reserved.
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*
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* Additional fixes for AVR contributed by:
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*
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* Colin O'Flynn coflynn@newae.com
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* Eric Gnoske egnoske@gmail.com
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* Blake Leverett bleverett@gmail.com
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* Mike Vidales mavida404@gmail.com
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* Kevin Brown kbrown3@uccs.edu
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* Nate Bohlmann nate@elfwerks.com
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of the copyright holders nor the names of
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup hal
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* @{
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*/
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/**
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* \file
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* \brief This file contains low-level radio driver code.
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*
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* $Id: hal.h,v 1.5 2010/12/03 20:42:01 dak664 Exp $
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*/
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#ifndef HAL_AVR_H
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#define HAL_AVR_H
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/*============================ INCLUDE =======================================*/
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#include <stdint.h>
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#include <stdbool.h>
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//#include <util/crc16.h>
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#include "contiki-conf.h"
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/*============================ MACROS ========================================*/
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// TEST CODE
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#define TRIG1 DDRB |= 0x04, PINB |= 0x04
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#define TRIG2 DDRD |= 0x80, PIND |= 0x80
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/** \name This is the list of pin configurations needed for a given platform.
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* \brief Change these values to port to other platforms.
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* \{
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*/
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/* Define all possible revisions here */
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// Don't use zero, it will match if undefined!
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// RAVEN_D : Raven kit with LCD display
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// RAVENUSB_C : used for USB key or Raven card
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// RCB_B : RZ200 kit from Atmel based on 1281V
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// ZIGBIT : Zigbit module from Meshnetics
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// ATMEGA128RFA1 : Bare chip with internal radio
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// IRIS : IRIS Mote from MEMSIC
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#define RAVEN_D 4
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#define RAVENUSB_C 1
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#define RCB_B 2
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#define ZIGBIT 3
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#define ATMEGA128RFA1 4
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#define IRIS 5
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/* TODO: Move to platform (or CPU specific) */
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#if RCB_REVISION == RCB_B
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/* 1281 rcb */
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# define SSPORT B
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# define SSPIN (0x00)
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# define SPIPORT B
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# define MOSIPIN (0x02)
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# define MISOPIN (0x03)
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# define SCKPIN (0x01)
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# define RSTPORT B
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# define RSTPIN (0x05)
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# define IRQPORT D
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# define IRQPIN (0x04)
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# define SLPTRPORT B
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# define SLPTRPIN (0x04)
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# define USART 1
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# define USARTVECT USART1_RX_vect
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# define TICKTIMER 3
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# define HAS_SPARE_TIMER
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#elif HARWARE_REVISION == ZIGBIT
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/* 1281V Zigbit */
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# define SSPORT B
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# define SSPIN (0x00)
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# define SPIPORT B
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# define MOSIPIN (0x02)
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# define MISOPIN (0x03)
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# define SCKPIN (0x01)
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# define RSTPORT A
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# define RSTPIN (0x07)
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# define IRQPORT E
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# define IRQPIN (0x05)
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# define SLPTRPORT B
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# define SLPTRPIN (0x04)
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# define TXCWPORT B
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# define TXCWPIN (0x07)
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# define USART 1
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# define USARTVECT USART1_RX_vect
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//# define TICKTIMER 3
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//# define HAS_SPARE_TIMER // Not used
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#elif RAVEN_REVISION == RAVEN_D
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/* 1284 raven */
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# define SSPORT B
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# define SSPIN (0x04)
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# define SPIPORT B
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# define MOSIPIN (0x05)
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# define MISOPIN (0x06)
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# define SCKPIN (0x07)
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# define RSTPORT B
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# define RSTPIN (0x01)
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# define IRQPORT D
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# define IRQPIN (0x06)
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# define SLPTRPORT B
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# define SLPTRPIN (0x03)
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# define TXCWPORT B
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# define TXCWPIN (0x00)
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# define USART 1
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# define USARTVECT USART1_RX_vect
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# define TICKTIMER 3
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# define HAS_CW_MODE
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# define HAS_SPARE_TIMER
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#elif RAVEN_REVISION == RAVENUSB_C
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/* 1287USB raven */
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# define SSPORT B
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# define SSPIN (0x00)
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# define SPIPORT B
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# define MOSIPIN (0x02)
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# define MISOPIN (0x03)
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# define SCKPIN (0x01)
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# define RSTPORT B
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# define RSTPIN (0x05)
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# define IRQPORT D
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# define IRQPIN (0x04)
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# define SLPTRPORT B
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# define SLPTRPIN (0x04)
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# define TXCWPORT B
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# define TXCWPIN (0x07)
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# define USART 1
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# define USARTVECT USART1_RX_vect
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# define TICKTIMER 3
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# define HAS_CW_MODE
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# define HAS_SPARE_TIMER
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#elif HARWARE_REVISION == ATMEGA128RFA1
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/* ATmega1281 with internal AT86RF231 radio */
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#if 0
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# define SSPORT B
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# define SSPIN (0x04)
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# define SPIPORT B
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# define MOSIPIN (0x05)
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# define MISOPIN (0x06)
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# define SCKPIN (0x07)
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# define RSTPORT B
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# define RSTPIN (0x01)
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# define IRQPORT D
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# define IRQPIN (0x06)
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# define SLPTRPORT B
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# define SLPTRPIN (0x03)
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# define TXCWPORT B
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# define TXCWPIN (0x00)
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#endif
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# define SLPTRPORT TRXPR
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# define SLPTRPIN 1
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# define USART 1
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# define USARTVECT USART1_RX_vect
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# define TICKTIMER 3
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# define HAS_CW_MODE
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# define HAS_SPARE_TIMER
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#elif CONTIKI_TARGET_MULLE
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/* mulle 5.2 (TODO: move to platform specific) */
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# define SSPORT 3
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# define SSPIN 5
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# define MOSIPORT 1
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# define MOSIPIN 1
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# define MISOPORT 1
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# define MISOPIN 0
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# define SCKPORT 3
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# define SCKPIN 3
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# define RSTPORT 4
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# define RSTPIN 3
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# define IRQPORT 8
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# define IRQPIN 3
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# define SLPTRPORT 0
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# define SLPTRPIN 7
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# define HAS_SPARE_TIMER
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#elif HARWARE_REVISION == IRIS
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/* 1281 IRIS */
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# define SSPORT B
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# define SSPIN (0x00)
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# define SPIPORT B
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# define MOSIPIN (0x02)
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# define MISOPIN (0x03)
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# define SCKPIN (0x01)
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# define RSTPORT A
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# define RSTPIN (0x06)
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# define IRQPORT D
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# define IRQPIN (0x04)
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# define SLPTRPORT B
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# define SLPTRPIN (0x07)
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//# define TXCWPORT B
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//# define TXCWPIN (0x07)
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# define USART 1
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# define USARTVECT USART1_RX_vect
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//# define TICKTIMER 3
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//# define HAS_SPARE_TIMER // Not used
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#else
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#error "Platform undefined in hal.h"
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#endif
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/* For architectures that have all SPI signals on the same port */
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#ifndef SSPORT
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#define SSPORT SPIPORT
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#endif
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#ifndef SCKPORT
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#define SCKPORT SPIPORT
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#endif
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#ifndef MOSIPORT
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#define MOSIPORT SPIPORT
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#endif
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#ifndef MISOPORT
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#define MISOPORT SPIPORT
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#endif
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/** \} */
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/**
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* \name Macros used to generate read register names from platform-specific definitions of ports.
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* \brief The various CAT macros (DDR, PORT, and PIN) are used to
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* assign port/pin/DDR names to various macro variables. The
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* variables are assigned based on the specific connections made in
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* the hardware. For example TCCR(TICKTIMER,A) can be used in place of TCCR0A
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* if TICKTIMER is defined as 0.
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* \{
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*/
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#if defined(__AVR__)
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#define CAT(x, y) x##y
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#define CAT2(x, y, z) x##y##z
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#define DDR(x) CAT(DDR, x)
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#define PORT(x) CAT(PORT, x)
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#define PIN(x) CAT(PIN, x)
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#define UCSR(num, let) CAT2(UCSR,num,let)
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#define RXEN(x) CAT(RXEN,x)
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#define TXEN(x) CAT(TXEN,x)
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#define TXC(x) CAT(TXC,x)
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#define RXC(x) CAT(RXC,x)
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#define RXCIE(x) CAT(RXCIE,x)
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#define UCSZ(x,y) CAT2(UCSZ,x,y)
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#define UBRR(x,y) CAT2(UBRR,x,y)
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#define UDRE(x) CAT(UDRE,x)
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#define UDRIE(x) CAT(UDRIE,x)
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#define UDR(x) CAT(UDR,x)
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#define TCNT(x) CAT(TCNT,x)
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#define TIMSK(x) CAT(TIMSK,x)
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#define TCCR(x,y) CAT2(TCCR,x,y)
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#define COM(x,y) CAT2(COM,x,y)
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#define OCR(x,y) CAT2(OCR,x,y)
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#define CS(x,y) CAT2(CS,x,y)
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#define WGM(x,y) CAT2(WGM,x,y)
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#define OCIE(x,y) CAT2(OCIE,x,y)
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#define COMPVECT(x) CAT2(TIMER,x,_COMPA_vect)
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#define UDREVECT(x) CAT2(USART,x,_UDRE_vect)
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#define RXVECT(x) CAT2(USART,x,_RX_vect)
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#endif
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/* TODO: Move to CPU specific */
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#if defined(CONTIKI_TARGET_MULLE)
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#define CAT(x, y) x##y.BYTE
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#define CAT2(x, y, z) x##y##z.BYTE
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#define DDR(x) CAT(PD, x)
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#define PORT(x) CAT(P, x)
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#define PIN(x) CAT(P, x)
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#define UCSR(num, let) CAT2(UCSR,num,let)
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#define RXEN(x) CAT(RXEN,x)
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#define TXEN(x) CAT(TXEN,x)
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#define TXC(x) CAT(TXC,x)
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#define RXC(x) CAT(RXC,x)
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#define RXCIE(x) CAT(RXCIE,x)
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#define UCSZ(x,y) CAT2(UCSZ,x,y)
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#define UBRR(x,y) CAT2(UBRR,x,y)
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#define UDRE(x) CAT(UDRE,x)
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#define UDRIE(x) CAT(UDRIE,x)
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#define UDR(x) CAT(UDR,x)
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#define TCNT(x) CAT(TCNT,x)
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#define TIMSK(x) CAT(TIMSK,x)
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#define TCCR(x,y) CAT2(TCCR,x,y)
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#define COM(x,y) CAT2(COM,x,y)
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#define OCR(x,y) CAT2(OCR,x,y)
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#define CS(x,y) CAT2(CS,x,y)
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#define WGM(x,y) CAT2(WGM,x,y)
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#define OCIE(x,y) CAT2(OCIE,x,y)
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#define COMPVECT(x) CAT2(TIMER,x,_COMPA_vect)
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#define UDREVECT(x) CAT2(USART,x,_UDRE_vect)
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#define RXVECT(x) CAT2(USART,x,_RX_vect)
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#endif
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/** \} */
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/**
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* \name Pin macros
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* \brief These macros convert the platform-specific pin defines into names and functions
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* that the source code can directly use.
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* \{
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*/
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#if defined(__AVR_ATmega128RFA1__)
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#define hal_set_rst_low( ) ( TRXPR &= ~( 1 << TRXRST ) ) /**< This macro pulls the RST pin low. */
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#define hal_set_rst_high( ) ( TRXPR |= ( 1 << TRXRST ) ) /**< This macro pulls the RST pin high. */
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#define hal_set_slptr_high( ) ( TRXPR |= ( 1 << SLPTR ) ) /**< This macro pulls the SLP_TR pin high. */
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#define hal_set_slptr_low( ) ( TRXPR &= ~( 1 << SLPTR ) ) /**< This macro pulls the SLP_TR pin low. */
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//#define hal_get_slptr( ) ( ( TRXPR & ( 1 << SLPTR ) ) >> SLPTR ) /**< Read current state of the SLP_TR pin (High/Low). */
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#define hal_get_slptr( ) ( TRXPR & ( 1 << SLPTR ) ) /**< Read current state of the SLP_TR pin (High/Low). */
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#else
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#define SLP_TR SLPTRPIN /**< Pin number that corresponds to the SLP_TR pin. */
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#define DDR_SLP_TR DDR( SLPTRPORT ) /**< Data Direction Register that corresponds to the port where SLP_TR is connected. */
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#define PORT_SLP_TR PORT( SLPTRPORT ) /**< Port (Write Access) where SLP_TR is connected. */
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#define PIN_SLP_TR PIN( SLPTRPORT ) /**< Pin (Read Access) where SLP_TR is connected. */
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#define hal_set_slptr_high( ) ( PORT_SLP_TR |= ( 1 << SLP_TR ) ) /**< This macro pulls the SLP_TR pin high. */
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#define hal_set_slptr_low( ) ( PORT_SLP_TR &= ~( 1 << SLP_TR ) ) /**< This macro pulls the SLP_TR pin low. */
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//#define hal_get_slptr( ) ( ( PIN_SLP_TR & ( 1 << SLP_TR ) ) >> SLP_TR ) /**< Read current state of the SLP_TR pin (High/Low). */
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#define hal_get_slptr( ) ( PIN_SLP_TR & ( 1 << SLP_TR ) ) /**< Read current state of the SLP_TR pin (High/Low). */
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#define RST RSTPIN /**< Pin number that corresponds to the RST pin. */
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#define DDR_RST DDR( RSTPORT ) /**< Data Direction Register that corresponds to the port where RST is */
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#define PORT_RST PORT( RSTPORT ) /**< Port (Write Access) where RST is connected. */
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#define PIN_RST PIN( RSTPORT /* BUG? */) /**< Pin (Read Access) where RST is connected. */
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#define hal_set_rst_high( ) ( PORT_RST |= ( 1 << RST ) ) /**< This macro pulls the RST pin high. */
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#define hal_set_rst_low( ) ( PORT_RST &= ~( 1 << RST ) ) /**< This macro pulls the RST pin low. */
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#define hal_get_rst( ) ( ( PIN_RST & ( 1 << RST ) ) >> RST ) /**< Read current state of the RST pin (High/Low). */
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#define HAL_SS_PIN SSPIN /**< The slave select pin. */
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#define HAL_SCK_PIN SCKPIN /**< Data bit for SCK. */
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#define HAL_MOSI_PIN MOSIPIN
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#define HAL_MISO_PIN MISOPIN
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#define HAL_PORT_SPI PORT( SPIPORT ) /**< The SPI module is located on PORTB. */
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#define HAL_PORT_SS PORT( SSPORT )
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#define HAL_PORT_SCK PORT( SCKPORT )
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#define HAL_PORT_MOSI PORT( MOSIPORT ) /**< The SPI module uses GPIO might be split on different ports. */
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#define HAL_PORT_MISO PORT( MISOPORT ) /**< The SPI module uses GPIO might be split on different ports. */
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#define HAL_DDR_SPI DDR( SPIPORT ) /**< Data Direction Register for PORTB. */
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#define HAL_DDR_SS DDR( SSPORT ) /**< Data Direction Register for MISO GPIO pin. */
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#define HAL_DDR_SCK DDR( SCKPORT ) /**< Data Direction Register for MISO GPIO pin. */
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#define HAL_DDR_MOSI DDR( MOSIPORT ) /**< Data Direction Register for MISO GPIO pin. */
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#define HAL_DDR_MISO DDR( MISOPORT ) /**< Data Direction Register for MOSI GPIO pin. */
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#define HAL_DD_SS SSPIN /**< Data Direction bit for SS. */
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#define HAL_DD_SCK SCKPIN /**< Data Direction bit for SCK. */
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#define HAL_DD_MOSI MOSIPIN /**< Data Direction bit for MOSI. */
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#define HAL_DD_MISO MISOPIN /**< Data Direction bit for MISO. */
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#endif /* defined(__AVR_ATmega128RFA1__) */
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/** \} */
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#define HAL_SS_HIGH( ) (HAL_PORT_SS |= ( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS high. */
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#define HAL_SS_LOW( ) (HAL_PORT_SS &= ~( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS low. */
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/** \brief Macros defined for HAL_TIMER1.
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*
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* These macros are used to define the correct setupt of the AVR's Timer1, and
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* to ensure that the hal_get_system_time function returns the system time in
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* symbols (16 us ticks).
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*/
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#if defined(__AVR__)
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#if ( F_CPU == 16000000UL )
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#define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS12 ) )
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#define HAL_US_PER_SYMBOL ( 1 )
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#define HAL_SYMBOL_MASK ( 0xFFFFffff )
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#elif ( F_CPU == 0x800000UL )
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#define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
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#define HAL_US_PER_SYMBOL ( 2 )
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#define HAL_SYMBOL_MASK ( 0x7FFFffff )
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#elif ( F_CPU == 8000000UL )
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#define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
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#define HAL_US_PER_SYMBOL ( 2 )
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#define HAL_SYMBOL_MASK ( 0x7FFFffff )
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//#elif ( F_CPU == 7953408UL )
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#elif ( F_CPU == 7954432UL )
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#define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
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#define HAL_US_PER_SYMBOL ( 2 )
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#define HAL_SYMBOL_MASK ( 0x7FFFffff )
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#elif ( F_CPU == 4000000UL )
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#define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
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#define HAL_US_PER_SYMBOL ( 1 )
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#define HAL_SYMBOL_MASK ( 0xFFFFffff )
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#elif ( F_CPU == 1000000UL )
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#define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) )
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#define HAL_US_PER_SYMBOL ( 2 )
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#define HAL_SYMBOL_MASK ( 0x7FFFffff )
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#else
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#error "Clock speed not supported."
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#endif
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#if HARWARE_REVISION == ZIGBIT
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// IRQ E5 for Zigbit example
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#define RADIO_VECT INT5_vect
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#define HAL_ENABLE_RADIO_INTERRUPT( ) { ( EIMSK |= ( 1 << INT5 ) ) ; EICRB |= 0x0C ; PORTE &= ~(1<<PE5); DDRE &= ~(1<<DDE5); }
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#define HAL_DISABLE_RADIO_INTERRUPT( ) ( EIMSK &= ~( 1 << INT5 ) )
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#else
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#define RADIO_VECT TIMER1_CAPT_vect
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// Raven and Jackdaw
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#define HAL_ENABLE_RADIO_INTERRUPT( ) ( TIMSK1 |= ( 1 << ICIE1 ) )
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#define HAL_DISABLE_RADIO_INTERRUPT( ) ( TIMSK1 &= ~( 1 << ICIE1 ) )
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#endif
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#define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 |= ( 1 << TOIE1 ) )
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#define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 &= ~( 1 << TOIE1 ) )
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/** This macro will protect the following code from interrupts.*/
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#define HAL_ENTER_CRITICAL_REGION( ) {uint8_t volatile saved_sreg = SREG; cli( )
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/** This macro must always be used in conjunction with HAL_ENTER_CRITICAL_REGION
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so that interrupts are enabled again.*/
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#define HAL_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg;}
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#else /* MULLE */
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#define HAL_ENABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE |= 1 )
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#define HAL_DISABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE &= ~(1) )
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#define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 1 )
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#define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 0 )
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/** This macro will protect the following code from interrupts.*/
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#define HAL_ENTER_CRITICAL_REGION( ) MULLE_ENTER_CRITICAL_REGION( )
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/** This macro must always be used in conjunction with HAL_ENTER_CRITICAL_REGION
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so that interrupts are enabled again.*/
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#define HAL_LEAVE_CRITICAL_REGION( ) MULLE_LEAVE_CRITICAL_REGION( )
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#endif /* !__AVR__ */
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/** \brief Enable the interrupt from the radio transceiver.
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*/
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#define hal_enable_trx_interrupt( ) HAL_ENABLE_RADIO_INTERRUPT( )
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/** \brief Disable the interrupt from the radio transceiver.
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*
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* \retval 0 if the pin is low, 1 if the pin is high.
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*/
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#define hal_disable_trx_interrupt( ) HAL_DISABLE_RADIO_INTERRUPT( )
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/*============================ TYPDEFS =======================================*/
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/*============================ PROTOTYPES ====================================*/
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/*============================ MACROS ========================================*/
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/** \name Macros for radio operation.
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* \{
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*/
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#define HAL_BAT_LOW_MASK ( 0x80 ) /**< Mask for the BAT_LOW interrupt. */
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#define HAL_TRX_UR_MASK ( 0x40 ) /**< Mask for the TRX_UR interrupt. */
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#define HAL_TRX_END_MASK ( 0x08 ) /**< Mask for the TRX_END interrupt. */
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#define HAL_RX_START_MASK ( 0x04 ) /**< Mask for the RX_START interrupt. */
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#define HAL_PLL_UNLOCK_MASK ( 0x02 ) /**< Mask for the PLL_UNLOCK interrupt. */
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#define HAL_PLL_LOCK_MASK ( 0x01 ) /**< Mask for the PLL_LOCK interrupt. */
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#define HAL_MIN_FRAME_LENGTH ( 0x03 ) /**< A frame should be at least 3 bytes. */
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#define HAL_MAX_FRAME_LENGTH ( 0x7F ) /**< A frame should no more than 127 bytes. */
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/** \} */
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/*============================ TYPDEFS =======================================*/
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/** \struct hal_rx_frame_t
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* \brief This struct defines the rx data container.
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*
|
|
* \see hal_frame_read
|
|
*/
|
|
typedef struct{
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|
uint8_t length; /**< Length of frame. */
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|
uint8_t data[ HAL_MAX_FRAME_LENGTH ]; /**< Actual frame data. */
|
|
uint8_t lqi; /**< LQI value for received frame. */
|
|
bool crc; /**< Flag - did CRC pass for received frame? */
|
|
} hal_rx_frame_t;
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|
|
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/** RX_START event handler callback type. Is called with timestamp in IEEE 802.15.4 symbols and frame length. See hal_set_rx_start_event_handler(). */
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|
typedef void (*hal_rx_start_isr_event_handler_t)(uint32_t const isr_timestamp, uint8_t const frame_length);
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|
|
/** RRX_END event handler callback type. Is called with timestamp in IEEE 802.15.4 symbols and frame length. See hal_set_trx_end_event_handler(). */
|
|
typedef void (*hal_trx_end_isr_event_handler_t)(uint32_t const isr_timestamp);
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|
|
typedef void (*rx_callback_t) (uint16_t data);
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|
|
|
/*============================ PROTOTYPES ====================================*/
|
|
void hal_init( void );
|
|
|
|
void hal_reset_flags( void );
|
|
uint8_t hal_get_bat_low_flag( void );
|
|
void hal_clear_bat_low_flag( void );
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|
|
|
hal_trx_end_isr_event_handler_t hal_get_trx_end_event_handler( void );
|
|
void hal_set_trx_end_event_handler( hal_trx_end_isr_event_handler_t trx_end_callback_handle );
|
|
void hal_clear_trx_end_event_handler( void );
|
|
|
|
hal_rx_start_isr_event_handler_t hal_get_rx_start_event_handler( void );
|
|
void hal_set_rx_start_event_handler( hal_rx_start_isr_event_handler_t rx_start_callback_handle );
|
|
void hal_clear_rx_start_event_handler( void );
|
|
|
|
uint8_t hal_get_pll_lock_flag( void );
|
|
void hal_clear_pll_lock_flag( void );
|
|
|
|
/* Hack for atmega128rfa1 with integrated radio. Access registers directly, not through SPI */
|
|
#if defined(__AVR_ATmega128RFA1__)
|
|
//#define hal_register_read(address) _SFR_MEM8((uint16_t)address)
|
|
#define hal_register_read(address) address
|
|
uint8_t hal_subregister_read( uint16_t address, uint8_t mask, uint8_t position );
|
|
void hal_subregister_write( uint16_t address, uint8_t mask, uint8_t position,
|
|
uint8_t value );
|
|
|
|
//#define hal_register_write(address, value) _SFR_MEM8((uint16_t)address)=value
|
|
#define hal_register_write(address, value) address=value
|
|
//#define hal_subregister_read( address, mask, position ) (_SFR_MEM8((uint16_t)address)&mask)>>position
|
|
//#define hal_subregister_read1( address, mask, position ) (address&mask)>>position
|
|
//#define hal_subregister_write( address, mask, position, value ) address=(address<<position)&mask
|
|
#else
|
|
uint8_t hal_register_read( uint8_t address );
|
|
void hal_register_write( uint8_t address, uint8_t value );
|
|
uint8_t hal_subregister_read( uint8_t address, uint8_t mask, uint8_t position );
|
|
void hal_subregister_write( uint8_t address, uint8_t mask, uint8_t position,
|
|
uint8_t value );
|
|
#endif
|
|
|
|
|
|
|
|
//void hal_frame_read(hal_rx_frame_t *rx_frame, rx_callback_t rx_callback);
|
|
/* For speed RF230BB does not use a callback */
|
|
void hal_frame_read(hal_rx_frame_t *rx_frame);
|
|
void hal_frame_write( uint8_t *write_buffer, uint8_t length );
|
|
void hal_sram_read( uint8_t address, uint8_t length, uint8_t *data );
|
|
void hal_sram_write( uint8_t address, uint8_t length, uint8_t *data );
|
|
/* Number of receive buffers in RAM. */
|
|
#ifndef RF230_CONF_RX_BUFFERS
|
|
#define RF230_CONF_RX_BUFFERS 1
|
|
#endif
|
|
|
|
#endif
|
|
/** @} */
|
|
/*EOF*/
|