5d98cb71e2
Coffee is placed by default at the beginning of the flash memory, right before the firmware. This avoids the memory gaps that there could be before and after Coffee if it were placed after the firmware, because it is unlikely that the end of the firmware is aligned with a flash page boundary, and the CCA is not flash-page-aligned. Thanks to that, Coffee is also always in the same flash area if its size remains unchanged, even if the firmware changes, which makes it possible to keep the Coffee files when reprogramming the firmware after a partial flash erase command. The default configuration of Coffee is set to use sensible values for a typical usage on this SoC, i.e. for sensor data logging. The default size of Coffee is set to 0 in order not to waste flash if Coffee is unused. COFFEE_CONF_CUSTOM_PORT can be defined to a header file to be used with "#include" in order to override the default CC2538 port of Coffee. This makes it possible to use Coffee with an external memory device rather than with the internal flash memory, without having to alter the Contiki files. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
116 lines
3.6 KiB
Text
116 lines
3.6 KiB
Text
/*
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* Copyright (c) 2013, Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* cc2538 linker configuration file. This is not the actual file used at link
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* stage. Rather, it is used as input for the auto-generation of the actual
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* ld script, which is called cc2538.ld and will be in the project directory
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*/
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MEMORY
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{
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FLASH_FW (rx) : ORIGIN = COFFEE_START + COFFEE_SIZE,
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LENGTH = FLASH_CCA_ADDR - (COFFEE_START + COFFEE_SIZE)
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FLASH_CCA (RX) : ORIGIN = FLASH_CCA_ADDR, LENGTH = FLASH_CCA_SIZE
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/*
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* If PM2 is enabled, then the PM2 SRAM limitations apply, i.e. the
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* regular-leakage SRAM is a non-retention SRAM and the low-leakage SRAM is
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* a full-retention SRAM.
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* Else, the data in the regular-leakage SRAM is always retained, so there
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* are virtually a non-retention SRAM with a size of 0 bytes and a
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* full-retention SRAM spanning the whole SRAM, which is more convenient to
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* use.
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*/
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#if LPM_CONF_ENABLE && LPM_CONF_MAX_PM >= 2
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NRSRAM (RWX) : ORIGIN = CC2538_DEV_RLSRAM_ADDR,
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LENGTH = CC2538_DEV_RLSRAM_SIZE
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FRSRAM (RWX) : ORIGIN = CC2538_DEV_LLSRAM_ADDR,
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LENGTH = CC2538_DEV_LLSRAM_SIZE
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#else
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NRSRAM (RWX) : ORIGIN = CC2538_DEV_RLSRAM_ADDR, LENGTH = 0
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FRSRAM (RWX) : ORIGIN = CC2538_DEV_SRAM_ADDR, LENGTH = CC2538_DEV_SRAM_SIZE
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#endif
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}
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ENTRY(flash_cca_lock_page)
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SECTIONS
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{
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.text :
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{
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_text = .;
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*(.vectors)
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*(.text*)
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*(.rodata*)
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_etext = .;
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} > FLASH_FW= 0
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.socdata (NOLOAD) :
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{
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*(.udma_channel_control_table)
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} > FRSRAM
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.data : ALIGN(4)
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{
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_data = .;
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*(.data*)
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_edata = .;
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} > FRSRAM AT > FLASH_FW
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_ldata = LOADADDR(.data);
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.ARM.exidx :
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{
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*(.ARM.exidx*)
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} > FLASH_FW
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.bss :
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{
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_bss = .;
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*(.bss*)
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*(COMMON)
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_ebss = .;
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} > FRSRAM
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.stack (NOLOAD) :
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{
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*(.stack)
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} > FRSRAM
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.nrdata (NOLOAD) :
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{
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_nrdata = .;
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*(.nrdata*)
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_enrdata = .;
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} > NRSRAM
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.flashcca :
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{
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*(.flashcca)
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} > FLASH_CCA
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}
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