175 lines
5.1 KiB
C
175 lines
5.1 KiB
C
/*
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* Copyright (c) 2010, STMicroelectronics.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* 3. The name of the author may not be used to endorse or promote
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* products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* This file is part of the Contiki OS
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*
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* $Id: rtimer-arch.c,v 1.1 2010/10/25 09:03:39 salvopitru Exp $
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \file
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* Real-timer specific implementation for STM32W.
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* \author
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* Salvatore Pitrulli <salvopitru@users.sourceforge.net>
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*/
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/*---------------------------------------------------------------------------*/
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#include "sys/energest.h"
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#include "sys/rtimer.h"
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#define DEBUG 0
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#if DEBUG
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#include <stdio.h>
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#define PRINTF(...) printf(__VA_ARGS__)
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#else
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#define PRINTF(...)
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#endif
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static u32_t time_msb = 0; // Most significant bits of the current time.
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// time of the next rtimer event. Initially is set to the max value.
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static rtimer_clock_t next_rtimer_time = 0;
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static u16_t saved_TIM1CFG;
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/*---------------------------------------------------------------------------*/
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void halTimer1Isr(void){
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if(INT_TIM1FLAG & INT_TIMUIF){ // Overflow event.
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//PRINTF("O %4x.\r\n", TIM1_CNT);
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//printf("OV ");
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time_msb++;
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rtimer_clock_t now = ((rtimer_clock_t)time_msb << 16)|TIM1_CNT;
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rtimer_clock_t clock_to_wait = next_rtimer_time - now;
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if(clock_to_wait <= 0x10000 && clock_to_wait > 0){ // We must set now the Timer Compare Register.
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TIM1_CCR1 = (int16u)clock_to_wait;
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INT_TIM1FLAG = INT_TIMCC1IF;
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INT_TIM1CFG |= INT_TIMCC1IF; // Compare 1 interrupt enable.
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}
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INT_TIM1FLAG = INT_TIMUIF;
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}
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else if(INT_TIM1FLAG & INT_TIMCC1IF){ // Compare event.
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INT_TIM1CFG &= ~INT_TIMCC1IF; // Disable the next compare interrupt
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PRINTF("\nCompare event %4x\r\n", TIM1_CNT);
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PRINTF("INT_TIM1FLAG %2x\r\n", INT_TIM1FLAG);
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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rtimer_run_next();
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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INT_TIM1FLAG = INT_TIMCC1IF;
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}
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}
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/*---------------------------------------------------------------------------*/
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void
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rtimer_arch_init(void)
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{
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TIM1_CR1 = 0;
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TIM1_PSC = RT_PRESCALER;
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TIM1_ARR = 0xffff; // Counting from 0 to the maximum value.
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// Bits of TIMx_CCMR1 as default.
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TIM1_EGR = TIM_UG; // Update Generation.
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INT_TIM1FLAG = 0xffff;
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INT_TIM1CFG = INT_TIMUIF; // Update interrupt enable (interrupt on overflow).
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TIM1_CR1 = TIM_CEN; // Counter enable.
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INT_CFGSET = INT_TIM1; // Enable top level interrupt.
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}
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/*---------------------------------------------------------------------------*/
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void rtimer_arch_disable_irq(void)
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{
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ATOMIC(
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saved_TIM1CFG = INT_TIM1CFG;
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INT_TIM1CFG = 0;
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)
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}
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/*---------------------------------------------------------------------------*/
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void rtimer_arch_enable_irq(void)
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{
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INT_TIM1CFG = saved_TIM1CFG;
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}
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/*---------------------------------------------------------------------------*/
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rtimer_clock_t rtimer_arch_now(void)
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{
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return ((rtimer_clock_t)time_msb << 16)|TIM1_CNT;
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}
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/*---------------------------------------------------------------------------*/
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void
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rtimer_arch_schedule(rtimer_clock_t t)
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{
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PRINTF("rtimer_arch_schedule time %4x\r\n", /*((u32_t*)&t)+1,*/(u32_t)t);
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next_rtimer_time = t;
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rtimer_clock_t now = rtimer_arch_now();
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rtimer_clock_t clock_to_wait = t - now;
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PRINTF("now %2x\r\n", TIM1_CNT);
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PRINTF("clock_to_wait %4x\r\n", clock_to_wait);
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if(clock_to_wait <= 0x10000){ // We must set now the Timer Compare Register.
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TIM1_CCR1 = (int16u)now + (int16u)clock_to_wait;
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INT_TIM1FLAG = INT_TIMCC1IF;
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INT_TIM1CFG |= INT_TIMCC1IF; // Compare 1 interrupt enable.
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PRINTF("2-INT_TIM1FLAG %2x\r\n", INT_TIM1FLAG);
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}
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// else compare register will be set at overflow interrupt closer to the rtimer event.
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}
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