fb8bbf37cf
This is a major change to how the main tick interrupt is handled on the mc1322x platforms. Instead of using two timer resources, TMR0 and RTC, this patch unifies all the timers to use the RTC. This is enabled by implementing etimers as scheduled rtimers. The main advantage (aside from freeing TMR0 for general use) is have the Contiki timebase come from the same source that will be used for sleeping and wakeup.
206 lines
5.6 KiB
C
206 lines
5.6 KiB
C
#include <stdio.h>
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/* debug */
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#define DEBUG DEBUG_FULL
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#include "net/uip-debug.h"
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/* contiki */
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#include "sys/process.h"
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/* mc1322x */
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#include "mc1322x.h"
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#include "contiki-maca.h"
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#include "config.h"
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/* Threshold for buck converter; buck will be disabled if vbatt is below this */
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#define MC1322X_BUCK_THRES 2425
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/* Hysterisis window around buck threshold */
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#define MC1322X_BUCK_WINDOW 150
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#define MC1322X_BUCK_THRES_H (MC1322X_BUCK_THRES + MC1322X_BUCK_WINDOW/2)
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#define MC1322X_BUCK_THRES_L (MC1322X_BUCK_THRES - MC1322X_BUCK_WINDOW/2)
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/* Time between vbatt checks for the buck */
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#define MC1322X_BUCK_MONITOR_PERIOD 600 * CLOCK_SECOND
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/* periodically poll adc_vbatt and manages the buck appropriately */
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static struct etimer et_buck;
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PROCESS(buck_monitor, "buck monitor");
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PROCESS_THREAD(buck_monitor, ev, data)
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{
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PROCESS_BEGIN();
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PRINTF("starting vbatt monitor\n");
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etimer_set(&et_buck, MC1322X_BUCK_MONITOR_PERIOD);
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while (1) {
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PROCESS_WAIT_EVENT();
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if(etimer_expired(&et_buck))
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{
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adc_service();
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PRINTF("buck monitor: vbatt: %d mV\n\r", adc_vbatt);
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if( CRM->VREG_CNTLbits.BUCK_EN == 1 && adc_vbatt < MC1322X_BUCK_THRES_L ) {
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PRINTF("vbatt low, disabling buck\n\r", adc_vbatt);
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CRM->SYS_CNTLbits.PWR_SOURCE = 0;
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CRM->VREG_CNTLbits.BUCK_SYNC_REC_EN = 0;
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CRM->VREG_CNTLbits.BUCK_BYPASS_EN = 1;
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CRM->VREG_CNTLbits.BUCK_EN = 0;
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} else if ( CRM->VREG_CNTLbits.BUCK_EN == 0 && adc_vbatt > MC1322X_BUCK_THRES_H ) {
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PRINTF("vbatt high, enabling buck\n\r", adc_vbatt);
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CRM->SYS_CNTLbits.PWR_SOURCE = 1;
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CRM->VREG_CNTLbits.BUCK_SYNC_REC_EN = 1;
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CRM->VREG_CNTLbits.BUCK_BYPASS_EN = 0;
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CRM->VREG_CNTLbits.BUCK_EN = 1;
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}
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etimer_set(&et_buck, MC1322X_BUCK_MONITOR_PERIOD);
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}
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}
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PROCESS_END();
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}
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void buck_setup(void) {
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nvmType_t type;
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nvmErr_t err;
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volatile int i;
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default_vreg_init();
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while(CRM->STATUSbits.VREG_1P5V_RDY == 0) { continue; }
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while(CRM->STATUSbits.VREG_1P8V_RDY == 0) { continue; }
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/* takes time for the flash supply to fail (if there is no buck) */
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/* spin while this happens doing nvm_detects */
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/* XXX todo: don't probe buck if Vbatt < 2.5V */
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adc_service();
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PRINTF("vbatt: %04u mV\n\r", adc_vbatt);
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type = 1;
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for(i = 0; i < 128 && type != 0; i++) {
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err = nvm_detect(gNvmInternalInterface_c, &type);
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}
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if (type == gNvmType_NoNvm_c)
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{
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PRINTF("NVM failed without buck, trying with buck\n\r");
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if (adc_vbatt < MC1322X_BUCK_THRES_L)
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{
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PRINTF("Vbatt is low, bypassing buck\n\r");
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CRM->SYS_CNTLbits.PWR_SOURCE = 0;
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CRM->VREG_CNTLbits.BUCK_SYNC_REC_EN = 0;
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CRM->VREG_CNTLbits.BUCK_BYPASS_EN = 1;
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CRM->VREG_CNTLbits.BUCK_EN = 0;
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} else {
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CRM->SYS_CNTLbits.PWR_SOURCE = 1;
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CRM->VREG_CNTLbits.BUCK_SYNC_REC_EN = 1;
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CRM->VREG_CNTLbits.BUCK_BYPASS_EN = 0;
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CRM->VREG_CNTLbits.BUCK_EN = 1;
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}
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while(CRM->STATUSbits.VREG_BUCK_RDY == 0) { continue; }
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CRM->VREG_CNTLbits.VREG_1P5V_SEL = 3;
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CRM->VREG_CNTLbits.VREG_1P5V_EN = 3;
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CRM->VREG_CNTLbits.VREG_1P8V_EN = 1;
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while(CRM->STATUSbits.VREG_1P5V_RDY == 0) { continue; }
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while(CRM->STATUSbits.VREG_1P8V_RDY == 0) { continue; }
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type = 1;
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for(i = 0; i < 128 && type != 0; i++) {
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err = nvm_detect(gNvmInternalInterface_c, &type);
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}
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if (type != gNvmType_NoNvm_c) {
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PRINTF("buck ok\n\r");
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/* start a process to monitor vbatt and enable/disable the buck as necessary */
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process_start(&buck_monitor, NULL);
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} else {
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printf("fatal: couldn't detect NVM\n\r");
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}
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} else {
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PRINTF("NVM ok without buck\n\r");
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}
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}
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/* setup the RTC */
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/* try to start the 32kHz xtal */
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void rtc_setup(void) {
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volatile uint32_t rtc_count;
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volatile uint32_t i;
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ring_osc_off();
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xtal32_on();
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xtal32_exists();
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rtc_count = CRM->RTC_COUNT;
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PRINTF("trying to start 32kHz xtal\n\r");
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for(i = 0; i < 150000 && CRM->RTC_COUNT == rtc_count; i++) { continue; }
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if(CRM->RTC_COUNT == rtc_count) {
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PRINTF("32xtal failed, using ring osc\n\r");
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CRM->SYS_CNTLbits.XTAL32_EXISTS = 0;
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CRM->XTAL32_CNTLbits.XTAL32_EN = 0;
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ring_osc_on();
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/* Set default tune values from datasheet */
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CRM->RINGOSC_CNTLbits.ROSC_CTUNE = 0x6;
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CRM->RINGOSC_CNTLbits.ROSC_FTUNE = 0x17;
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/* Trigger calibration */
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rtc_calibrate();
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PRINTF("RTC calibrated to %d Hz\r\n", rtc_freq);
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} else {
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PRINTF("32kHz xtal started\n\r");
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rtc_freq = 32768;
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}
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}
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/* call mc1322x_init once to initalize everything with the current config */
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void mc1322x_init(void) {
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/* XXX TODO load config from flash */
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/* config should say what uart to use for debug console */
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/* config should also set the baud rate */
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/* for now, just clean up contiki-conf.h */
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/* maybe factor into conf.h -> contiki-conf.h and mc1322x-conf.h platform-conf.h */
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/* print out config in debug */
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/* initialize the uarts */
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uart_init(CONSOLE_UART, CONSOLE_BAUD);
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PRINTF("mc1322x init\n\r");
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adc_init();
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ctimer_init();
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process_init();
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process_start(&etimer_process, NULL);
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process_start(&contiki_maca_process, NULL);
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buck_setup();
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/* start with a default config */
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mc1322x_config_restore(&mc1322x_config);
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if ( mc1322x_config_valid(&mc1322x_config) != 1 ) {
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PRINTF("flash invalid\n\r");
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/* save the default config to flash */
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mc1322x_config_set_default(&mc1322x_config);
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mc1322x_config_save(&mc1322x_config);
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}
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#if DEBUG_FULL
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mc1322x_config_print();
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#endif
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/* setup the radio */
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maca_init();
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set_power(mc1322x_config.power);
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set_channel(mc1322x_config.channel);
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set_demodulator_type(mc1322x_config.flags.demod);
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set_prm_mode(mc1322x_config.flags.autoack);
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/* must be done AFTER maca_init */
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/* the radio calibration appears to clobber the RTC trim caps */
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rtc_setup();
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rtimer_init();
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clock_init();
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}
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