a5046e83c7
This is a general cleanup of things like code style issues and code structure of the STM32w port to make it more like the rest of Contiki is structured.
156 lines
4 KiB
C
156 lines
4 KiB
C
/** @file micro.c
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* @brief STM32W108 micro specific minimal HAL functions
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*
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*
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* <!--(C) COPYRIGHT 2010 STMicroelectronics. All rights reserved. -->
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*/
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#include PLATFORM_HEADER
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#include BOARD_HEADER
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#include "error.h"
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#include "hal/micro/micro-common.h"
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#include "hal/micro/cortexm3/micro-common.h"
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#include "micro/system-timer.h"
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#include "micro/adc.h"
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#include "micro/cortexm3/memmap.h"
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#include "micro/cortexm3/iap_bootloader.h"
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#include <stdlib.h>
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#include <string.h>
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extern void halBoardInit(void);
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void halInit(void)
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{
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//Disable the REG_EN external regulator enable signal. Out of reset this
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//signal overrides PA7. By disabling it early, PA7 is reclaimed as a GPIO.
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//If an external regulator is required, the following line of code should
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//be deleted.
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GPIO_DBGCFG &= ~GPIO_EXTREGEN;
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halInternalSetRegTrim(FALSE);
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halBoardInit();
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halPowerUp();
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halInternalCalibrateFastRc();
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#ifndef DISABLE_WATCHDOG
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halInternalEnableWatchDog();
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#endif
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halInternalStartSystemTimer();
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}
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void halReboot(void)
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{
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INTERRUPTS_OFF();
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//FCLK must be 6MHz to allow the SYSRESETREQ signal to cleanly
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//propagate and reset the chip. Switch SYSCLK first since we need
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//the cycles used by switching FCLK to guarantee the SYSCLK is
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//stable and ready for SYSRESETREQ.
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OSC24M_CTRL = OSC24M_CTRL_RESET; //Guarantee SYSCLK is sourced from OSCHF
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CPU_CLKSEL = CPU_CLKSEL_RESET; //Guarantee FCLK is sourced from PCLK
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SCS_AIRCR = (0x05FA0000 | SCS_AIRCR_SYSRESETREQ); // trigger the reset
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//NOTE: SYSRESETREQ is not the same as nRESET. It will not do the debug
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//pieces: DWT, ITM, FPB, vector catch, etc
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}
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void halPowerDown(void)
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{
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halBoardPowerDown();
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}
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void halPowerUp(void)
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{
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halInternalInitAdc();
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halCommonCalibratePads();
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halInternalSwitchToXtal();
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halBoardPowerUp();
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}
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static uint16_t seed0 = 0xbeef;
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static uint16_t seed1 = 0xface;
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void halCommonSeedRandom(uint32_t seed)
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{
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seed0 = (uint16_t) seed;
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if (seed0 == 0)
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seed0 = 0xbeef;
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seed1 = (uint16_t) (seed >> 16);
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if (seed1 == 0)
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seed1 = 0xface;
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}
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static uint16_t shift(uint16_t *val, uint16_t taps)
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{
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uint16_t newVal = *val;
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if (newVal & 0x8000)
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newVal ^= taps;
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*val = newVal << 1;
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return newVal;
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}
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uint16_t halCommonGetRandom(void)
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{
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return (shift(&seed0, 0x0062)
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^ shift(&seed1, 0x100B));
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}
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void halCommonMemCopy(void *dest, const void *source, uint8_t bytes)
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{
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memcpy(dest, source, bytes);
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}
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int8_t halCommonMemCompare(const void *source0, const void *source1, uint8_t bytes)
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{
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return memcmp(source0, source1, bytes);
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}
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void halCommonMemSet(void *dest, uint8_t val, uint16_t bytes)
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{
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memset(dest, val, bytes);
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}
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#pragma pack(1)
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typedef struct appSwitchStruct {
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uint32_t signature;
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uint8_t mode;
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uint8_t channel;
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union {
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uint16_t panID;
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uint16_t offset;
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} param;
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} appSwitchStructType;
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#pragma pack()
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static appSwitchStructType *appSwitch = (appSwitchStructType *) RAM_BOTTOM;
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StStatus halBootloaderStart(uint8_t mode, uint8_t channel, uint16_t panID)
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{
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if (mode == IAP_BOOTLOADER_MODE_UART) {
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uint8_t cut = *(volatile uint8_t *) 0x08040798;
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if (!( (halFixedAddressTable.baseTable.type == FIXED_ADDRESS_TABLE_TYPE) &&
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( ( (halFixedAddressTable.baseTable.version & FAT_MAJOR_VERSION_MASK)
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== 0x0000 ) &&
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(halFixedAddressTable.baseTable.version == 0x0003) //checking presence of valid version
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) && (cut >= 2) && (cut <= 3)))
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/* Cut not supported */
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return ST_ERR_FATAL;
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} else {
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/* Check that OTA bootloader is at the base of the flash */
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if (*((uint32_t *) (MFB_BOTTOM + 28)) == IAP_BOOTLOADER_APP_SWITCH_SIGNATURE) {
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appSwitch->channel = ((channel >= 11) && (channel <= 26)) ? channel :IAP_BOOTLOADER_DEFAULT_CHANNEL;
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appSwitch->param.panID = panID;
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} else {
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return ST_ERR_FATAL;
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}
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}
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appSwitch->signature = IAP_BOOTLOADER_APP_SWITCH_SIGNATURE;
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appSwitch->mode = mode;
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halReboot();
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return (mode <= IAP_BOOTLOADER_MODE_OTA) ? ST_ERR_FATAL: ST_BAD_ARGUMENT;
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}
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