4cdb7ba9b6
This patch extends the protection domain framework with an additional plugin to use Task-State Segment (TSS) structures to offload much of the work of switching protection domains to the CPU. This can save space compared to paging, since paging requires two 4KiB page tables and one 32-byte page table plus one whole-system TSS and an additional 32-byte data structure for each protection domain, whereas the approach implemented by this patch just requires a 128-byte data structure for each protection domain. Only a small number of protection domains will typically be used, so n * 128 < 8328 + (n * 32). For additional information, please refer to cpu/x86/mm/README.md. GCC 6 is introducing named address spaces for the FS and GS segments [1]. LLVM Clang also provides address spaces for the FS and GS segments [2]. This patch also adds support to the multi-segment X86 memory management subsystem for using these features instead of inline assembly blocks, which enables type checking to detect some address space mismatches. [1] https://gcc.gnu.org/onlinedocs/gcc/Named-Address-Spaces.html [2] http://llvm.org/releases/3.3/tools/clang/docs/LanguageExtensions.html#target-specific-extensions
195 lines
9.6 KiB
C
195 lines
9.6 KiB
C
/*
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* Copyright (C) 2015, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef CPU_X86_MM_MULTI_SEGMENT_H_
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#define CPU_X86_MM_MULTI_SEGMENT_H_
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#include <stdint.h>
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#include <stdlib.h>
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#include "helpers.h"
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#include "ldt-layout.h"
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#ifdef __clang__
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#define __SEG_FS
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#define __seg_fs __attribute__((address_space(257)))
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#define __SEG_GS
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#define __seg_gs __attribute__((address_space(256)))
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#endif
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#ifdef __SEG_FS
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#define ATTR_MMIO_ADDR_SPACE __seg_fs
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#define ATTR_KERN_ADDR_SPACE __seg_fs
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#else
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#define ATTR_KERN_ADDR_SPACE
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#endif
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#ifdef __SEG_GS
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#define ATTR_META_ADDR_SPACE __seg_gs
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#endif
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void prot_domains_reg_multi_seg(volatile struct dom_kern_data ATTR_KERN_ADDR_SPACE *dkd,
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uintptr_t mmio, size_t mmio_sz,
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uintptr_t meta, size_t meta_sz);
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void multi_segment_launch_kernel(void);
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#define MULTI_SEGMENT_ENTER_ISR(exc) \
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"mov $" EXP_STRINGIFY(GDT_SEL_DATA) ", %%eax\n\t" \
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/* Refresh DS and ES in case the userspace code corrupted them. */ \
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"mov %%eax, %%ds\n\t" \
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"mov %%eax, %%es\n\t" \
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/* Refresh SEG_KERN. */ \
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"mov $" EXP_STRINGIFY(LDT_SEL_KERN) ", %%eax\n\t" \
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"mov %%eax, %%" SEG_KERN "s\n\t" \
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".if " #exc "\n\t" \
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/* It is possible that a routine performing MMIO is being interrupted. */ \
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/* Thus, it is necessary to save and restore the MMIO segment register */ \
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/* (in a callee-saved register). */ \
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"mov %%" SEG_MMIO "s, %%ebp\n\t" \
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"mov $" EXP_STRINGIFY(GDT_SEL_DATA_KERN_EXC) ", %%eax\n\t" \
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"mov %%eax, %%" SEG_KERN "s\n\t" \
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".endif\n\t"
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#define MULTI_SEGMENT_LEAVE_ISR(exc) \
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".if " #exc "\n\t" \
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"mov %%ebp, %%" SEG_MMIO "s\n\t" \
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".endif\n\t"
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/**
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* The MMIO region is tightly bounded within a segment, so its base offset is
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* always 0.
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*/
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#define PROT_DOMAINS_MMIO(dcd) 0
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/**
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* The metadata region is tightly bounded within a segment, so its base offset
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* is always 0.
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*/
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#define PROT_DOMAINS_META(dcd) 0
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#define SEG_MMIO "f" /**< For MMIO accesses, when enabled. */
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#define SEG_KERN "f" /**< For kernel data accesses */
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#define SEG_META "g" /**< For metadata accesses */
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#define _SEG_READL(seg, dst, src) \
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__asm__ __volatile__ ( \
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"movl %%" seg "s:%[src_], %[dst_]" : [dst_]"=r"(dst) : [src_]"m"(src))
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#define _SEG_READW(seg, dst, src) \
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__asm__ __volatile__ ( \
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"movw %%" seg "s:%[src_], %[dst_]" : [dst_]"=r"(dst) : [src_]"m"(src))
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#define _SEG_READB(seg, dst, src) \
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__asm__ __volatile__ ( \
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"movb %%" seg "s:%[src_], %[dst_]" : [dst_]"=q"(dst) : [src_]"m"(src))
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#define _SEG_WRITEL(seg, dst, src) \
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__asm__ __volatile__ ( \
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"movl %[src_], %%" seg "s:%[dst_]" \
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: [dst_]"=m"(dst) : [src_]"r"((uint32_t)(src)))
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#define _SEG_WRITEW(seg, dst, src) \
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__asm__ __volatile__ ( \
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"movw %[src_], %%" seg "s:%[dst_]" \
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: [dst_]"=m"(dst) : [src_]"r"((uint16_t)(src)))
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#define _SEG_WRITEB(seg, dst, src) \
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__asm__ __volatile__ ( \
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"movb %[src_], %%" seg "s:%[dst_]" \
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: [dst_]"=m"(dst) : [src_]"q"((uint8_t)(src)))
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#ifndef __SEG_FS
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#define MMIO_READL(dst, src) _SEG_READL(SEG_MMIO, dst, src)
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#define MMIO_READW(dst, src) _SEG_READW(SEG_MMIO, dst, src)
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#define MMIO_READB(dst, src) _SEG_READB(SEG_MMIO, dst, src)
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#define MMIO_WRITEL(dst, src) _SEG_WRITEL(SEG_MMIO, dst, src)
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#define MMIO_WRITEW(dst, src) _SEG_WRITEW(SEG_MMIO, dst, src)
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#define MMIO_WRITEB(dst, src) _SEG_WRITEB(SEG_MMIO, dst, src)
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#define KERN_READL(dst, src) _SEG_READL(SEG_KERN, dst, src)
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#define KERN_READW(dst, src) _SEG_READW(SEG_KERN, dst, src)
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#define KERN_READB(dst, src) _SEG_READB(SEG_KERN, dst, src)
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#define KERN_WRITEL(dst, src) _SEG_WRITEL(SEG_KERN, dst, src)
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#define KERN_WRITEW(dst, src) _SEG_WRITEW(SEG_KERN, dst, src)
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#define KERN_WRITEB(dst, src) _SEG_WRITEB(SEG_KERN, dst, src)
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#endif
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#ifndef __SEG_GS
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#define META_READL(dst, src) _SEG_READL(SEG_META, dst, src)
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#define META_READW(dst, src) _SEG_READW(SEG_META, dst, src)
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#define META_READB(dst, src) _SEG_READB(SEG_META, dst, src)
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#define META_WRITEL(dst, src) _SEG_WRITEL(SEG_META, dst, src)
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#define META_WRITEW(dst, src) _SEG_WRITEW(SEG_META, dst, src)
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#define META_WRITEB(dst, src) _SEG_WRITEB(SEG_META, dst, src)
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#endif
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#define MEMCPY_FROM_META(dst, src, sz) \
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{ \
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uintptr_t __dst = (uintptr_t)(dst); \
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uintptr_t __src = (uintptr_t)(src); \
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size_t __sz = (size_t)(sz); \
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__asm__ __volatile__ ( \
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"rep movsb %%" SEG_META "s:(%%esi), %%es:(%%edi)\n\t" \
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: "+D"(__dst), "+S"(__src), "+c"(__sz)); \
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}
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#define MEMCPY_TO_META(dst, src, sz) \
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{ \
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uintptr_t __dst = (uintptr_t)(dst); \
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uintptr_t __src = (uintptr_t)(src); \
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size_t __sz = (size_t)(sz); \
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__asm__ __volatile__ ( \
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"push %%es\n\t" \
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"push %%" SEG_META "s\n\t" \
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"pop %%es\n\t" \
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"rep movsb\n\t" \
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"pop %%es\n\t" \
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: "+D"(__dst), "+S"(__src), "+c"(__sz)); \
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}
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/** Compute physical address from offset into kernel data space */
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#define KERN_DATA_OFF_TO_PHYS_ADDR(x) \
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(((uintptr_t)&_sbss_kern_addr) + (uintptr_t)(x))
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/** Compute physical address from offset into default data space */
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#define DATA_OFF_TO_PHYS_ADDR(x) \
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(((uintptr_t)&_sdata_addr) + (uintptr_t)(x))
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/** Compute kernel data offset from physical address in kernel data space */
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#define PHYS_ADDR_TO_KERN_DATA_OFF(x) \
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(((uintptr_t)(x)) - (uintptr_t)&_sbss_kern_addr)
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/**
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* In multi-segment protection domain implementations, it is sufficient to just
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* compare incoming pointers against the frame pointer. All incoming pointers
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* are dereferenced in the main data segment, which only maps the stacks and
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* the shared data section. Since the shared data section is at a higher
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* address range than the stacks, the frame pointer check is sufficient.
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*/
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#define PROT_DOMAINS_CHECK_INCOMING_PTR PROT_DOMAINS_CHECK_INCOMING_PTR_EBP
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void prot_domains_enable_mmio(void);
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void prot_domains_disable_mmio(void);
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#endif /* CPU_X86_MM_MULTI_SEGMENT_H_ */
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