174d4dd80c
This example platform for this port is the EVAL-ADF7XXXMB4Z w/ radio
daughter cards:
http://www.analog.com/en/evaluation/eval-adf7023/eb.html
See the platform readme for usage and platform information:
https://github.com/contiki-os/contiki/tree/master/platform/eval-adf7xxxmb4z/readme.md
All files provided by Analog Devices for this port are released under
the same license as Contiki and copyright Analog Devices Inc. per
agreement between Redwire Consulting, LLC and Analog Devices Inc. (SOW 08122013)
154 lines
7.4 KiB
C
154 lines
7.4 KiB
C
/*
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* Copyright (c) 2014, Analog Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \author Maxim Salov <max.salov@gmail.com>, Ian Martin <martini@redwirellc.com>
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*/
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#include "rl78.h" /* for f_CLK */
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#include "sfrs.h"
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#include "sfrs-ext.h"
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#include "uart0.h"
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#define DESIRED_BAUDRATE 9600
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#define FUDGE_FACTOR 4
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/* Note that only 9600 and 115200 bps were tested: */
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#define PRESCALE_THRESH ((9600 + 115200) / 2)
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#define PRS_VALUE ((DESIRED_BAUDRATE < PRESCALE_THRESH) ? 4 : 0)
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#define f_MCK (f_CLK / (1 << PRS_VALUE) / FUDGE_FACTOR)
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#define SDR_VALUE ((f_MCK / DESIRED_BAUDRATE) >> 1)
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void
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uart0_init(void)
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{
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/* Reference R01AN0459EJ0100 or hardware manual for details */
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PIOR = 0U; /* Disable IO redirection */
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PM1 |= 0x06U; /* Set P11 and P12 as inputs */
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SAU0EN = 1; /* Supply clock to serial array unit 0 */
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SPS0 = (PRS_VALUE << 4) | PRS_VALUE; /* Set input clock (CK00 and CK01) to fclk/16 = 2MHz */
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ST0 = 0x03U; /* Stop operation of channel 0 and 1 */
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/* Setup interrupts (disable) */
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STMK0 = 1; /* Disable INTST0 interrupt */
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STIF0 = 0; /* Clear INTST0 interrupt request flag */
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STPR10 = 1; /* Set INTST0 priority: lowest */
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STPR00 = 1;
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SRMK0 = 1; /* Disable INTSR0 interrupt */
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SRIF0 = 0; /* Clear INTSR0 interrupt request flag */
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SRPR10 = 1; /* Set INTSR0 priority: lowest */
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SRPR00 = 1;
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SREMK0 = 1; /* Disable INTSRE0 interrupt */
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SREIF0 = 0; /* Clear INTSRE0 interrupt request flag */
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SREPR10 = 1; /* Set INTSRE0 priority: lowest */
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SREPR00 = 1;
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/* Setup operation mode for transmitter (channel 0) */
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SMR00 = 0x0023U; /* Operation clock : CK00,
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Transfer clock : division of CK00
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Start trigger : software
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Detect falling edge as start bit
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Operation mode : UART
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Interrupt source : buffer empty
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*/
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SCR00 = 0x8097U; /* Transmission only
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Reception error interrupt masked
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Phase clock : type 1
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No parity
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LSB first
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1 stop bit
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8-bit data length
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*/
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SDR00 = SDR_VALUE << 9;
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/* Setup operation mode for receiver (channel 1) */
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NFEN0 |= 1; /* Enable noise filter on RxD0 pin */
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SIR01 = 0x0007U; /* Clear error flags */
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SMR01 = 0x0122U; /* Operation clock : CK00
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Transfer clock : division of CK00
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Start trigger : valid edge on RxD pin
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Detect falling edge as start bit
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Operation mode : UART
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Interrupt source : transfer end
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*/
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SCR01 = 0x4097U; /* Reception only
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Reception error interrupt masked
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Phase clock : type 1
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No parity
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LSB first
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1 stop bit
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8-bit data length
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*/
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SDR01 = SDR_VALUE << 9;
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SO0 |= 1; /* Prepare for use of channel 0 */
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SOE0 |= 1;
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P1 |= (1 << 2); /* Set TxD0 high */
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PM1 &= ~(1 << 2); /* Set output mode for TxD0 */
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PM1 |= (1 << 1); /* Set input mode for RxD0 */
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SS0 |= 0x03U; /* Enable UART0 operation (both channels) */
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STIF0 = 1; /* Set buffer empty interrupt request flag */
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}
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void
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uart0_putchar(int c)
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{
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while(0 == STIF0) ;
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STIF0 = 0;
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SDR00 = c;
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}
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char
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uart0_getchar(void)
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{
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char c;
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while(!uart0_can_getchar()) ;
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c = SDR01;
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SRIF0 = 0;
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return c;
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}
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int
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uart0_puts(const char *s)
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{
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int len = 0;
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SMR00 |= 0x0001U; /* Set buffer empty interrupt */
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while('\0' != *s) {
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uart0_putchar(*s);
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s++;
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++len;
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}
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#if 0
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while(0 == STIF0) ;
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STIF0 = 0;
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SDR00.sdr00 = '\r';
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#endif
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SMR00 &= ~0x0001U;
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uart0_putchar('\n');
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#if 0
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while(0 != SSR00.BIT.bit6) ; /* Wait until TSF00 == 0 */
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#endif
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return len;
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}
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