ee7af77ca9
- Moved to their own file (so we can later copy the entire thing over to cc2430) - Renamed the functions (for naming convention reasons) - The entire thing can be enabled/disabled - Added a couple more macros - Hooked into main()
357 lines
8.9 KiB
C
357 lines
8.9 KiB
C
#include "contiki.h"
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#include "soc.h"
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#include "stack.h"
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#include "sys/clock.h"
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#include "sys/autostart.h"
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#include "dev/serial-line.h"
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#include "dev/slip.h"
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#include "dev/leds.h"
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#include "dev/uart0.h"
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#include "dev/dma.h"
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#include "dev/cc2530-rf.h"
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#include "dev/watchdog.h"
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#include "dev/clock-isr.h"
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#include "dev/lpm.h"
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#include "dev/button-sensor.h"
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#include "dev/adc-sensor.h"
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#include "dev/leds-arch.h"
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#include "net/rime.h"
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#include "net/netstack.h"
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#include "net/mac/frame802154.h"
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#include "debug.h"
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#include "cc253x.h"
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#include "sfr-bits.h"
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#include "contiki-lib.h"
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#include "contiki-net.h"
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/*---------------------------------------------------------------------------*/
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#if VIZTOOL_CONF_ON
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PROCESS_NAME(viztool_process);
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#endif
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/*---------------------------------------------------------------------------*/
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#if STARTUP_CONF_VERBOSE
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#define PUTSTRING(...) putstring(__VA_ARGS__)
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#define PUTHEX(...) puthex(__VA_ARGS__)
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#define PUTBIN(...) putbin(__VA_ARGS__)
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#define PUTCHAR(...) putchar(__VA_ARGS__)
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#else
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#define PUTSTRING(...)
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#define PUTHEX(...)
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#define PUTBIN(...)
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#define PUTCHAR(...)
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#endif
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/*---------------------------------------------------------------------------*/
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#if CLOCK_CONF_STACK_FRIENDLY
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extern volatile uint8_t sleep_flag;
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#endif
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/*---------------------------------------------------------------------------*/
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extern rimeaddr_t rimeaddr_node_addr;
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static CC_AT_DATA uint16_t len;
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/*---------------------------------------------------------------------------*/
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#if ENERGEST_CONF_ON
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static unsigned long irq_energest = 0;
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#define ENERGEST_IRQ_SAVE(a) do { \
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a = energest_type_time(ENERGEST_TYPE_IRQ); } while(0)
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#define ENERGEST_IRQ_RESTORE(a) do { \
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energest_type_set(ENERGEST_TYPE_IRQ, a); } while(0)
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#else
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#define ENERGEST_IRQ_SAVE(a) do {} while(0)
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#define ENERGEST_IRQ_RESTORE(a) do {} while(0)
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#endif
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/*---------------------------------------------------------------------------*/
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static void
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fade(int l) CC_NON_BANKED
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{
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volatile int i, a;
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int k, j;
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for(k = 0; k < 400; ++k) {
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j = k > 200? 400 - k: k;
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leds_on(l);
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for(i = 0; i < j; ++i) {
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a = i;
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}
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leds_off(l);
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for(i = 0; i < 200 - j; ++i) {
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a = i;
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}
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}
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}
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/*---------------------------------------------------------------------------*/
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static void
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set_rime_addr(void) CC_NON_BANKED
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{
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char i;
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#if CC2530_CONF_MAC_FROM_PRIMARY
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__xdata unsigned char * macp = &X_IEEE_ADDR;
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#else
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__code unsigned char * macp = (__code unsigned char *) 0xFFE8;
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#endif
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PUTSTRING("Rime is 0x");
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PUTHEX(sizeof(rimeaddr_t));
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PUTSTRING(" bytes long\n");
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#if CC2530_CONF_MAC_FROM_PRIMARY
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PUTSTRING("Reading MAC from Info Page\n");
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#else
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PUTSTRING("Reading MAC from flash\n");
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/*
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* The MAC is always stored in 0xFFE8 of the highest BANK of our flash. This
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* maps to address 0xFFF8 of our CODE segment, when this BANK is selected.
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* Load the bank, read 8 bytes starting at 0xFFE8 and restore last BANK.
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* Since we are called from main(), this MUST be BANK1 or something is very
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* wrong. This code can be used even without a bankable firmware.
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*/
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/* Don't interrupt us to make sure no BANK switching happens while working */
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DISABLE_INTERRUPTS();
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/* Switch to the BANKn,
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* map CODE: 0x8000 - 0xFFFF to FLASH: 0xn8000 - 0xnFFFF */
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FMAP = CC2530_LAST_FLASH_BANK;
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#endif
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for(i = (RIMEADDR_SIZE - 1); i >= 0; --i) {
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rimeaddr_node_addr.u8[i] = *macp;
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macp++;
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}
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#if !CC2530_CONF_MAC_FROM_PRIMARY
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/* Remap 0x8000 - 0xFFFF to BANK1 */
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FMAP = 1;
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ENABLE_INTERRUPTS();
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#endif
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/* Now the address is stored MSB first */
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#if STARTUP_CONF_VERBOSE
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PUTSTRING("Rime configured with address ");
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for(i = 0; i < RIMEADDR_SIZE - 1; i++) {
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PUTHEX(rimeaddr_node_addr.u8[i]);
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PUTCHAR(':');
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}
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PUTHEX(rimeaddr_node_addr.u8[i]);
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PUTCHAR('\n');
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#endif
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cc2530_rf_set_addr(IEEE802154_PANID);
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return;
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}
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/*---------------------------------------------------------------------------*/
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int
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main(void) CC_NON_BANKED
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{
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/* Hardware initialization */
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clock_init();
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soc_init();
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rtimer_init();
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stack_poison();
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/* Init LEDs here */
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leds_init();
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leds_off(LEDS_ALL);
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fade(LEDS_GREEN);
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/* initialize process manager. */
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process_init();
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/* Init UART */
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uart0_init();
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#if DMA_ON
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dma_init();
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#endif
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#if SLIP_ARCH_CONF_ENABLE
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slip_arch_init(0);
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#else
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uart0_set_input(serial_line_input_byte);
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serial_line_init();
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#endif
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fade(LEDS_RED);
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PUTSTRING("##########################################\n");
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putstring(CONTIKI_VERSION_STRING "\n");
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putstring("TI SmartRF05 EB\n");
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switch(CHIPID) {
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case 0xA5:
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putstring("cc2530");
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break;
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case 0xB5:
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putstring("cc2531");
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break;
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case 0x95:
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putstring("cc2533");
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break;
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case 0x8D:
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putstring("cc2540");
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break;
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}
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putstring("-" CC2530_FLAVOR_STRING ", ");
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puthex(CHIPINFO1 + 1);
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putstring("KB SRAM\n");
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PUTSTRING("\nSDCC Build:\n");
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#if STARTUP_CONF_VERBOSE
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#ifdef HAVE_SDCC_BANKING
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PUTSTRING(" With Banking.\n");
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#endif /* HAVE_SDCC_BANKING */
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#ifdef SDCC_MODEL_LARGE
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PUTSTRING(" --model-large\n");
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#endif /* SDCC_MODEL_LARGE */
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#ifdef SDCC_MODEL_HUGE
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PUTSTRING(" --model-huge\n");
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#endif /* SDCC_MODEL_HUGE */
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#ifdef SDCC_STACK_AUTO
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PUTSTRING(" --stack-auto\n");
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#endif /* SDCC_STACK_AUTO */
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PUTCHAR('\n');
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PUTSTRING(" Net: ");
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PUTSTRING(NETSTACK_NETWORK.name);
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PUTCHAR('\n');
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PUTSTRING(" MAC: ");
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PUTSTRING(NETSTACK_MAC.name);
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PUTCHAR('\n');
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PUTSTRING(" RDC: ");
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PUTSTRING(NETSTACK_RDC.name);
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PUTCHAR('\n');
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PUTSTRING("##########################################\n");
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#endif
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watchdog_init();
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/* Initialise the H/W RNG engine. */
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random_init(0);
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/* start services */
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process_start(&etimer_process, NULL);
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ctimer_init();
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/* initialize the netstack */
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netstack_init();
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set_rime_addr();
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#if BUTTON_SENSOR_ON || ADC_SENSOR_ON
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process_start(&sensors_process, NULL);
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BUTTON_SENSOR_ACTIVATE();
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ADC_SENSOR_ACTIVATE();
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#endif
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#if UIP_CONF_IPV6
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memcpy(&uip_lladdr.addr, &rimeaddr_node_addr, sizeof(uip_lladdr.addr));
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queuebuf_init();
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process_start(&tcpip_process, NULL);
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#endif /* UIP_CONF_IPV6 */
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#if VIZTOOL_CONF_ON
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process_start(&viztool_process, NULL);
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#endif
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energest_init();
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ENERGEST_ON(ENERGEST_TYPE_CPU);
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autostart_start(autostart_processes);
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watchdog_start();
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fade(LEDS_YELLOW);
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while(1) {
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uint8_t r;
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do {
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/* Reset watchdog and handle polls and events */
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watchdog_periodic();
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#if CLOCK_CONF_STACK_FRIENDLY
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if(sleep_flag) {
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if(etimer_pending() &&
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(etimer_next_expiration_time() - clock_time() - 1) > MAX_TICKS) {
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etimer_request_poll();
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}
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sleep_flag = 0;
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}
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#endif
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r = process_run();
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} while(r > 0);
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len = NETSTACK_RADIO.pending_packet();
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if(len) {
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packetbuf_clear();
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len = NETSTACK_RADIO.read(packetbuf_dataptr(), PACKETBUF_SIZE);
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if(len > 0) {
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packetbuf_set_datalen(len);
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NETSTACK_RDC.input();
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}
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}
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#if LPM_MODE
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#if (LPM_MODE==LPM_MODE_PM2)
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SLEEP &= ~OSC_PD; /* Make sure both HS OSCs are on */
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while(!(SLEEP & HFRC_STB)); /* Wait for RCOSC to be stable */
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CLKCON |= OSC; /* Switch to the RCOSC */
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while(!(CLKCON & OSC)); /* Wait till it's happened */
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SLEEP |= OSC_PD; /* Turn the other one off */
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#endif /* LPM_MODE==LPM_MODE_PM2 */
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/*
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* Set MCU IDLE or Drop to PM1. Any interrupt will take us out of LPM
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* Sleep Timer will wake us up in no more than 7.8ms (max idle interval)
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*/
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SLEEPCMD = (SLEEPCMD & 0xFC) | (LPM_MODE - 1);
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#if (LPM_MODE==LPM_MODE_PM2)
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/*
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* Wait 3 NOPs. Either an interrupt occurred and SLEEP.MODE was cleared or
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* no interrupt occurred and we can safely power down
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*/
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__asm
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nop
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nop
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nop
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__endasm;
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if(SLEEPCMD & SLEEP_MODE0) {
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#endif /* LPM_MODE==LPM_MODE_PM2 */
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ENERGEST_OFF(ENERGEST_TYPE_CPU);
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ENERGEST_ON(ENERGEST_TYPE_LPM);
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/* We are only interested in IRQ energest while idle or in LPM */
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ENERGEST_IRQ_RESTORE(irq_energest);
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/* Go IDLE or Enter PM1 */
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PCON |= PCON_IDLE;
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/* First instruction upon exiting PM1 must be a NOP */
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__asm
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nop
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__endasm;
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/* Remember energest IRQ for next pass */
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ENERGEST_IRQ_SAVE(irq_energest);
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ENERGEST_ON(ENERGEST_TYPE_CPU);
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ENERGEST_OFF(ENERGEST_TYPE_LPM);
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#if (LPM_MODE==LPM_MODE_PM2)
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SLEEPCMD &= ~SLEEP_OSC_PD; /* Make sure both HS OSCs are on */
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while(!(SLEEPCMD & SLEEP_XOSC_STB)); /* Wait for XOSC to be stable */
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CLKCONCMD &= ~CLKCONCMD_OSC; /* Switch to the XOSC */
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/*
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* On occasion the XOSC is reported stable when in reality it's not.
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* We need to wait for a safeguard of 64us or more before selecting it
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*/
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clock_delay_usec(65);
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while(CLKCONCMD & CLKCONCMD_OSC); /* Wait till it's happened */
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}
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#endif /* LPM_MODE==LPM_MODE_PM2 */
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#endif /* LPM_MODE */
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}
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}
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/*---------------------------------------------------------------------------*/
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