247 lines
8 KiB
C
247 lines
8 KiB
C
/*
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* Copyright (c) 2015, Mehdi Migault
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc2538-i2c cc2538 I2C Control
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* @{
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*
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* \file
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* Implementation file of the I2C Control module
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*
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* \author
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* Mehdi Migault
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*/
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#include "i2c.h"
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#include <stdint.h>
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#include "clock.h"
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#include "sys-ctrl.h"
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/*---------------------------------------------------------------------------*/
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void
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i2c_init(uint8_t port_sda, uint8_t pin_sda, uint8_t port_scl, uint8_t pin_scl,
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uint32_t bus_speed)
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{
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/* Enable I2C clock in different modes */
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REG(SYS_CTRL_RCGCI2C) |= 1; /* Run mode */
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/* Reset I2C peripheral */
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REG(SYS_CTRL_SRI2C) |= 1; /* Reset position */
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/* Delay for a little bit */
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clock_delay_usec(50);
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REG(SYS_CTRL_SRI2C) &= ~1; /* Normal position */
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/* Set pins in input */
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GPIO_SET_INPUT(GPIO_PORT_TO_BASE(port_sda), GPIO_PIN_MASK(pin_sda));
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GPIO_SET_INPUT(GPIO_PORT_TO_BASE(port_scl), GPIO_PIN_MASK(pin_scl));
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/* Set peripheral control for the pins */
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GPIO_PERIPHERAL_CONTROL(GPIO_PORT_TO_BASE(port_sda), GPIO_PIN_MASK(pin_sda));
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GPIO_PERIPHERAL_CONTROL(GPIO_PORT_TO_BASE(port_scl), GPIO_PIN_MASK(pin_scl));
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/* Set the pad to no drive type */
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ioc_set_over(port_sda, pin_sda, IOC_OVERRIDE_DIS);
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ioc_set_over(port_scl, pin_scl, IOC_OVERRIDE_DIS);
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/* Set pins as peripheral inputs */
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REG(IOC_I2CMSSDA) = ioc_input_sel(port_sda, pin_sda);
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REG(IOC_I2CMSSCL) = ioc_input_sel(port_scl, pin_scl);
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/* Set pins as peripheral outputs */
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ioc_set_sel(port_sda, pin_sda, IOC_PXX_SEL_I2C_CMSSDA);
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ioc_set_sel(port_scl, pin_scl, IOC_PXX_SEL_I2C_CMSSCL);
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/* Enable the I2C master module */
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i2c_master_enable();
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/* t the master clock frequency */
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i2c_set_frequency(bus_speed);
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}
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/*---------------------------------------------------------------------------*/
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void
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i2c_master_enable(void)
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{
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REG(I2CM_CR) |= 0x10; /* Set MFE bit */
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}
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/*---------------------------------------------------------------------------*/
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void
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i2c_master_disable(void)
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{
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REG(I2CM_CR) &= ~0x10; /* Reset MFE bit */
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}
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/*---------------------------------------------------------------------------*/
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void
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i2c_set_frequency(uint32_t freq)
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{
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/* Peripheral clock setting, using the system clock */
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REG(I2CM_TPR) = ((SYS_CTRL_SYS_CLOCK + (2 * 10 * freq) - 1) /
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(2 * 10 * freq)) - 1;
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}
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/*---------------------------------------------------------------------------*/
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void
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i2c_master_set_slave_address(uint8_t slave_addr, uint8_t access_mode)
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{
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if(access_mode) {
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REG(I2CM_SA) = ((slave_addr << 1) | 1);
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} else {
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REG(I2CM_SA) = (slave_addr << 1);
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}
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}
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/*---------------------------------------------------------------------------*/
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void
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i2c_master_data_put(uint8_t data)
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{
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REG(I2CM_DR) = data;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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i2c_master_data_get(void)
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{
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return REG(I2CM_DR);
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}
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/*---------------------------------------------------------------------------*/
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void
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i2c_master_command(uint8_t cmd)
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{
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REG(I2CM_CTRL) = cmd;
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/* Here we need a delay, otherwise the I2C module keep the receiver mode */
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clock_delay_usec(1);
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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i2c_master_busy(void)
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{
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return REG(I2CM_STAT) & I2CM_STAT_BUSY;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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i2c_master_error(void)
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{
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uint8_t temp = REG(I2CM_STAT); /* Get all status */
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if(temp & I2CM_STAT_BUSY) { /* No valid if BUSY bit is set */
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return I2C_MASTER_ERR_NONE;
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} else if(temp & (I2CM_STAT_ERROR | I2CM_STAT_ARBLST)) {
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return temp; /* Compare later */
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}
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return I2C_MASTER_ERR_NONE;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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i2c_single_send(uint8_t slave_addr, uint8_t data)
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{
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i2c_master_set_slave_address(slave_addr, I2C_SEND);
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i2c_master_data_put(data);
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i2c_master_command(I2C_MASTER_CMD_SINGLE_SEND);
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while(i2c_master_busy());
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/* Return the STAT register of I2C module if error occured, I2C_MASTER_ERR_NONE otherwise */
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return i2c_master_error();
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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i2c_single_receive(uint8_t slave_addr, uint8_t *data)
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{
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uint8_t temp;
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i2c_master_set_slave_address(slave_addr, I2C_RECEIVE);
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i2c_master_command(I2C_MASTER_CMD_SINGLE_RECEIVE);
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while(i2c_master_busy());
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temp = i2c_master_error();
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if(temp == I2C_MASTER_ERR_NONE) {
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*data = i2c_master_data_get();
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}
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return temp;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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i2c_burst_send(uint8_t slave_addr, uint8_t *data, uint8_t len)
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{
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uint8_t sent;
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if((len == 0) || (data == NULL)) {
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return I2CM_STAT_INVALID;
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}
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if(len == 1) {
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return i2c_single_send(slave_addr, data[0]);
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}
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i2c_master_set_slave_address(slave_addr, I2C_SEND);
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i2c_master_data_put(data[0]);
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i2c_master_command(I2C_MASTER_CMD_BURST_SEND_START);
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while(i2c_master_busy());
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if(i2c_master_error() == I2C_MASTER_ERR_NONE) {
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for(sent = 1; sent <= (len - 2); sent++) {
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i2c_master_data_put(data[sent]);
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i2c_master_command(I2C_MASTER_CMD_BURST_SEND_CONT);
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while(i2c_master_busy());
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}
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/* This should be the last byte, stop sending */
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i2c_master_data_put(data[len - 1]);
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i2c_master_command(I2C_MASTER_CMD_BURST_SEND_FINISH);
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while(i2c_master_busy());
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}
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/* Return the STAT register of I2C module if error occurred, I2C_MASTER_ERR_NONE otherwise */
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return i2c_master_error();
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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i2c_burst_receive(uint8_t slave_addr, uint8_t *data, uint8_t len)
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{
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uint8_t recv = 0;
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if((len == 0) || data == NULL) {
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return I2CM_STAT_INVALID;
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}
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if(len == 1) {
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return i2c_single_receive(slave_addr, &data[0]);
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}
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i2c_master_set_slave_address(slave_addr, I2C_RECEIVE);
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i2c_master_command(I2C_MASTER_CMD_BURST_RECEIVE_START);
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while(i2c_master_busy());
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if(i2c_master_error() == I2C_MASTER_ERR_NONE) {
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data[0] = i2c_master_data_get();
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/* If we got 2 or more bytes pending to be received, keep going*/
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for(recv = 1; recv <= (len - 2); recv++) {
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i2c_master_command(I2C_MASTER_CMD_BURST_RECEIVE_CONT);
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while(i2c_master_busy());
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data[recv] = i2c_master_data_get();
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}
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/* This should be the last byte, stop receiving */
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i2c_master_command(I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
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while(i2c_master_busy());
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data[len - 1] = i2c_master_data_get();
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}
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return i2c_master_error();
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}
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/*---------------------------------------------------------------------------*/
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/** @} */
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