e28f400e0c
This patch introduces the interrupt.h header file which provides some
helper macros to set a interrupt handler and disable/enable maskable
hardware interrupts.
Since there is no easy way to write an Interrupt Service Routines
(ISR) in C (for further information on this, see [1]), we introduce
the SET_INTERRUPT_HANDLER helper macro.
The macro does two things:
1) Defines an assembly trampolin to a C function that will, indeed,
handle the interrupt.
2) Sets the corresponding interrupt gate descriptor in IDT.
The macro usage is pretty straightforward. The macro is defined as
SET_INTERRUPT_HANDLER(num, has_error_code, handler) where:
@num: Interrupt number (0-255)
@has_error_code: 0 if processor doesn't push error code onto the
stack. Otherwise, set this argument to 1.
@handler: Pointer to function that should be called once the
interrupt is raised. In case has_error_code == 0
the function prototype should be the following:
void handler(void)
Otherwise, it should be:
void handler(struct interrupt_context context)
For instance, let's say we want to set a handler for a device interrupt
(for example, interrupt number 101). Remember, hardware interrupts don't
have error code. So we should have something like this:
void interrupt_handler(void)
{
/* Handling code here */
}
void my_device_init(void)
{
...
SET_INTERRUPT_HANDLER(101, 0, interrupt_handler);
...
}
Now, let's say we want to set an interrupt handler for Page Fault
(interrupt number 14). Some exceptions, such as Page Fault, pushes an
error code onto the stack and may require registers values in order
to be properly be handled. Thus, the code should look like this:
void pagefault_handler(struct interrupt_context context)
{
/* Handling code here */
}
void init_memory(void)
{
...
SET_INTERRUPT_HANDLER(14, 1, pagefault_handler);
...
}
For further information about exceptions and error code, refer to Intel
Combined Manual, Vol. 3, Sections 6.3 and 6.13.
Finally, we don't define any API to unregister interrupt handlers since
we believe that it wouldn't be useful at all, at least at this moment.
Considering Contiki's context, interrupt handler registration is pretty
"static" and defined at compile-time by platform code (or the device
drivers used by the platform).
[1] http://wiki.osdev.org/Interrupt_Service_Routines
94 lines
3.4 KiB
C
94 lines
3.4 KiB
C
/*
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* Copyright (C) 2015, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdint.h>
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#include "helpers.h"
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#define NUM_DESC 256
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typedef struct idtr {
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uint16_t limit;
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uint32_t base;
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} __attribute__((packed)) idtr_t;
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typedef struct intr_gate_desc {
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uint16_t offset_low;
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uint16_t selector; /* Segment Selector for destination code segment */
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uint16_t fixed:11;
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uint16_t d:1; /* Size of gate: 1 = 32 bits; 0 = 16 bits */
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uint16_t pad:1;
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uint16_t dpl:2; /* Descriptor Privilege Level */
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uint16_t p:1; /* Segment Present flag */
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uint16_t offset_high;
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} __attribute__((packed)) intr_gate_desc_t;
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/* According to Intel Combined Manual, Vol. 3, Section 6.10, the base addresses
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* of the IDT should be aligned on an 8-byte boundary to maximize performance
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* of cache line fills.
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*/
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static intr_gate_desc_t idt[NUM_DESC] __attribute__ ((aligned(8)));
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/* XXX: If you change this function prototype, make sure you fix the assembly
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* code in SET_INTERRUPT_HANDLER macro in interrupt.h. Otherwise, you might
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* face a very-hard-to-find bug in the interrupt handling system.
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*/
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void
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idt_set_intr_gate_desc(int intr_num, uint32_t offset)
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{
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intr_gate_desc_t *desc = &idt[intr_num];
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desc->offset_low = offset & 0xFFFF;
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desc->selector = 0x08; /* Offset in GDT for code segment */
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desc->fixed = BIT(9) | BIT(10);
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desc->d = 1;
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desc->dpl = 0;
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desc->p = 1;
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desc->offset_high = (offset >> 16) & 0xFFFF;
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}
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/*---------------------------------------------------------------------------*/
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/* Initialize Interrupt Descriptor Table. The IDT is initialized with
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* null descriptors. Therefore, any interrupt at this point will cause
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* a triple fault.
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*/
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void
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idt_init(void)
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{
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idtr_t idtr;
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/* Initialize idtr structure */
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idtr.limit = (sizeof(intr_gate_desc_t) * NUM_DESC) - 1;
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idtr.base = (uint32_t)&idt;
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/* Load IDTR register */
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__asm__("lidt %0\n\t" :: "m" (idtr));
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}
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