249 lines
8.2 KiB
C
249 lines
8.2 KiB
C
/*
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* Copyright (c) 2014, Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "contiki-conf.h"
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#include "cc26xx-uart.h"
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#include "hw_types.h"
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#include "hw_memmap.h"
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#include "sys_ctrl.h"
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#include "prcm.h"
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#include "ioc.h"
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#include "uart.h"
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#include "lpm.h"
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#include "ti-lib.h"
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#include "sys/energest.h"
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#include <stdint.h>
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/*---------------------------------------------------------------------------*/
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/* Which events to trigger a UART interrupt */
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#define CC26XX_UART_RX_INTERRUPT_TRIGGERS (UART_INT_RX | UART_INT_RT)
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/* All interrupt masks */
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#define CC26XX_UART_INTERRUPT_ALL (UART_INT_OE | UART_INT_BE | UART_INT_PE | \
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UART_INT_FE | UART_INT_RT | UART_INT_TX | \
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UART_INT_RX | UART_INT_CTS)
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/*---------------------------------------------------------------------------*/
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#define cc26xx_uart_isr UART0IntHandler
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/*---------------------------------------------------------------------------*/
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static int (*input_handler)(unsigned char c);
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/*---------------------------------------------------------------------------*/
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static void
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power_domain_on(void)
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{
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ti_lib_prcm_power_domain_on(PRCM_DOMAIN_SERIAL);
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while(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
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!= PRCM_DOMAIN_POWER_ON);
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}
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/*---------------------------------------------------------------------------*/
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static void
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configure_baud_rate(void)
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{
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/*
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* Configure the UART for 115,200, 8-N-1 operation.
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* This function uses SysCtrlClockGet() to get the system clock
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* frequency. This could be also be a variable or hard coded value
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* instead of a function call.
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*/
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ti_lib_uart_config_set_exp_clk(UART0_BASE,
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ti_lib_sys_ctrl_peripheral_clock_get(
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PRCM_PERIPH_UART0,
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SYSCTRL_SYSBUS_ON),
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CC26XX_UART_CONF_BAUD_RATE,
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(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
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UART_CONFIG_PAR_NONE));
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}
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/*---------------------------------------------------------------------------*/
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static void
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configure_registers(void)
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{
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/*
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* Map UART signals to the correct GPIO pins and configure them as
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* hardware controlled.
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*/
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ti_lib_ioc_pin_type_uart(UART0_BASE, BOARD_IOID_UART_RX, BOARD_IOID_UART_TX,
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BOARD_IOID_UART_CTS, BOARD_IOID_UART_RTS);
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configure_baud_rate();
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/*
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* Generate an RX interrupt at FIFO 1/2 full.
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* We don't really care about the TX interrupt
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*/
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ti_lib_uart_fifo_level_set(UART0_BASE, UART_FIFO_TX7_8, UART_FIFO_RX4_8);
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/* Configure which interrupts to generate: FIFO level or after RX timeout */
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ti_lib_uart_int_enable(UART0_BASE, CC26XX_UART_RX_INTERRUPT_TRIGGERS);
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}
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/*---------------------------------------------------------------------------*/
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static void
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uart_on(void)
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{
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power_domain_on();
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/* Configure baud rate and enable */
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if((HWREG(UART0_BASE + UART_O_CTL) & UART_CTL_UARTEN) == 0) {
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configure_registers();
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/* Enable UART */
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ti_lib_uart_enable(UART0_BASE);
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}
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}
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/*---------------------------------------------------------------------------*/
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static uint8_t
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lpm_permit_max_pm_handler(void)
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{
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return LPM_MODE_MAX_SUPPORTED;
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}
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/*---------------------------------------------------------------------------*/
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static void
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lpm_drop_handler(uint8_t mode)
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{
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/* Do nothing if the PD is off */
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if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
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!= PRCM_DOMAIN_POWER_ON) {
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return;
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}
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/* Wait for outstanding TX to complete */
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while(ti_lib_uart_busy(UART0_BASE));
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/*
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* Check our clock gate under Deep Sleep. If it's off, we can shut down. If
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* it's on, this means that some other code module wants UART functionality
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* during deep sleep, so we stay enabled
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*/
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if((HWREG(PRCM_BASE + PRCM_O_UARTCLKGDS) & 1) == 0) {
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ti_lib_ioc_pin_type_gpio_input(BOARD_IOID_UART_RX);
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ti_lib_ioc_pin_type_gpio_input(BOARD_IOID_UART_TX);
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ti_lib_uart_disable(UART0_BASE);
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}
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}
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/*---------------------------------------------------------------------------*/
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static void
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lpm_wakeup_handler(void)
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{
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uart_on();
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}
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/*---------------------------------------------------------------------------*/
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/* Declare a data structure to register with LPM. */
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LPM_MODULE(uart_module, lpm_permit_max_pm_handler,
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lpm_drop_handler, lpm_wakeup_handler);
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/*---------------------------------------------------------------------------*/
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void
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cc26xx_uart_init()
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{
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/* Exit without initialising if ports are misconfigured */
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if(BOARD_IOID_UART_RX == IOID_UNUSED ||
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BOARD_IOID_UART_TX == IOID_UNUSED) {
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return;
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}
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/* Enable the serial domain and wait for domain to be on */
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power_domain_on();
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/* Enable the UART clock when running and sleeping */
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ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_UART0);
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/* Apply clock settings and wait for them to take effect */
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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/* Disable Interrupts */
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ti_lib_int_master_disable();
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/* Make sure the peripheral is disabled */
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ti_lib_uart_disable(UART0_BASE);
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/* Disable all UART module interrupts */
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ti_lib_uart_int_disable(UART0_BASE, CC26XX_UART_INTERRUPT_ALL);
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configure_registers();
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/* Acknowledge UART interrupts */
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ti_lib_int_enable(INT_UART0);
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/* Re-enable processor interrupts */
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ti_lib_int_master_enable();
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/* Enable UART */
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ti_lib_uart_enable(UART0_BASE);
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/* Register ourselves with the LPM module */
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lpm_register_module(&uart_module);
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}
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/*---------------------------------------------------------------------------*/
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void
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cc26xx_uart_write_byte(uint8_t c)
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{
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if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
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!= PRCM_DOMAIN_POWER_ON) {
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return;
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}
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ti_lib_uart_char_put(UART0_BASE, c);
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}
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/*---------------------------------------------------------------------------*/
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void
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cc26xx_uart_set_input(int (*input)(unsigned char c))
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{
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input_handler = input;
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return;
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}
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/*---------------------------------------------------------------------------*/
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void
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cc26xx_uart_isr(void)
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{
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char the_char;
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uint32_t flags;
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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/* Read out the masked interrupt status */
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flags = ti_lib_uart_int_status(UART0_BASE, true);
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/* Clear all UART interrupt flags */
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ti_lib_uart_int_clear(UART0_BASE, CC26XX_UART_INTERRUPT_ALL);
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if((flags & CC26XX_UART_RX_INTERRUPT_TRIGGERS) != 0) {
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/*
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* If this was a FIFO RX or an RX timeout, read all bytes available in the
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* RX FIFO.
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*/
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while(ti_lib_uart_chars_avail(UART0_BASE)) {
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the_char = ti_lib_uart_char_get_non_blocking(UART0_BASE);
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if(input_handler != NULL) {
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input_handler((unsigned char)the_char);
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}
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}
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}
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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}
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