fd54bc9ca4
Hardware init function profit a great deal from being inlined if the given parameters are constant -- which is the common use-case, we could probably call this for all timers and still have less overhead. The hwtimer_pwm_ini (which calls hwtimer_ini) gets completely computed at compile-time resulting only in the register settings of hwtimer_ini. This is now possible because we get rid of static storage for the max_ticks and instead compute this in hwtimer_pwm_max_ticks from the timer register settings.
522 lines
17 KiB
C
522 lines
17 KiB
C
/*
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* Copyright (c) 2014, Ralf Schlatterbeck Open Source Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*/
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/**
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* \defgroup hardware timer
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*
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* This module wraps hardware timers of AVR microcontrollers.
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* Currently we only support 16-bit timers. The main focus is currently
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* on PWM generation. But input capture and interrupt routines are on
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* the TODO list, see below. We currently support the AVR ATmega128RFA1
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* so this should be generalized to supported timers of other AVR
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* microcontrollers.
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*
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* Datasheet references in the following refer to ATmega128RFA1 data sheet
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*
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* TODO: Allow input capture.
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* TODO: Allow definition of interrupt routine; check if merkur board
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* supports necessary pins.
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* TODO: Generalize for 8-bit timers.
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* TODO: Check other AVR microcontrollers and the supported timers.
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*
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* @{
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*/
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/**
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* \file
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* Header file for hardware timer of AVR microcontrollers
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* \author
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* Ralf Schlatterbeck <rsc@runtux.com>
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*
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*/
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#ifndef hw_timer_h
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#define hw_timer_h
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#include "contiki.h"
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#include "rtimer-arch.h"
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#ifndef PLAT_TIMER
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#define PLAT_TIMER -1
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#endif
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/*
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* All routines return a negative number for error and 0 for success.
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* The negative return value indicates the error.
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*/
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#define HWT_ERR_INVALID_TIMER (-1)
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#define HWT_ERR_INVALID_WGM (-2)
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#define HWT_ERR_INVALID_COM (-3)
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#define HWT_ERR_INVALID_CLOCK (-4)
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#define HWT_ERR_INVALID_CHANNEL (-5)
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/*
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* Timer waveform generation modes (WGM), see data sheet
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* chapter 18 "16-bit Timer/Counter (Timer/Counter 1,3,4, and 5)
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* 18.9 "Modes of Operation", in particular Table 18-5
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*/
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#define HWT_WGM_NORMAL 0
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#define HWT_WGM_PWM_PHASE_8_BIT 1
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#define HWT_WGM_PWM_PHASE_9_BIT 2
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#define HWT_WGM_PWM_PHASE_10_BIT 3
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#define HWT_WGM_CTC_OCRA 4
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#define HWT_WGM_PWM_FAST_8_BIT 5
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#define HWT_WGM_PWM_FAST_9_BIT 6
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#define HWT_WGM_PWM_FAST_10_BIT 7
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#define HWT_WGM_PWM_PHASE_FRQ_ICR 8
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#define HWT_WGM_PWM_PHASE_FRQ_OCRA 9
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#define HWT_WGM_PWM_PHASE_ICR 10
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#define HWT_WGM_PWM_PHASE_OCRA 11
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#define HWT_WGM_CTC_ICR 12
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#define HWT_WGM_RESERVED 13
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#define HWT_WGM_PWM_FAST_ICR 14
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#define HWT_WGM_PWM_FAST_OCRA 15
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#define HWT_WGM_MASK 15
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#define HWT_WGM_MASK_LOW 3
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#define HWT_WGM_MASK_HIGH (HWT_WGM_MASK - HWT_WGM_MASK_LOW)
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#define HWT_WGM_SHIFT_LOW 0
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#define HWT_WGM_SHIFT_HIGH 1
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/*
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* Timer compare output modes (COM),
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* chapter 18 "16-bit Timer/Counter (Timer/Counter 1,3,4, and 5)
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* 18.8 "Compare Match Output Unit", in particular Tables 18-2,3,4
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*/
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#define HWT_COM_NORMAL 0
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#define HWT_COM_TOGGLE 1
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#define HWT_COM_CLEAR 2
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#define HWT_COM_SET 3
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#define HWT_COM_MASK 3
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/*
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* Clock select, clock can be off, use prescaler or external clock
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* source on Tn pin. See Table 18-11 (for Timer 1 but this is the same
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* for all the timers).
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*/
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#define HWT_CLOCK_OFF 0
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#define HWT_CLOCK_PRESCALER_1 1
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#define HWT_CLOCK_PRESCALER_8 2
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#define HWT_CLOCK_PRESCALER_64 3
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#define HWT_CLOCK_PRESCALER_256 4
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#define HWT_CLOCK_PRESCALER_1024 5
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#define HWT_CLOCK_EXTERN_FALLING 6
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#define HWT_CLOCK_EXTERN_RISING 7
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#define HWT_CLOCK_MASK 7
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/*
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* Timer channels A B C
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*/
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#define HWT_CHANNEL_A 0
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#define HWT_CHANNEL_B 1
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#define HWT_CHANNEL_C 2
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#define HWT_CHANNEL_D 3
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#define HWT_CHANNEL_MASK 3
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/* The following macros are defined for timer values 1,3,4,5 */
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#define HWT_ICR(t) \
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((t)<4?((t)==1?(&ICR1) :(&ICR3)) :((t)==4?(&ICR4) :(&ICR5)))
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#define HWT_OCRA(t) \
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((t)<4?((t)==1?(&OCR1A):(&OCR3A)):((t)==4?(&OCR4A):(&OCR5A)))
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#define HWT_OCRB(t) \
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((t)<4?((t)==1?(&OCR1B):(&OCR3B)):((t)==4?(&OCR4B):(&OCR5B)))
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#define HWT_OCRC(t) \
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((t)<4?((t)==1?(&OCR1C):(&OCR3C)):((t)==4?(&OCR4C):(&OCR5C)))
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#define HWT_OCR(t,c) \
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( (c)==HWT_CHANNEL_A \
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? (HWT_OCRA(t)) \
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: ((c)==HWT_CHANNEL_B?HWT_OCRB(t):HWT_OCRC(t)) \
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)
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#define HWT_TCCRA(t) \
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( (t)<4 \
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? ((t)==1?(&TCCR1A):(&TCCR3A)) \
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: ((t)==4?(&TCCR4A):(&TCCR5A)) \
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)
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#define HWT_TCCRB(t) \
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( (t)<4 \
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? ((t)==1?(&TCCR1B):(&TCCR3B)) \
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: ((t)==4?(&TCCR4B):(&TCCR5B)) \
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)
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#define HWT_TCCRC(t) \
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( (t)<4 \
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? ((t)==1?(&TCCR1C):(&TCCR3C)) \
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: ((t)==4?(&TCCR4C):(&TCCR5C)) \
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)
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#define HWT_TCNT(t) \
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( (t)<4 \
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? ((t)==1?(&TCNT1) :(&TCNT3)) \
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: ((t)==4?(&TCNT4) :(&TCNT5)) \
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)
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#define HWT_SET_COM(timer, channel, com) \
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((*HWT_TCCRA (timer) &= ~(HWT_COM_MASK << (6 - 2 * (channel)))) \
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,(*HWT_TCCRA (timer) |= ((com) << (6 - 2 * (channel)))) \
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)
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#define HWT_CHECK_TIMER(timer) \
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do { \
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if ((timer) == 0 || (timer) == 2 || (timer) == PLAT_TIMER || (timer) > 5) {\
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return HWT_ERR_INVALID_TIMER; \
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} \
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} while (0)
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#define HWT_CHECK_CHANNEL(chan) \
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do { \
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if ((chan) > HWT_CHANNEL_C) { \
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return HWT_ERR_INVALID_CHANNEL; \
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} \
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} while (0)
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#define HWT_PWM_FAST 0
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#define HWT_PWM_PHASE_CORRECT 1
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#define HWT_PWM_PHASE_FRQ_CORRECT 2
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/**
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* \brief Initialize the hardware timer with the given settings
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* \param timer: Timer to use
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* \param wgm: waveform generation mode to use, see definitions
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* \param clock: Prescaler or external clock settings
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* \param maxt: Maximum counter value, not used for fixed modes, this
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* sets ICRn for the ICR modes and OCRnA for the OCR modes
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* \return see HWT_ERR definitions for return codes, returns 0 if ok
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*
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* The initial compare output mode is set to HWT_COM_NORMAL (off) for
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* all outputs (pwm disabled).
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*
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* Note that this sets the compare output mode COM registers to 0,
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* turning off PWM on outputs.
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*/
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static inline int8_t
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hwtimer_ini (uint8_t timer, uint8_t wgm, uint8_t clock, uint16_t maxt)
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{
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int8_t i;
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HWT_CHECK_TIMER (timer);
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if (wgm > HWT_WGM_MASK || wgm == HWT_WGM_RESERVED) {
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return HWT_ERR_INVALID_WGM;
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}
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if (clock > HWT_CLOCK_MASK) {
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return HWT_ERR_INVALID_CLOCK;
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}
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/* Turn off clock, no need to disable interrupt */
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*HWT_TCCRB (timer) &= ~HWT_CLOCK_MASK;
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*HWT_TCCRA (timer) &= ~(HWT_WGM_MASK_LOW << HWT_WGM_SHIFT_LOW);
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*HWT_TCCRA (timer) |= ((wgm & HWT_WGM_MASK_LOW) << HWT_WGM_SHIFT_LOW);
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*HWT_TCCRB (timer) &= ~(HWT_WGM_MASK_HIGH << HWT_WGM_SHIFT_HIGH);
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*HWT_TCCRB (timer) |= ((wgm & HWT_WGM_MASK_HIGH) << HWT_WGM_SHIFT_HIGH);
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for (i=0; i<3; i++) {
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HWT_SET_COM (timer, i, HWT_COM_NORMAL);
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}
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if ( wgm == HWT_WGM_PWM_PHASE_FRQ_ICR
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|| wgm == HWT_WGM_PWM_PHASE_ICR
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|| wgm == HWT_WGM_CTC_ICR
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|| wgm == HWT_WGM_PWM_FAST_ICR
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)
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{
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*HWT_ICR (timer) = maxt;
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}
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if ( wgm == HWT_WGM_CTC_OCRA
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|| wgm == HWT_WGM_PWM_PHASE_FRQ_OCRA
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|| wgm == HWT_WGM_PWM_PHASE_OCRA
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|| wgm == HWT_WGM_PWM_FAST_OCRA
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)
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{
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*HWT_OCRA (timer) = maxt;
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}
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/* Set clock, finally */
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*HWT_TCCRB (timer) |= clock;
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return 0;
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}
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/* Needed for implementation */
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#define HWT_PERIOD_MAX_ (0xFFFFFFFF / (F_CPU / 1000000))
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/* for 16-bit timer: */
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#define HWT_TICKS_MAX_ 0xFFFF
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#define HWT_TICKS_MIN_ 0xFF
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/**
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* \brief Convenience function to initialize hardware timer for PWM
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* \param timer: Timer to use
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* \param pwm_type: See HWT_PWM* macros
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* \param period_us: Period of the timer in µs
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* \param ocra: Use OCRnA register if set, ICRn otherwise
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* \return see HWT_ERR definitions for return codes, returns 0 if ok
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*
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* This function can be called instead of hwtimer_ini and sets up the
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* timer for one of the PWM modes. There are fast, phase-correct and
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* phase- and frequency correct modes, refer to the datasheet for
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* semantics.
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*
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* The function tries to initialize the timer to a mode that doesn't use
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* one of the internal registers OCRnA or ICRn for specifying the upper
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* bound of the counter. For fast PWM and phase-correct PWM there are
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* fixed 8-, 9-, and 10-bit modes that can be used if the computed value
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* fits one of these setups.
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*
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* We try to get the *maximum* prescaler that still permits a tick
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* resolution of at least 8 bit. This will not work for very high
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* frequencies.
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*
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* If the specified period is too large to fit into a 16-bit timer we
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* take the maximum period that is still possible, this may be
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* substatially higher than specified.
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*
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* Note that when using OCRnA for the upper bound of the counter, the
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* pin associated with this register can not be used for PWM. Instead it
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* can be used to change the period.
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*/
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static inline int8_t
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hwtimer_pwm_ini (uint8_t timer, uint32_t period_us, uint8_t pwm_type, uint8_t ocra)
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{
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uint32_t ticks = 0;
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uint8_t clock = HWT_CLOCK_PRESCALER_1024;
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uint8_t wgm = HWT_WGM_NORMAL;
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HWT_CHECK_TIMER (timer);
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if (period_us > HWT_PERIOD_MAX_) {
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period_us = HWT_PERIOD_MAX_;
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}
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ticks = (F_CPU / 1000000) * period_us;
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/* Non-fast PWM modes have half the frequency */
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if (pwm_type != HWT_PWM_FAST) {
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ticks >>= 1;
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}
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/*
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* Divisors are 1, 8, 64, 256, 1024, shifts between these are
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* 3, 3, 2, 2, respectively. We modify `ticks` in place, the AVR can
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* shift only one bit in one instruction, so shifting isn't cheap.
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* We try to get the *maximum* prescaler that still permits a tick
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* resolution of at least 8 bit.
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*/
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if (ticks <= (HWT_TICKS_MIN_ << 3)) {
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clock = HWT_CLOCK_PRESCALER_1;
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}
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else if ((ticks >>= 3) <= (HWT_TICKS_MIN_ << 3)) {
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clock = HWT_CLOCK_PRESCALER_8;
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}
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else if ((ticks >>= 3) <= (HWT_TICKS_MIN_ << 2)) {
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clock = HWT_CLOCK_PRESCALER_64;
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}
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else if ((ticks >>= 2) <= (HWT_TICKS_MIN_ << 2)) {
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clock = HWT_CLOCK_PRESCALER_256;
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}
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else if ((ticks >>= 2) > HWT_TICKS_MAX_) {
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ticks = HWT_TICKS_MAX_;
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}
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switch (pwm_type) {
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case HWT_PWM_FAST:
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wgm = ocra ? HWT_WGM_PWM_FAST_OCRA : HWT_WGM_PWM_FAST_ICR;
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break;
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case HWT_PWM_PHASE_CORRECT:
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wgm = ocra ? HWT_WGM_PWM_PHASE_OCRA : HWT_WGM_PWM_PHASE_ICR;
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break;
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case HWT_PWM_PHASE_FRQ_CORRECT:
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default:
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wgm = ocra ? HWT_WGM_PWM_PHASE_FRQ_OCRA : HWT_WGM_PWM_PHASE_FRQ_ICR;
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break;
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}
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/* Special 8- 9- 10-bit modes */
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if (pwm_type == HWT_PWM_FAST || pwm_type == HWT_PWM_PHASE_CORRECT) {
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if (ticks == 0xFF) {
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wgm = (pwm_type == HWT_PWM_FAST)
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? HWT_WGM_PWM_FAST_8_BIT
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: HWT_WGM_PWM_PHASE_8_BIT;
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}
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else if (ticks == 0x1FF) {
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wgm = (pwm_type == HWT_PWM_FAST)
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? HWT_WGM_PWM_FAST_9_BIT
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: HWT_WGM_PWM_PHASE_9_BIT;
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}
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else if (ticks == 0x3FF) {
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wgm = (pwm_type == HWT_PWM_FAST)
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? HWT_WGM_PWM_FAST_10_BIT
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: HWT_WGM_PWM_PHASE_10_BIT;
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}
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}
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return hwtimer_ini (timer, wgm, clock, ticks);
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}
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/*
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* Simple init macro for sane default values
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*/
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#define hwtimer_pwm_ini_simple (timer, period_us) \
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hwtimer_pwm_ini ((timer), HWT_PWM_PHASE_CORRECT, (period_us), 0)
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/**
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* \brief Maximum timer value usable in hwtimer_set_pwm
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* \param timer: Timer to use
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* \return max. timer value according to current timer setup
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* negative value if wrong timer given
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* a positive value is guaranteed to fit into 16 bit unsigned.
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*/
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static inline int32_t hwtimer_pwm_max_ticks (uint8_t timer)
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{
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uint8_t wgm = 0;
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HWT_CHECK_TIMER (timer);
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wgm = ((*HWT_TCCRA (timer) >> HWT_WGM_SHIFT_LOW) & HWT_WGM_MASK_LOW)
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| ((*HWT_TCCRB (timer) >> HWT_WGM_SHIFT_HIGH) & HWT_WGM_MASK_HIGH)
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;
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switch (wgm) {
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case HWT_WGM_PWM_PHASE_8_BIT:
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case HWT_WGM_PWM_FAST_8_BIT:
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return 0xFF;
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case HWT_WGM_PWM_PHASE_9_BIT:
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case HWT_WGM_PWM_FAST_9_BIT:
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return 0x1FF;
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case HWT_WGM_PWM_PHASE_10_BIT:
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case HWT_WGM_PWM_FAST_10_BIT:
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return 0x3FF;
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case HWT_WGM_CTC_OCRA:
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case HWT_WGM_PWM_PHASE_FRQ_OCRA:
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case HWT_WGM_PWM_PHASE_OCRA:
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case HWT_WGM_PWM_FAST_OCRA:
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return *HWT_OCRA (timer);
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case HWT_WGM_PWM_PHASE_FRQ_ICR:
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case HWT_WGM_PWM_PHASE_ICR:
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case HWT_WGM_CTC_ICR:
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case HWT_WGM_PWM_FAST_ICR:
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return *HWT_ICR (timer);
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case HWT_WGM_NORMAL:
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return 0xFFFF;
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}
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return HWT_ERR_INVALID_WGM;
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}
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/*
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* The following functions are defined inline to allow for compiler
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* optimizations if some of the parameters are constant.
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*/
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/**
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* \brief Set PWM duty cycle
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* \param timer: Timer to use
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* \param channel: Channel to use, see HWT_CHANNEL definitions
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* \param pwm: Duty cycle
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* \return see HWT_ERR definitions for return codes, returns 0 if ok
|
|
*
|
|
* Note that the available range for the duty cycle depends on the timer
|
|
* setup and the chosen mode.
|
|
*/
|
|
static inline int8_t
|
|
hwtimer_set_pwm (uint8_t timer, uint8_t channel, uint16_t pwm)
|
|
{
|
|
uint8_t sreg = 0;
|
|
HWT_CHECK_TIMER (timer);
|
|
HWT_CHECK_CHANNEL (channel);
|
|
sreg = SREG;
|
|
cli ();
|
|
*HWT_OCR (timer, channel) = pwm;
|
|
SREG = sreg;
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* \brief Set compare output mode
|
|
* \param timer: Timer to use
|
|
* \param channel: Channel to use, see HWT_CHANNEL definitions
|
|
* \param com: compare output mode for given channel
|
|
* \return see HWT_ERR definitions for return codes, returns 0 if ok
|
|
*/
|
|
static inline int8_t
|
|
hwtimer_set_com (uint8_t timer, uint8_t channel, uint8_t com)
|
|
{
|
|
HWT_CHECK_TIMER (timer);
|
|
HWT_CHECK_CHANNEL (channel);
|
|
if (com > HWT_COM_MASK) {
|
|
return HWT_ERR_INVALID_COM;
|
|
}
|
|
HWT_SET_COM (timer, channel, com);
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* \brief Convenience function for setting compare output mode for PWM
|
|
* \param timer: Timer to use
|
|
* \param channel: Channel to use, see HWT_CHANNEL definitions
|
|
* \return see HWT_ERR definitions for return codes, returns 0 if ok
|
|
*/
|
|
static inline int8_t
|
|
hwtimer_pwm_enable (uint8_t timer, uint8_t channel)
|
|
{
|
|
return hwtimer_set_com (timer, channel, HWT_COM_CLEAR);
|
|
}
|
|
|
|
/**
|
|
* \brief Convenience function for inverse compare output mode for PWM
|
|
* \param timer: Timer to use
|
|
* \param channel: Channel to use, see HWT_CHANNEL definitions
|
|
* \return see HWT_ERR definitions for return codes, returns 0 if ok
|
|
*/
|
|
static inline int8_t
|
|
hwtimer_pwm_inverse (uint8_t timer, uint8_t channel)
|
|
{
|
|
return hwtimer_set_com (timer, channel, HWT_COM_SET);
|
|
}
|
|
|
|
/**
|
|
* \brief Convenience function for setting compare output mode to off
|
|
* \param timer: Timer to use
|
|
* \param channel: Channel to use, see HWT_CHANNEL definitions
|
|
* \return see HWT_ERR definitions for return codes, returns 0 if ok
|
|
*/
|
|
static inline int8_t
|
|
hwtimer_pwm_disable (uint8_t timer, uint8_t channel)
|
|
{
|
|
return hwtimer_set_com (timer, channel, HWT_COM_NORMAL);
|
|
}
|
|
|
|
/**
|
|
* \brief Turn off the clock
|
|
* \param timer: Timer to use
|
|
* \return see HWT_ERR definitions for return codes, returns 0 if ok
|
|
*/
|
|
static inline int8_t
|
|
hwtimer_fin (uint8_t timer)
|
|
{
|
|
HWT_CHECK_TIMER (timer);
|
|
*HWT_TCCRB (timer) &= ~HWT_CLOCK_MASK;
|
|
*HWT_TCCRB (timer) |= HWT_CLOCK_OFF; /* technically not necessary this is 0 */
|
|
return 0;
|
|
}
|
|
|
|
#endif /* hw_timer_h */
|
|
|
|
/*
|
|
* ex:ts=8:et:sw=2
|
|
*/
|
|
|
|
/** @} */
|