228 lines
8.8 KiB
C
228 lines
8.8 KiB
C
/*
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* Copyright (c) 2010, Swedish Institute of Computer Science.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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*/
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/**
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* \file
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* I2C communication device drivers for Zolertia Z1 sensor node.
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* \author
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* Enric M. Calvo, Zolertia <ecalvo@zolertia.com>
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* Marcus Lundén, SICS <mlunden@sics.se>
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*/
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#include "i2cmaster.h"
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#include "isr_compat.h"
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signed char tx_byte_ctr, rx_byte_ctr;
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unsigned char rx_buf[2];
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unsigned char *tx_buf_ptr;
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unsigned char *rx_buf_ptr;
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unsigned char receive_data;
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unsigned char transmit_data1;
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unsigned char transmit_data2;
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unsigned char prescale_lsb = I2C_PRESC_Z1_LSB;
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unsigned char prescale_msb = I2C_PRESC_Z1_MSB;
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volatile unsigned int i; /* volatile to prevent optimization */
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/* ------------------------------------------------------------------------------
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* Change the data rate prior initializing transmission or reception
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* ----------------------------------------------------------------------------- */
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void
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i2c_setrate(uint8_t p_lsb, uint8_t p_msb)
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{
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prescale_lsb = p_lsb;
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prescale_lsb = p_msb;
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}
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/* ------------------------------------------------------------------------------
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* This function initializes the USCI module for master-receive operation.
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* ----------------------------------------------------------------------------- */
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void
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i2c_receiveinit(uint8_t slave_address)
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{
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UCB1CTL1 = UCSWRST; /* Enable SW reset */
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UCB1CTL0 = UCMST + UCMODE_3 + UCSYNC; /* I2C Master, synchronous mode */
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UCB1CTL1 = UCSSEL_2 | UCSWRST; /* Use SMCLK, keep SW reset */
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UCB1BR0 = prescale_lsb; /* prescaler (default 400 kHz) */
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UCB1BR1 = prescale_msb;
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UCB1I2CSA = slave_address; /* set slave address */
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UCB1CTL1 &= ~UCTR; /* I2C Receiver */
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UCB1CTL1 &= ~UCSWRST; /* Clear SW reset, resume operation */
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UCB1I2CIE = UCNACKIE;
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#if I2C_RX_WITH_INTERRUPT
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UC1IE = UCB1RXIE; /* Enable RX interrupt if desired */
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#endif
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}
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/* ------------------------------------------------------------------------------
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* Initializes USCI for master-transmit operation.
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* ------------------------------------------------------------------------------ */
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void
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i2c_transmitinit(uint8_t slave_address)
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{
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UCB1CTL1 |= UCSWRST; /* Enable SW reset */
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UCB1CTL0 |= (UCMST | UCMODE_3 | UCSYNC); /* I2C Master, synchronous mode */
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UCB1CTL1 = UCSSEL_2 + UCSWRST; /* Use SMCLK, keep SW reset */
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UCB1BR0 = prescale_lsb; /* prescaler (default 400 kHz) */
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UCB1BR1 = prescale_msb;
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UCB1I2CSA = slave_address; /* Set slave address */
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UCB1CTL1 &= ~UCSWRST; /* Clear SW reset, resume operation */
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UCB1I2CIE = UCNACKIE;
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UC1IE = UCB1TXIE; /* Enable TX ready interrupt */
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}
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/* ------------------------------------------------------------------------------
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* This function is used to start an I2C communication in master-receiver mode WITHOUT INTERRUPTS
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* for more than 1 byte
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* ------------------------------------------------------------------------------ */
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static volatile uint8_t rx_byte_tot = 0;
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uint8_t
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i2c_receive_n(uint8_t byte_ctr, uint8_t *rx_buf)
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{
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rx_byte_tot = byte_ctr;
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rx_byte_ctr = byte_ctr;
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rx_buf_ptr = rx_buf;
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while((UCB1CTL1 & UCTXSTT) || (UCB1STAT & UCNACKIFG)) /* Slave acks address or not? */
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PRINTFDEBUG("____ UCTXSTT not clear OR NACK received\n");
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#if I2C_RX_WITH_INTERRUPT
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PRINTFDEBUG(" RX Interrupts: YES \n");
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/* SPECIAL-CASE: Stop condition must be sent while receiving the 1st byte for 1-byte only read operations */
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if(rx_byte_tot == 1) { /* See page 537 of slau144e.pdf */
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dint();
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UCB1CTL1 |= UCTXSTT; /* I2C start condition */
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while(UCB1CTL1 & UCTXSTT) /* Waiting for Start bit to clear */
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PRINTFDEBUG("____ STT clear wait\n");
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UCB1CTL1 |= UCTXSTP; /* I2C stop condition */
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eint();
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} else { /* all other cases */
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UCB1CTL1 |= UCTXSTT; /* I2C start condition */
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}
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return 0;
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#else
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uint8_t n_received = 0;
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PRINTFDEBUG(" RX Interrupts: NO \n");
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UCB1CTL1 |= UCTXSTT; /* I2C start condition */
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while(rx_byte_ctr > 0) {
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if(UC1IFG & UCB1RXIFG) { /* Waiting for Data */
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rx_buf[rx_byte_tot - rx_byte_ctr] = UCB1RXBUF;
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rx_byte_ctr--;
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UC1IFG &= ~UCB1RXIFG; /* Clear USCI_B1 RX int flag */
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n_received++;
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}
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}
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UCB1CTL1 |= UCTXSTP; /* I2C stop condition */
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return n_received;
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#endif
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}
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/* ------------------------------------------------------------------------------
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* This function is used to check if there is communication in progress.
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* ------------------------------------------------------------------------------ */
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uint8_t
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i2c_busy(void)
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{
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return UCB1STAT & UCBBUSY;
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}
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/*----------------------------------------------------------------------------
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* Setup ports and pins for I2C use.
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* ------------------------------------------------------------------------------ */
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void
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i2c_enable(void)
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{
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I2C_PxSEL |= (I2C_SDA | I2C_SCL); /* Secondary function (USCI) selected */
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I2C_PxSEL2 |= (I2C_SDA | I2C_SCL); /* Secondary function (USCI) selected */
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I2C_PxDIR |= I2C_SCL; /* SCL is output (not needed?) */
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I2C_PxDIR &= ~I2C_SDA; /* SDA is input (not needed?) */
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I2C_PxREN |= (I2C_SDA | I2C_SCL); /* Activate internal pull-up/-down resistors */
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I2C_PxOUT |= (I2C_SDA | I2C_SCL); /* Select pull-up resistors */
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}
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void
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i2c_disable(void)
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{
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I2C_PxSEL &= ~(I2C_SDA | I2C_SCL); /* GPIO function selected */
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I2C_PxSEL2 &= ~(I2C_SDA | I2C_SCL); /* GPIO function selected */
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I2C_PxREN &= ~(I2C_SDA | I2C_SCL); /* Deactivate internal pull-up/-down resistors */
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I2C_PxOUT &= ~(I2C_SDA | I2C_SCL); /* Select pull-up resistors */
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}
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/* ------------------------------------------------------------------------------
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* This function is used to start an I2C communication in master-transmit mode.
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* ------------------------------------------------------------------------------ */
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static volatile uint8_t tx_byte_tot = 0;
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void
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i2c_transmit_n(uint8_t byte_ctr, uint8_t *tx_buf)
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{
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tx_byte_tot = byte_ctr;
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tx_byte_ctr = byte_ctr;
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tx_buf_ptr = tx_buf;
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UCB1CTL1 |= UCTR + UCTXSTT; /* I2C TX, start condition */
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}
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/*----------------------------------------------------------------------------*/
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ISR(USCIAB1TX, i2c_tx_interrupt)
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{
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/* TX Part */
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if(UC1IFG & UCB1TXIFG) { /* TX int. condition */
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if(tx_byte_ctr == 0) {
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UCB1CTL1 |= UCTXSTP; /* I2C stop condition */
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UC1IFG &= ~UCB1TXIFG; /* Clear USCI_B1 TX int flag */
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} else {
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UCB1TXBUF = tx_buf_ptr[tx_byte_tot - tx_byte_ctr];
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tx_byte_ctr--;
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}
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}
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/* RX Part */
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#if I2C_RX_WITH_INTERRUPT
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else if(UC1IFG & UCB1RXIFG) { /* RX int. condition */
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rx_buf_ptr[rx_byte_tot - rx_byte_ctr] = UCB1RXBUF;
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rx_byte_ctr--;
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if(rx_byte_ctr == 1) { /* stop condition should be set before receiving last byte */
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/* Only for 1-byte transmissions, STOP is handled in receive_n_int */
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if(rx_byte_tot != 1) {
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UCB1CTL1 |= UCTXSTP; /* I2C stop condition */
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}
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UC1IFG &= ~UCB1RXIFG; /* Clear USCI_B1 RX int flag. XXX Just in case, check if necessary */
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}
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}
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#endif
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}
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ISR(USCIAB1RX, i2c_rx_interrupt)
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{
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if(UCB1STAT & UCNACKIFG) {
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PRINTFDEBUG("!!! NACK received in RX\n");
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UCB1CTL1 |= UCTXSTP;
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UCB1STAT &= ~UCNACKIFG;
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}
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}
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