d2f3795a30
Homogenize port and pin definitions naming: - PERIPHERAL_FUNCTION_PORT for the port ID, - PERIPHERAL_FUNCTION_PIN for the pin ID, - PERIPHERAL_FUNCTION_PORT_BASE for the port base, - PERIPHERAL_FUNCTION_PIN_MASK for the pin mask. Define only PERIPHERAL_FUNCTION_PORT and PERIPHERAL_FUNCTION_PIN in board.h, and deduce PERIPHERAL_FUNCTION_PORT_BASE and PERIPHERAL_FUNCTION_PIN_MASK in the driver from the former definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
136 lines
5 KiB
C
136 lines
5 KiB
C
/*
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* Copyright (c) 2013, University of Michigan.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc2538-spi
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* @{
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*
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* \file
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* Implementation of the cc2538 SPI peripheral
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*/
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#include "contiki.h"
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#include "reg.h"
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#include "spi-arch.h"
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#include "dev/ioc.h"
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#include "dev/sys-ctrl.h"
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#include "dev/spi.h"
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#include "dev/ssi.h"
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#include "dev/gpio.h"
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#define SPI_CLK_PORT_BASE GPIO_PORT_TO_BASE(SPI_CLK_PORT)
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#define SPI_CLK_PIN_MASK GPIO_PIN_MASK(SPI_CLK_PIN)
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#define SPI_MOSI_PORT_BASE GPIO_PORT_TO_BASE(SPI_MOSI_PORT)
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#define SPI_MOSI_PIN_MASK GPIO_PIN_MASK(SPI_MOSI_PIN)
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#define SPI_MISO_PORT_BASE GPIO_PORT_TO_BASE(SPI_MISO_PORT)
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#define SPI_MISO_PIN_MASK GPIO_PIN_MASK(SPI_MISO_PIN)
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#define SPI_SEL_PORT_BASE GPIO_PORT_TO_BASE(SPI_SEL_PORT)
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#define SPI_SEL_PIN_MASK GPIO_PIN_MASK(SPI_SEL_PIN)
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/* Default: Motorola mode 3 with 8-bit data words */
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#ifndef SPI_CONF_PHASE
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#define SPI_CONF_PHASE SSI_CR0_SPH
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#endif
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#ifndef SPI_CONF_POLARITY
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#define SPI_CONF_POLARITY SSI_CR0_SPO
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#endif
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#ifndef SPI_CONF_DATA_SIZE
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#define SPI_CONF_DATA_SIZE 8
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#endif
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#if SPI_CONF_DATA_SIZE < 4 || SPI_CONF_DATA_SIZE > 16
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#error SPI_CONF_DATA_SIZE must be set between 4 and 16 inclusive.
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#endif
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/**
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* \brief Initialize the SPI bus.
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*
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* This SPI init() function uses the following #defines to set the pins:
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* SPI_CLK_PORT SPI_CLK_PIN
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* SPI_MOSI_PORT SPI_MOSI_PIN
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* SPI_MISO_PORT SPI_MISO_PIN
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* SPI_SEL_PORT SPI_SEL_PIN
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*
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* This sets the mode to Motorola SPI with the following format options:
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* SPI_CONF_PHASE: 0 or SSI_CR0_SPH
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* SPI_CONF_POLARITY: 0 or SSI_CR0_SPO
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* SPI_CONF_DATA_SIZE: 4 to 16 bits
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*/
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void
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spi_init(void)
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{
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spi_enable();
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/* Start by disabling the peripheral before configuring it */
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REG(SSI0_BASE + SSI_CR1) = 0;
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/* Set the IO clock as the SSI clock */
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REG(SSI0_BASE + SSI_CC) = 1;
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/* Set the mux correctly to connect the SSI pins to the correct GPIO pins */
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ioc_set_sel(SPI_CLK_PORT, SPI_CLK_PIN, IOC_PXX_SEL_SSI0_CLKOUT);
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ioc_set_sel(SPI_MOSI_PORT, SPI_MOSI_PIN, IOC_PXX_SEL_SSI0_TXD);
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REG(IOC_SSIRXD_SSI0) = (SPI_MISO_PORT * 8) + SPI_MISO_PIN;
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ioc_set_sel(SPI_SEL_PORT, SPI_SEL_PIN, IOC_PXX_SEL_SSI0_FSSOUT);
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/* Put all the SSI gpios into peripheral mode */
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GPIO_PERIPHERAL_CONTROL(SPI_CLK_PORT_BASE, SPI_CLK_PIN_MASK);
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GPIO_PERIPHERAL_CONTROL(SPI_MOSI_PORT_BASE, SPI_MOSI_PIN_MASK);
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GPIO_PERIPHERAL_CONTROL(SPI_MISO_PORT_BASE, SPI_MISO_PIN_MASK);
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GPIO_PERIPHERAL_CONTROL(SPI_SEL_PORT_BASE, SPI_SEL_PIN_MASK);
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/* Disable any pull ups or the like */
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ioc_set_over(SPI_CLK_PORT, SPI_CLK_PIN, IOC_OVERRIDE_DIS);
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ioc_set_over(SPI_MOSI_PORT, SPI_MOSI_PIN, IOC_OVERRIDE_DIS);
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ioc_set_over(SPI_MISO_PORT, SPI_MISO_PIN, IOC_OVERRIDE_DIS);
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ioc_set_over(SPI_SEL_PORT, SPI_SEL_PIN, IOC_OVERRIDE_DIS);
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/* Configure the clock */
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REG(SSI0_BASE + SSI_CPSR) = 2;
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/* Put the ssi in Motorola SPI mode using the provided format options */
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REG(SSI0_BASE + SSI_CR0) = SPI_CONF_PHASE | SPI_CONF_POLARITY | (SPI_CONF_DATA_SIZE - 1);
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/* Enable the SSI */
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REG(SSI0_BASE + SSI_CR1) |= SSI_CR1_SSE;
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}
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/*---------------------------------------------------------------------------*/
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void
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spi_enable(void)
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{
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/* Enable the clock for the SSI peripheral */
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REG(SYS_CTRL_RCGCSSI) |= 1;
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}
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/*---------------------------------------------------------------------------*/
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void
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spi_disable(void)
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{
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/* Gate the clock for the SSI peripheral */
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REG(SYS_CTRL_RCGCSSI) &= ~1;
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}
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/** @} */
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