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Therefore I introduced the make variable CONTIKI_PROJECT. Now a typical project Makefile starts with: CONTIKI_PROJECT = hello-world all: $(CONTIKI_PROJECT)
88 lines
4.2 KiB
Text
88 lines
4.2 KiB
Text
The Contiki build system
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The Contiki build system is designed to make it easy to compile
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Contiki applications for different hardware platforms or into a
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simulation platform by simply supplying different parameters to the
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make command, without having to edit makefiles or modify the
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application code.
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The file example project in examples/hello-world/ shows how the
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Contiki build system works. The hello-world.c application can be built
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into a complete Contiki system by running make in the
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examples/hello-world/ directory. Running make without parameters will
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build a Contiki system using the native target. The native target is a
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special Contiki platform that builds an entire Contiki system as a
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program that runs on the development system. After compiling the
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application for the native target it is possible to run the Contiki
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system with the application by running the file hello-world.native. To
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compile the application and a Contiki system for the ESB platform" the
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command make TARGET=esb is used. This produces a hello-world.esb file
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that can be loaded into an ESB board.
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To compile the hello-world application into a stand-alone executable
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that can be loaded into a running Contiki system, the command make
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hello-world.ce is used. To build an executable file for the ESB
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platform, make TARGET=esb hello-world.ce is run.
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To avoid having to type TARGET= every time make is run, it is possible
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to run make TARGET=esb savetarget to save the selected target as the
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default target platform for subsequent invocations of make. A file
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called Makefile.target containing the currently saved target is saved
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in the project's directory. Makefiles used in the Contiki build
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system The Contiki build system is composed of a number of
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Makefiles. These are:
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* Makefile: the project's makefile, located in the project directory.
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* Makefile.include: the system-wide Contiki makefile, located in
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the root of the Contiki source tree.
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* Makefile.$(TARGET) (where $(TARGET) is the name of the platform
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that is currently being built): rules for the specific platform,
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located in the platform's subdirectory in the platform/
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directory.
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* Makefile.$(CPU) (where $(CPU) is the name of the CPU or
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microcontroller architecture used on the platform for which
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Contiki is built): rules for the CPU architecture, located in
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the CPU architecture's subdirectory in the cpu/ directory.
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* Makefile.$(APP) (where $(APP) is the name of an application in
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the apps/ directory): rules for applications in the apps/
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directories. Each application has its own makefile.
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The Makefile in the project's directory is intentionally simple. It
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specifies where the Contiki source code resides in the system and
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includes the system-wide Makefile, Makefile.include. The project's
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makefile can also define in the APPS variable a list of applications
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from the apps/ directory that should be included in the Contiki
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system. The Makefile used in the hello-world example project looks
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like this:
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CONTIKI_PROJECT = hello-world
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all: $(CONTIKI_PROJECT)
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CONTIKI = ../..
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include $(CONTIKI)/Makefile.include
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First, the location of the Contiki source code tree is given by
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defining the CONTIKI variable. Next, the name of the application is
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defined. Finally, the system-wide Makefile.include is included.
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The Makefile.include contains definitions of the C files of the core
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Contiki system. Makefile.include always reside in the root of the
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Contiki source tree. When make is run, Makefile.include includes the
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Makefile.$(TARGET) as well as all makefiles for the applications in
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the APPS list (which is specified by the project's Makefile).
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Makefile.$(TARGET), which is located in the platform/$(TARGET)/
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directory, contains the list of C files that the platform adds to the
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Contiki system. This list is defined by the CONTIKI_TARGET_SOURCEFILES
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variable. The Makefile.$(TARGET) also includes the Makefile.$(CPU)
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from the cpu/$(CPU)/ directory.
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The Makefile.$(CPU) typically contains definitions for the C compiler
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used for the particular CPU. If multiple C compilers are used, the
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Makefile.$(CPU) can either contain a conditional expression that
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allows different C compilers to be defined, or it can be completely
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overridden by the platform specific makefile Makefile.$(TARGET).
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