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Michael LeMay 25c07613c2 x86: Add driver for message bus 
The Intel Quark X1000 SoC includes a message bus that is accessible
via PCI configuration registers.  It communicates to various SoC
components such as the Isolated Memory Region (IMR) registers and the
Remote Management Unit.  This patch adds a driver for accessing the
message bus.
2016-03-17 08:35:48 -07:00
..
drivers x86: Add driver for message bus 2016-03-17 08:35:48 -07:00
init x86: Use shared ISR for I2C and GPIO 2016-02-16 21:19:44 -08:00
uefi x86: Add support for 32-bit build hosts in build_uefi.sh 2015-12-21 08:06:14 -02:00
bootstrap_quarkX1000.S x86: Move bootstrap code and linker script to cpu/x86 2015-12-21 08:06:14 -02:00
helpers.h x86: Add PCI support 2015-12-21 08:06:14 -02:00
helpers.S x86: Add PCI support 2015-12-21 08:06:14 -02:00
Makefile.x86_common x86, galileo: Add UEFI support 2015-12-21 08:06:14 -02:00
Makefile.x86_quarkX1000 x86: Add driver for message bus 2016-03-17 08:35:48 -07:00
quarkX1000.ld x86: Use shared ISR for I2C and GPIO 2016-02-16 21:19:44 -08:00