e4bc1a1e8c
The x86/init/common/ folder holds all cpu initialization code - idt and gdt setup, interrupts and cpu initialization. On this folder will also sit any SoC specific implementation of the functions called from cpu_init().
111 lines
4.9 KiB
C
111 lines
4.9 KiB
C
/*
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* Copyright (C) 2015, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef INTERRUPT_H
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#define INTERRUPT_H
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#include <stdint.h>
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#include "idt.h"
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struct interrupt_context {
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uint32_t edi;
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uint32_t esi;
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uint32_t ebp;
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uint32_t esp;
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uint32_t ebx;
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uint32_t edx;
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uint32_t ecx;
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uint32_t eax;
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uint32_t error_code;
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uint32_t eip;
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};
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/* Helper macro to register interrupt handler function.
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*
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* num: Interrupt number (0-255)
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* has_error_code: 0 if interrupt doesn't push error code onto the
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* stack. Otherwise, set this argument to 1.
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* handler: Pointer to function that should be called once the
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* interrupt is raised. In case has_error_code == 0
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* the function prototype should be the following:
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* void handler(void)
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* Otherwise, it should be:
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* void handler(struct interrupt_context context)
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*
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* Since there is no easy way to write an Interrupt Service Routines
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* (ISR) in C (for further information on this, see [1]), we provide
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* this helper macro. It basically provides an assembly trampoline
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* to a C function (handler parameter) which, indeed, handles the
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* interrupt.
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*
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* [1] http://wiki.osdev.org/Interrupt_Service_Routines
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*
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* XXX: If you are debugging at assembly level, make sure you don't be misled
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* by the "trampolineXX" symbol name. The suffix number is NOT related to the
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* interrupt number at all. The suffix number is a unique random number to
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* guarantee there is no symbol name clashing.
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*/
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#define SET_INTERRUPT_HANDLER(num, has_error_code, handler) \
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do { \
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__asm__ __volatile__ ( \
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"push $trampoline%=\n\t" \
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"push %0\n\t" \
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"call %P1\n\t" \
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"add $8, %%esp\n\t" \
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"jmp skip_trampoline%=\n\t" \
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".align 4\n\t" \
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"trampoline%=:\n\t" \
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" pushal\n\t" \
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" call %P2\n\t" \
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" popal\n\t" \
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" .if " #has_error_code "\n\t" \
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" add $4, %%esp\n\t" \
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" .endif\n\t" \
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" iret\n\t" \
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"skip_trampoline%=:\n\t" \
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:: "g" (num), "i" (idt_set_intr_gate_desc), "i" (handler) \
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); \
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} while (0)
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/* Disable maskable hardware interrupts */
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#define DISABLE_IRQ() \
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do { \
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__asm__ ("cli"); \
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} while (0)
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/* Enable maskable hardware interrupts */
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#define ENABLE_IRQ() \
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do { \
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__asm__ ("sti"); \
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} while (0)
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#endif /* INTERRUPT_H */
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