cac4e9a222
Remove the troublesome avr/dev/delay.* files. Add PLATFORM_NAME and combine the confusing *_REVISION defines into a single PLATFORM_TYPE
513 lines
16 KiB
C
513 lines
16 KiB
C
/*
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* Copyright (c) 2012, Swedish Institute of Computer Science.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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*/
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/**
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* \brief This module contains AVR-specific code to implement
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* the Contiki core clock functions.
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*
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* \author David Kopf <dak664@embarqmail.com> and others.
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*
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*/
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/** \addtogroup avr
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* @{
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*/
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/**
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* \defgroup avrclock AVR clock implementation
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* @{
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*/
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/**
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* \file
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* This file contains AVR-specific code to implement the Contiki core clock functions.
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*
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*/
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/**
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* These routines define the AVR-specific calls declared in /core/sys/clock.h
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* CLOCK_SECOND is the number of ticks per second.
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* It is defined through CONF_CLOCK_SECOND in the contiki-conf.h for each platform.
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* The usual AVR defaults are 128 or 125 ticks per second, counting a prescaled CPU clock
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* using the 8 bit timer0.
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*
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* clock_time_t is usually declared by the platform as an unsigned 16 bit data type,
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* thus intervals up to 512 or 524 seconds can be measured with ~8 millisecond precision.
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* For longer intervals the 32 bit clock_seconds() is available.
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*
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* Since a carry to a higer byte can occur during an interrupt, declaring them non-static
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* for direct examination can cause occasional time reversals!
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*
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* clock-avr.h contains the specific setup code for each mcu.
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*/
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#include "sys/clock.h"
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#include "dev/clock-avr.h"
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#include "sys/etimer.h"
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#include <avr/io.h>
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#include <avr/interrupt.h>
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/* Two tick counters avoid a software divide when CLOCK_SECOND is not a power of two. */
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#if CLOCK_SECOND && (CLOCK_SECOND - 1)
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#define TWO_COUNTERS 1
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#endif
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/* count is usually a 16 bit variable, although the platform can declare it otherwise */
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static volatile clock_time_t count;
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#if TWO_COUNTERS
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/* scount is the 8 bit counter that counts ticks modulo CLOCK_SECONDS */
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static volatile uint8_t scount;
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#endif
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/* seconds is available globally but non-atomic update during interrupt can cause time reversals */
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volatile unsigned long seconds;
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/* sleepseconds is the number of seconds sleeping since startup, available globally */
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long sleepseconds;
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/* Set RADIOSTATS to monitor radio on time (must also be set in the radio driver) */
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#if RF230BB && AVR_WEBSERVER
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#define RADIOSTATS 1
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#endif
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#if RADIOSTATS
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static volatile uint8_t rcount;
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volatile unsigned long radioontime;
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extern uint8_t RF230_receive_on;
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#endif
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/* Set RADIO_CONF_CALIBRATE_INTERVAL for periodic calibration of the PLL during extended radio on time.
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* The RF230 data sheet suggests every 5 minutes if the temperature is fluctuating.
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* At present the specified interval is ignored, and an 8 bit counter gives 256 second intervals.
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* Actual calibration is done by the driver on the next transmit request.
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*/
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#if RADIO_CONF_CALIBRATE_INTERVAL
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extern volatile uint8_t rf230_calibrate;
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static uint8_t calibrate_interval;
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#endif
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/*---------------------------------------------------------------------------*/
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/**
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* Start the clock by enabling the timer comparison interrupts.
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*/
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void
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clock_init(void)
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{
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cli ();
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OCRSetup();
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sei ();
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Return the tick counter. When 16 bit it typically wraps every 10 minutes.
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* The comparison avoids the need to disable clock interrupts for an atomic
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* read of the multi-byte variable.
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*/
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clock_time_t
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clock_time(void)
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{
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clock_time_t tmp;
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do {
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tmp = count;
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} while(tmp != count);
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return tmp;
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Return seconds, default is time since startup.
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* The comparison avoids the need to disable clock interrupts for an atomic
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* read of the four-byte variable.
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*/
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unsigned long
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clock_seconds(void)
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{
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unsigned long tmp;
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do {
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tmp = seconds;
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} while(tmp != seconds);
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return tmp;
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Set seconds, e.g. to a standard epoch for an absolute date/time.
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*/
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void
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clock_set_seconds(unsigned long sec)
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{
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seconds = sec;
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Wait for a number of clock ticks.
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*/
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void
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clock_wait(clock_time_t t)
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{
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clock_time_t endticks = clock_time() + t;
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if (sizeof(clock_time_t) == 1) {
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while ((signed char )(clock_time() - endticks) < 0) {;}
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} else if (sizeof(clock_time_t) == 2) {
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while ((signed short)(clock_time() - endticks) < 0) {;}
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} else {
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while ((signed long )(clock_time() - endticks) < 0) {;}
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}
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Delay the CPU for up to 65535*(4000000/F_CPU) microseconds.
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* Copied from _delay_loop_2 in AVR library delay_basic.h, 4 clocks per loop.
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* For accurate short delays, inline _delay_loop_2 in the caller, use a constant
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* value for the delay, and disable interrupts if necessary.
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*/
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static inline void my_delay_loop_2(uint16_t __count) __attribute__((always_inline));
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void
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my_delay_loop_2(uint16_t __count)
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{
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__asm__ volatile (
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"1: sbiw %0,1" "\n\t"
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"brne 1b"
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: "=w" (__count)
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: "0" (__count)
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);
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}
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void
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clock_delay_usec(uint16_t howlong)
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{
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#if 0
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/* Accurate delay at any frequency, but introduces a 64 bit intermediate
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* and has a 279 clock overhead.
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*/
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if(howlong<=(uint16_t)(279000000UL/F_CPU)) return;
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howlong-=(uint16_t) (279000000UL/F_CPU);
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my_delay_loop_2(((uint64_t)(howlong) * (uint64_t) F_CPU) / 4000000ULL);
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/* Remaining numbers tweaked for the breakpoint CPU frequencies */
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/* Add other frequencies as necessary */
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#elif F_CPU>=16000000UL
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if(howlong<1) return;
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my_delay_loop_2((howlong*(uint16_t)(F_CPU/3250000)));
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#elif F_CPU >= 12000000UL
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if(howlong<2) return;
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howlong-=(uint16_t) (3*12000000/F_CPU);
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my_delay_loop_2((howlong*(uint16_t)(F_CPU/3250000)));
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#elif F_CPU >= 8000000UL
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if(howlong<4) return;
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howlong-=(uint16_t) (3*8000000/F_CPU);
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my_delay_loop_2((howlong*(uint16_t)(F_CPU/2000000))/2);
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#elif F_CPU >= 4000000UL
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if(howlong<5) return;
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howlong-=(uint16_t) (4*4000000/F_CPU);
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my_delay_loop_2((howlong*(uint16_t)(F_CPU/2000000))/2);
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#elif F_CPU >= 2000000UL
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if(howlong<11) return;
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howlong-=(uint16_t) (10*2000000/F_CPU);
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my_delay_loop_2((howlong*(uint16_t)(F_CPU/1000000))/4);
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#elif F_CPU >= 1000000UL
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if(howlong<=17) return;
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howlong-=(uint16_t) (17*1000000/F_CPU);
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my_delay_loop_2((howlong*(uint16_t)(F_CPU/1000000))/4);
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#else
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howlong >> 5;
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if (howlong < 1) return;
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my_delay_loop_2(howlong);
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#endif
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}
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#if 0
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/*---------------------------------------------------------------------------*/
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/**
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* Legacy delay. The original clock_delay for the msp430 used a granularity
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* of 2.83 usec. This approximates that delay for values up to 1456 usec.
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* (The largest core call in leds.c uses 400).
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*/
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void
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clock_delay(unsigned int howlong)
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{
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if(howlong<2) return;
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clock_delay_usec((45*howlong)>>4);
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}
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#endif
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/*---------------------------------------------------------------------------*/
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/**
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* Delay up to 65535 milliseconds.
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* \param dt How many milliseconds to delay.
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*
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* Neither interrupts nor the watchdog timer is disabled over the delay.
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* Platforms are not required to implement this call.
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* \note This will break for CPUs clocked above 260 MHz.
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*/
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void
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clock_delay_msec(uint16_t howlong)
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{
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#if F_CPU>=16000000
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while(howlong--) clock_delay_usec(1000);
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#elif F_CPU>=8000000
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uint16_t i=996;
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while(howlong--) {clock_delay_usec(i);i=999;}
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#elif F_CPU>=4000000
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uint16_t i=992;
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while(howlong--) {clock_delay_usec(i);i=999;}
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#elif F_CPU>=2000000
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uint16_t i=989;
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while(howlong--) {clock_delay_usec(i);i=999;}
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#else
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uint16_t i=983;
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while(howlong--) {clock_delay_usec(i);i=999;}
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#endif
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Adjust the system current clock time.
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* \param dt How many ticks to add
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*
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* Typically used to add ticks after an MCU sleep
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* clock_seconds will increment if necessary to reflect the tick addition.
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* Leap ticks or seconds can (rarely) be introduced if the ISR is not blocked.
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*/
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void
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clock_adjust_ticks(clock_time_t howmany)
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{
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uint8_t sreg = SREG;cli();
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count += howmany;
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#if TWO_COUNTERS
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howmany+= scount;
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#endif
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while(howmany >= CLOCK_SECOND) {
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howmany -= CLOCK_SECOND;
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seconds++;
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sleepseconds++;
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#if RADIOSTATS
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if (RF230_receive_on) radioontime += 1;
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#endif
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}
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#if TWO_COUNTERS
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scount = howmany;
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#endif
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SREG=sreg;
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}
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/*---------------------------------------------------------------------------*/
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/* This it the timer comparison match interrupt.
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* It maintains the tick counter, clock_seconds, and etimer updates.
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*
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* If the interrupts derive from an external crystal, the CPU instruction
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* clock can optionally be phase locked to it. This allows accurate rtimer
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* interrupts for strobe detection during radio duty cycling.
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* Phase lock is accomplished by adjusting OSCCAL based on the phase error
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* since the last interrupt.
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*/
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/*---------------------------------------------------------------------------*/
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#if defined(DOXYGEN)
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/** \brief ISR for the TIMER0 or TIMER2 interrupt as defined in
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* clock-avr.h for the particular MCU.
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*/
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void AVR_OUTPUT_COMPARE_INT(void);
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#else
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ISR(AVR_OUTPUT_COMPARE_INT)
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{
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count++;
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#if TWO_COUNTERS
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if(++scount >= CLOCK_SECOND) {
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scount = 0;
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#else
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if(count%CLOCK_SECOND==0) {
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#endif
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seconds++;
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#if RADIO_CONF_CALIBRATE_INTERVAL
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/* Force a radio PLL frequency calibration every 256 seconds */
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if (++calibrate_interval==0) {
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rf230_calibrate=1;
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}
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#endif
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}
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#if RADIOSTATS
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/* Sample radio on time. Less accurate than ENERGEST but a smaller footprint */
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if (RF230_receive_on) {
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if (++rcount >= CLOCK_SECOND) {
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rcount=0;
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radioontime++;
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}
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}
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#endif
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#if F_CPU == 0x800000 && USE_32K_CRYSTAL
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/* Special routine to phase lock CPU to 32768 watch crystal.
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* We are interrupting 128 times per second.
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* If RTIMER_ARCH_SECOND is a multiple of 128 we can use the residual modulo
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* 128 to determine whether the clock is too fast or too slow.
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* E.g. for 8192 the phase should be constant modulo 0x40
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* OSCCAL is started in the lower range at 90, allowed to stabilize, then
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* rapidly raised or lowered based on the phase comparison.
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* It gives less phase noise to do this every tick and doesn't seem to hurt anything.
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*/
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#include "rtimer-arch.h"
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{
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volatile static uint8_t lockcount;
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volatile static int16_t last_phase;
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volatile static uint8_t osccalhigh,osccallow;
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if (seconds < 60) { //give a minute to stabilize
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if(++lockcount >= 8192UL*128/RTIMER_ARCH_SECOND) {
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lockcount=0;
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rtimer_phase = TCNT3 & 0x0fff;
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if (seconds < 2) OSCCAL=100;
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if (last_phase > rtimer_phase) osccalhigh=++OSCCAL; else osccallow=--OSCCAL;
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last_phase = rtimer_phase;
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}
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} else {
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uint8_t error = (TCNT3 - last_phase) & 0x3f;
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if (error == 0) {
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} else if (error<32) {
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OSCCAL=osccallow-1;
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} else {
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OSCCAL=osccalhigh+1;
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}
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}
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}
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#endif
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#if 1
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/* gcc will save all registers on the stack if an external routine is called */
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if(etimer_pending()) {
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etimer_request_poll();
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}
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#else
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/* doing this locally saves 9 pushes and 9 pops, but these etimer.c and process.c variables have to lose the static qualifier */
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extern struct etimer *timerlist;
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extern volatile unsigned char poll_requested;
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#define PROCESS_STATE_NONE 0
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#define PROCESS_STATE_RUNNING 1
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#define PROCESS_STATE_CALLED 2
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if (timerlist) {
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if(etimer_process.state == PROCESS_STATE_RUNNING || etimer_process.state == PROCESS_STATE_CALLED) {
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etimer_process.needspoll = 1;
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poll_requested = 1;
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}
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}
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#endif
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}
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#endif /* defined(DOXYGEN) */
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/*---------------------------------------------------------------------------*/
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/* Debugging aids */
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#ifdef HANDLE_UNSUPPORTED_INTERRUPTS
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/* Ignore unsupported interrupts, optionally hang for debugging */
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/* BADISR is a gcc weak symbol that matches any undefined interrupt */
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ISR(BADISR_vect) {
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//static volatile uint8_t x;while (1) x++;
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}
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#endif
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#ifdef HANG_ON_UNKNOWN_INTERRUPT
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/* Hang on any unsupported interrupt */
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/* Useful for diagnosing unknown interrupts that reset the mcu.
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* Currently set up for 12mega128rfa1.
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* For other mcus, enable all and then disable the conflicts.
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*/
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static volatile uint8_t x;
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ISR( _VECTOR(0)) {while (1) x++;}
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ISR( _VECTOR(1)) {while (1) x++;}
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ISR( _VECTOR(2)) {while (1) x++;}
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ISR( _VECTOR(3)) {while (1) x++;}
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ISR( _VECTOR(4)) {while (1) x++;}
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ISR( _VECTOR(5)) {while (1) x++;}
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ISR( _VECTOR(6)) {while (1) x++;}
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ISR( _VECTOR(7)) {while (1) x++;}
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ISR( _VECTOR(8)) {while (1) x++;}
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ISR( _VECTOR(9)) {while (1) x++;}
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ISR( _VECTOR(10)) {while (1) x++;}
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ISR( _VECTOR(11)) {while (1) x++;}
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ISR( _VECTOR(12)) {while (1) x++;}
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ISR( _VECTOR(13)) {while (1) x++;}
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ISR( _VECTOR(14)) {while (1) x++;}
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ISR( _VECTOR(15)) {while (1) x++;}
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ISR( _VECTOR(16)) {while (1) x++;}
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ISR( _VECTOR(17)) {while (1) x++;}
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ISR( _VECTOR(18)) {while (1) x++;}
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ISR( _VECTOR(19)) {while (1) x++;}
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//ISR( _VECTOR(20)) {while (1) x++;}
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//ISR( _VECTOR(21)) {while (1) x++;}
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ISR( _VECTOR(22)) {while (1) x++;}
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ISR( _VECTOR(23)) {while (1) x++;}
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ISR( _VECTOR(24)) {while (1) x++;}
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//ISR( _VECTOR(25)) {while (1) x++;}
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ISR( _VECTOR(26)) {while (1) x++;}
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//ISR( _VECTOR(27)) {while (1) x++;}
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ISR( _VECTOR(28)) {while (1) x++;}
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ISR( _VECTOR(29)) {while (1) x++;}
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ISR( _VECTOR(30)) {while (1) x++;}
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ISR( _VECTOR(31)) {while (1) x++;}
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//ISR( _VECTOR(32)) {while (1) x++;}
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ISR( _VECTOR(33)) {while (1) x++;}
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ISR( _VECTOR(34)) {while (1) x++;}
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ISR( _VECTOR(35)) {while (1) x++;}
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//ISR( _VECTOR(36)) {while (1) x++;}
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ISR( _VECTOR(37)) {while (1) x++;}
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//ISR( _VECTOR(38)) {while (1) x++;}
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ISR( _VECTOR(39)) {while (1) x++;}
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ISR( _VECTOR(40)) {while (1) x++;}
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ISR( _VECTOR(41)) {while (1) x++;}
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ISR( _VECTOR(42)) {while (1) x++;}
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ISR( _VECTOR(43)) {while (1) x++;}
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ISR( _VECTOR(44)) {while (1) x++;}
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ISR( _VECTOR(45)) {while (1) x++;}
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ISR( _VECTOR(46)) {while (1) x++;}
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ISR( _VECTOR(47)) {while (1) x++;}
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ISR( _VECTOR(48)) {while (1) x++;}
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ISR( _VECTOR(49)) {while (1) x++;}
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ISR( _VECTOR(50)) {while (1) x++;}
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ISR( _VECTOR(51)) {while (1) x++;}
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ISR( _VECTOR(52)) {while (1) x++;}
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ISR( _VECTOR(53)) {while (1) x++;}
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ISR( _VECTOR(54)) {while (1) x++;}
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ISR( _VECTOR(55)) {while (1) x++;}
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ISR( _VECTOR(56)) {while (1) x++;}
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//ISR( _VECTOR(57)) {while (1) x++;}
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//ISR( _VECTOR(58)) {while (1) x++;}
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//ISR( _VECTOR(59)) {while (1) x++;}
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//ISR( _VECTOR(60)) {while (1) x++;}
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ISR( _VECTOR(61)) {while (1) x++;}
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ISR( _VECTOR(62)) {while (1) x++;}
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ISR( _VECTOR(63)) {while (1) x++;}
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ISR( _VECTOR(64)) {while (1) x++;}
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ISR( _VECTOR(65)) {while (1) x++;}
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ISR( _VECTOR(66)) {while (1) x++;}
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ISR( _VECTOR(67)) {while (1) x++;}
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ISR( _VECTOR(68)) {while (1) x++;}
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ISR( _VECTOR(69)) {while (1) x++;}
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ISR( _VECTOR(70)) {while (1) x++;}
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ISR( _VECTOR(71)) {while (1) x++;}
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ISR( _VECTOR(72)) {while (1) x++;}
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ISR( _VECTOR(73)) {while (1) x++;}
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ISR( _VECTOR(74)) {while (1) x++;}
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ISR( _VECTOR(75)) {while (1) x++;}
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ISR( _VECTOR(76)) {while (1) x++;}
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ISR( _VECTOR(77)) {while (1) x++;}
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ISR( _VECTOR(78)) {while (1) x++;}
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ISR( _VECTOR(79)) {while (1) x++;}
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#endif
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/** @} */
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/** @} */
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