a96dc90250
Currently the SPI driver in core/ sets `SPI_FLUSH()` to be a single read of the spi RX buffer. This is fine for many microcontrollers, but newer platforms like the CC2538 have a multi-byte FIFO for the RX buffer. In that case, a single read is not guaranteed to flush the RX. This commit allows `SPI_FLUSH()` to be platform dependent if needed, but doesn't change for platforms where it works.
93 lines
3.3 KiB
C
93 lines
3.3 KiB
C
/*
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* Copyright (c) 2010, Swedish Institute of Computer Science.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/**
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* \file
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* Basic SPI macros
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* \author
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* Joakim Eriksson <joakime@sics.se>
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* Niclas Finne <nfi@sics.se>
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*/
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#ifndef SPI_H_
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#define SPI_H_
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/* Define macros to use for checking SPI transmission status depending
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on if it is possible to wait for TX buffer ready. This is possible
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on for example MSP430 but not on AVR. */
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#ifdef SPI_WAITFORTxREADY
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#define SPI_WAITFORTx_BEFORE() SPI_WAITFORTxREADY()
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#define SPI_WAITFORTx_AFTER()
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#define SPI_WAITFORTx_ENDED() SPI_WAITFOREOTx()
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#else /* SPI_WAITFORTxREADY */
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#define SPI_WAITFORTx_BEFORE()
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#define SPI_WAITFORTx_AFTER() SPI_WAITFOREOTx()
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#define SPI_WAITFORTx_ENDED()
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#endif /* SPI_WAITFORTxREADY */
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extern unsigned char spi_busy;
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void spi_init(void);
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/* Write one character to SPI */
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#define SPI_WRITE(data) \
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do { \
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SPI_WAITFORTx_BEFORE(); \
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SPI_TXBUF = data; \
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SPI_WAITFOREOTx(); \
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} while(0)
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/* Write one character to SPI - will not wait for end
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useful for multiple writes with wait after final */
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#define SPI_WRITE_FAST(data) \
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do { \
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SPI_WAITFORTx_BEFORE(); \
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SPI_TXBUF = data; \
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SPI_WAITFORTx_AFTER(); \
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} while(0)
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/* Read one character from SPI */
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#define SPI_READ(data) \
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do { \
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SPI_TXBUF = 0; \
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SPI_WAITFOREORx(); \
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data = SPI_RXBUF; \
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} while(0)
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/* Flush the SPI read register */
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#ifndef SPI_FLUSH
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#define SPI_FLUSH() \
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do { \
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SPI_RXBUF; \
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} while(0);
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#endif
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#endif /* SPI_H_ */
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