304 lines
10 KiB
C
304 lines
10 KiB
C
/*
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* Copyright (c) 2015, Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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#include "contiki-conf.h"
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#include "rf-core/dot-15-4g.h"
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#include "driverlib/rf_mailbox.h"
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#include "driverlib/rf_common_cmd.h"
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#include "driverlib/rf_prop_cmd.h"
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#include <stdint.h>
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/*---------------------------------------------------------------------------*/
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#ifdef SMARTRF_SETTINGS_CONF_BOARD_OVERRIDES
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#define SMARTRF_SETTINGS_BOARD_OVERRIDES SMARTRF_SETTINGS_CONF_BOARD_OVERRIDES
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#else
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#define SMARTRF_SETTINGS_BOARD_OVERRIDES
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#endif
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/*---------------------------------------------------------------------------*/
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#ifdef SMARTRF_SETTINGS_CONF_BAND_OVERRIDES
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#define SMARTRF_SETTINGS_BAND_OVERRIDES SMARTRF_SETTINGS_CONF_BAND_OVERRIDES
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#else
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#define SMARTRF_SETTINGS_BAND_OVERRIDES
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#endif
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/*---------------------------------------------------------------------------*/
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/* RSSI offset configuration for the 431-527MHz band */
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#ifdef SMARTRF_SETTINGS_CONF_RSSI_OFFSET_431_527
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#define SMARTRF_SETTINGS_RSSI_OFFSET_431_527 SMARTRF_SETTINGS_CONF_RSSI_OFFSET_431_527
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#else
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#define SMARTRF_SETTINGS_RSSI_OFFSET_431_527 0x000288A3
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#endif
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/*---------------------------------------------------------------------------*/
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/* RSSI offset configuration for the 779-930MHz band */
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#ifdef SMARTRF_SETTINGS_CONF_RSSI_OFFSET_779_930
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#define SMARTRF_SETTINGS_RSSI_OFFSET_779_930 SMARTRF_SETTINGS_CONF_RSSI_OFFSET_779_930
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#else
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#define SMARTRF_SETTINGS_RSSI_OFFSET_779_930 0x00FB88A3
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#endif
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/*---------------------------------------------------------------------------*/
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#ifdef SMARTRF_SETTINGS_CONF_OVERRIDE_TRIM_OFFSET
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#define SMARTRF_SETTINGS_OVERRIDE_TRIM_OFFSET SMARTRF_SETTINGS_CONF_OVERRIDE_TRIM_OFFSET
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#else
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#define SMARTRF_SETTINGS_OVERRIDE_TRIM_OFFSET 0x00038883
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#endif
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/*---------------------------------------------------------------------------*/
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/* Select RSSI offset value based on the frequency band */
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#if DOT_15_4G_FREQUENCY_BAND_ID==DOT_15_4G_FREQUENCY_BAND_470
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#define RSSI_OFFSET SMARTRF_SETTINGS_RSSI_OFFSET_431_527
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#else
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#define RSSI_OFFSET SMARTRF_SETTINGS_RSSI_OFFSET_779_930
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#endif
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/*---------------------------------------------------------------------------*/
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/* Overrides for CMD_PROP_RADIO_DIV_SETUP */
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static uint32_t overrides[] =
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{
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/*
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* override_use_patch_prop_genfsk.xml
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* PHY: Use MCE ROM bank 4, RFE RAM patch
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*/
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MCE_RFE_OVERRIDE(0, 4, 0, 1, 0, 0),
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/*
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* override_synth_prop_863_930_div5.xml
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* Synth: Set recommended RTRIM to 7
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*/
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HW_REG_OVERRIDE(0x4038, 0x0037),
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/* Synth: Set Fref to 4 MHz */
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(uint32_t)0x000684A3,
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/* Synth: Configure fine calibration setting */
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HW_REG_OVERRIDE(0x4020, 0x7F00),
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/* Synth: Configure fine calibration setting */
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HW_REG_OVERRIDE(0x4064, 0x0040),
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/* Synth: Configure fine calibration setting */
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(uint32_t)0xB1070503,
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/* Synth: Configure fine calibration setting */
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(uint32_t)0x05330523,
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/* Synth: Set loop bandwidth after lock to 20 kHz */
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(uint32_t)0x0A480583,
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/* Synth: Set loop bandwidth after lock to 20 kHz */
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(uint32_t)0x7AB80603,
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/*
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* Synth: Configure VCO LDO
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* (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)
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*/
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ADI_REG_OVERRIDE(1, 4, 0x9F),
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/* Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1) */
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ADI_HALFREG_OVERRIDE(1, 7, 0x4, 0x4),
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/* Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering */
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(uint32_t)0x02010403,
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/* Synth: Configure extra PLL filtering */
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(uint32_t)0x00108463,
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/* Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us) */
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(uint32_t)0x04B00243,
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/*
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* override_phy_rx_aaf_bw_0xd.xml
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* Rx: Set anti-aliasing filter bandwidth to 0xD
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* (in ADI0, set IFAMPCTL3[7:4]=0xD)
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*/
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ADI_HALFREG_OVERRIDE(0, 61, 0xF, 0xD),
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/*
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* override_phy_gfsk_rx.xml
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* Rx: Set LNA bias current trim offset. The board can override this
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*/
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(uint32_t)SMARTRF_SETTINGS_OVERRIDE_TRIM_OFFSET,
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/* Rx: Freeze RSSI on sync found event */
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HW_REG_OVERRIDE(0x6084, 0x35F1),
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/*
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* override_phy_gfsk_pa_ramp_agc_reflevel_0x1a.xml
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* Tx: Enable PA ramping (0x41). Rx: Set AGC reference level to 0x1A.
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*/
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HW_REG_OVERRIDE(0x6088, 0x411A),
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/* Tx: Configure PA ramping setting */
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HW_REG_OVERRIDE(0x608C, 0x8213),
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/*
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* Rx: Set RSSI offset to adjust reported RSSI
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* The board can override this
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*/
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(uint32_t)RSSI_OFFSET,
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/*
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* TX power override
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* Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8)
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*/
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ADI_REG_OVERRIDE(0, 12, 0xF8),
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/* Overrides for CRC16 functionality */
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(uint32_t)0x943,
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(uint32_t)0x963,
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/* Board-specific overrides, if any */
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SMARTRF_SETTINGS_BOARD_OVERRIDES
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/* Band-specific overrides, if any */
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SMARTRF_SETTINGS_BAND_OVERRIDES
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(uint32_t)0xFFFFFFFF,
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};
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/*---------------------------------------------------------------------------*/
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/* CMD_PROP_RADIO_DIV_SETUP */
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rfc_CMD_PROP_RADIO_DIV_SETUP_t smartrf_settings_cmd_prop_radio_div_setup =
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{
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.commandNo = 0x3807,
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.status = 0x0000,
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.pNextOp = 0,
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.startTime = 0x00000000,
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.startTrigger.triggerType = 0x0,
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.startTrigger.bEnaCmd = 0x0,
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.startTrigger.triggerNo = 0x0,
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.startTrigger.pastTrig = 0x0,
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.condition.rule = 0x1,
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.condition.nSkip = 0x0,
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.modulation.modType = 0x1,
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.modulation.deviation = 0x64,
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.symbolRate.preScale = 0xf,
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.symbolRate.rateWord = 0x8000,
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.rxBw = 0x24,
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.preamConf.nPreamBytes = 0x3,
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.preamConf.preamMode = 0x0,
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.formatConf.nSwBits = 0x18,
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.formatConf.bBitReversal = 0x0,
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.formatConf.bMsbFirst = 0x1,
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.formatConf.fecMode = 0x0,
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/* 7: .4g mode with dynamic whitening and CRC choice */
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.formatConf.whitenMode = 0x7,
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.config.frontEndMode = 0x00, /* Set by the driver */
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.config.biasMode = 0x00, /* Set by the driver */
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.config.analogCfgMode = 0x0,
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.config.bNoFsPowerUp = 0x0,
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.txPower = 0x00, /* Driver sets correct value */
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.pRegOverride = overrides,
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.intFreq = 0x8000,
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.centerFreq = 868,
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.loDivider = 0x05,
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};
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/*---------------------------------------------------------------------------*/
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/* CMD_FS */
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rfc_CMD_FS_t smartrf_settings_cmd_fs =
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{
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.commandNo = 0x0803,
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.status = 0x0000,
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.pNextOp = 0,
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.startTime = 0x00000000,
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.startTrigger.triggerType = 0x0,
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.startTrigger.bEnaCmd = 0x0,
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.startTrigger.triggerNo = 0x0,
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.startTrigger.pastTrig = 0x0,
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.condition.rule = 0x1,
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.condition.nSkip = 0x0,
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.frequency = 868,
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.fractFreq = 0x0000,
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.synthConf.bTxMode = 0x0,
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.synthConf.refFreq = 0x0,
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.__dummy0 = 0x00,
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.__dummy1 = 0x00,
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.__dummy2 = 0x00,
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.__dummy3 = 0x0000,
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};
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/*---------------------------------------------------------------------------*/
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/* CMD_PROP_TX_ADV */
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rfc_CMD_PROP_TX_ADV_t smartrf_settings_cmd_prop_tx_adv =
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{
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.commandNo = 0x3803,
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.status = 0x0000,
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.pNextOp = 0,
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.startTime = 0x00000000,
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.startTrigger.triggerType = 0x0,
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.startTrigger.bEnaCmd = 0x0,
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.startTrigger.triggerNo = 0x0,
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.startTrigger.pastTrig = 0x0,
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.condition.rule = 0x1,
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.condition.nSkip = 0x0,
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.pktConf.bFsOff = 0x0,
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.pktConf.bUseCrc = 0x1,
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.pktConf.bCrcIncSw = 0x0, /* .4g mode */
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.pktConf.bCrcIncHdr = 0x0, /* .4g mode */
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.numHdrBits = 0x10 /* 16: .4g mode */,
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.pktLen = 0x0000,
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.startConf.bExtTxTrig = 0x0,
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.startConf.inputMode = 0x0,
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.startConf.source = 0x0,
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.preTrigger.triggerType = TRIG_REL_START,
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.preTrigger.bEnaCmd = 0x0,
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.preTrigger.triggerNo = 0x0,
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.preTrigger.pastTrig = 0x1,
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.preTime = 0x00000000,
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.syncWord = 0x0055904e,
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.pPkt = 0,
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};
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/*---------------------------------------------------------------------------*/
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/* CMD_PROP_RX_ADV */
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rfc_CMD_PROP_RX_ADV_t smartrf_settings_cmd_prop_rx_adv =
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{
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.commandNo = 0x3804,
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.status = 0x0000,
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.pNextOp = 0,
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.startTime = 0x00000000,
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.startTrigger.triggerType = 0x0,
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.startTrigger.bEnaCmd = 0x0,
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.startTrigger.triggerNo = 0x0,
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.startTrigger.pastTrig = 0x0,
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.condition.rule = 0x1,
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.condition.nSkip = 0x0,
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.pktConf.bFsOff = 0x0,
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.pktConf.bRepeatOk = 0x1,
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.pktConf.bRepeatNok = 0x1,
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.pktConf.bUseCrc = 0x1,
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.pktConf.bCrcIncSw = 0x0, /* .4g mode */
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.pktConf.bCrcIncHdr = 0x0, /* .4g mode */
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.pktConf.endType = 0x0,
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.pktConf.filterOp = 0x1,
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.rxConf.bAutoFlushIgnored = 0x1,
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.rxConf.bAutoFlushCrcErr = 0x1,
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.rxConf.bIncludeHdr = 0x0,
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.rxConf.bIncludeCrc = 0x0,
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.rxConf.bAppendRssi = 0x1,
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.rxConf.bAppendTimestamp = 0x0,
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.rxConf.bAppendStatus = 0x1,
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.syncWord0 = 0x0055904e,
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.syncWord1 = 0x00000000,
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.maxPktLen = 0x0000, /* To be populated by the driver. */
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.hdrConf.numHdrBits = 0x10, /* 16: .4g mode */
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.hdrConf.lenPos = 0x0, /* .4g mode */
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.hdrConf.numLenBits = 0x0B, /* 11 = 0x0B .4g mode */
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.addrConf.addrType = 0x0,
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.addrConf.addrSize = 0x0,
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.addrConf.addrPos = 0x0,
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.addrConf.numAddr = 0x0,
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.lenOffset = -4, /* .4g mode */
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.endTrigger.triggerType = TRIG_NEVER,
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.endTrigger.bEnaCmd = 0x0,
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.endTrigger.triggerNo = 0x0,
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.endTrigger.pastTrig = 0x0,
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.endTime = 0x00000000,
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.pAddr = 0,
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.pQueue = 0,
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.pOutput = 0,
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};
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/*---------------------------------------------------------------------------*/
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