223 lines
5.2 KiB
ArmAsm
223 lines
5.2 KiB
ArmAsm
/*
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* armboot - Startup Code for ARM720 CPU-core
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*
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* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
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* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
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.equ IRQ_DISABLE, 0x80 /* when I bit is set, IRQ is disabled */
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.equ FIQ_DISABLE, 0x40 /* when F bit is set, FIQ is disabled */
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.equ USR_MODE, 0x10
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.equ FIQ_MODE, 0x11
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.equ IRQ_MODE, 0x12
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.equ SVC_MODE, 0x13
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.equ ABT_MODE, 0x17
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.equ UND_MODE, 0x1B
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.equ SYS_MODE, 0x1F
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.equ usr_stack_size, 1024
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.equ irq_stack_size, 256
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.equ fiq_stack_size, 256
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.equ und_stack_size, 256
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.equ abt_stack_size, 16
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.equ sup_stack_size, 16
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/*
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*************************************************************************
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*
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* Jump vector table as in table 3.1 in [1]
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*
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*************************************************************************
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*/
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.section .start
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.set base, .
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.set _rom_data_init, 0x108d0
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.globl _start
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_start: b _begin
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ldr pc, _undefined_instruction
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ldr pc, _software_interrupt
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ldr pc, _prefetch_abort
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ldr pc, _data_abort
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ldr pc, _not_used
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ldr pc, _irq
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ldr pc, _fiq
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#ifdef USE_ROM_VARS
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/* these vectors are used for rom patching */
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.org 0x20
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.code 16
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_RPTV_0_START:
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bx lr /* do nothing */
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.org 0x60
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_RPTV_1_START:
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bx lr /* do nothing */
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.org 0xa0
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_RPTV_2_START:
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bx lr /* do nothing */
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.org 0xe0
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_RPTV_3_START:
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bx lr /* do nothing */
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.org 0x120
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ROM_var_start: .word 0
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.org 0x7ff
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ROM_var_end: .word 0
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#endif /*USE_ROM_VARS*/
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.code 32
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.align
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_begin:
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/* FIQ mode stack */
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msr CPSR_c, #(FIQ_MODE | IRQ_DISABLE | FIQ_DISABLE)
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ldr sp, =__fiq_stack_top__ /* set the FIQ stack pointer */
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/* IRQ mode stack */
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msr CPSR_c, #(IRQ_MODE | IRQ_DISABLE | FIQ_DISABLE)
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ldr sp, =__irq_stack_top__ /* set the IRQ stack pointer */
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/* Supervisor mode stack */
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msr CPSR_c, #(SVC_MODE | IRQ_DISABLE | FIQ_DISABLE)
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ldr sp, =__svc_stack_top__ /* set the SVC stack pointer */
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/* Undefined mode stack */
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msr CPSR_c, #(UND_MODE | IRQ_DISABLE | FIQ_DISABLE)
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ldr sp, =__und_stack_top__ /* set the UND stack pointer */
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/* Abort mode stack */
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msr CPSR_c, #(ABT_MODE | IRQ_DISABLE | FIQ_DISABLE)
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ldr sp, =__abt_stack_top__ /* set the ABT stack pointer */
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/* System mode stack */
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msr CPSR_c, #(SYS_MODE | IRQ_DISABLE | FIQ_DISABLE)
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ldr sp, =__sys_stack_top__ /* set the SYS stack pointer */
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#ifdef USE_ROM_VARS
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ldr r12,=_rom_data_init
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mov lr,pc
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bx r12
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#endif
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msr CPSR_c, #(SYS_MODE)
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/* Clear BSS */
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clear_bss:
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ldr r0, _bss_start /* find start of bss segment */
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ldr r1, _bss_end /* stop here */
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mov r2, #0x00000000 /* clear */
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clbss_l:
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str r2, [r0] /* clear loop... */
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add r0, r0, #4
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cmp r0, r1
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blt clbss_l
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b main
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// ldr r1,=_system_stack
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// msr cpsr_c,#(SVC_MODE | I_BIT | F_BIT)
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// add r1,r1,#sup_stack_size
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// mov sp,r1
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// msr cpsr_c,#(IRQ_MODE | I_BIT | F_BIT)
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// add r1,r1,#irq_stack_size
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// mov sp,r1
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// msr cpsr_c,#(FIQ_MODE | I_BIT | F_BIT)
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// add r1,r1,#fiq_stack_size
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// mov sp,r1
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// msr cpsr_c,#(ABT_MODE | I_BIT | F_BIT)
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// add r1,r1,#abt_stack_size
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// mov sp,r1
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// msr cpsr_c,#(UND_MODE | I_BIT | F_BIT)
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// add r1,r1,#und_stack_size
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// mov sp,r1
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// msr cpsr_c,#(USR_MODE | I_BIT | F_BIT)
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// bl _rom_data_init+.-base
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// msr cpsr_c,#(SVC_MODE) // turn on interrupts --- for debug only
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// msr cpsr_c,#(USR_MODE) // turn on interrupts --- for debug only
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// add r1,r1,#usr_stack_size
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// mov sp,r1
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_undefined_instruction: .word undefined_instruction
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_software_interrupt: .word software_interrupt
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_prefetch_abort: .word prefetch_abort
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_data_abort: .word data_abort
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_not_used: .word not_used
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_irq: .word irq
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_fiq: .word fiq
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.balignl 16,0xdeadbeef
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/*
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* These are defined in the board-specific linker script.
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*/
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.globl _bss_start
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_bss_start:
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.word __bss_start
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.globl _bss_end
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_bss_end:
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.word _end
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_system_stack:
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. = . + usr_stack_size + irq_stack_size + fiq_stack_size + und_stack_size + abt_stack_size + sup_stack_size
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/*
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* exception handlers
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*/
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.align 5
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undefined_instruction:
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.align 5
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software_interrupt:
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.align 5
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prefetch_abort:
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nop
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.align 5
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data_abort:
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.align 5
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not_used:
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.align 5
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//irq:
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//
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// .align 5
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fiq:
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.align 5
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