706 lines
18 KiB
C
706 lines
18 KiB
C
/*
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* Copyright (c) 2014, Analog Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \author Dragos Bogdan <Dragos.Bogdan@Analog.com>, Ian Martin <martini@redwirellc.com>
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*/
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/******************************************************************************/
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/***************************** Include Files **********************************/
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/******************************************************************************/
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#include <stdint.h>
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#include "rl78.h"
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#include "Communication.h" /* Communication definitions */
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#ifndef NOP
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#define NOP asm ("nop")
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#endif
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/* Enable interrupts: */
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#ifndef EI
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#ifdef __GNUC__
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#define EI asm ("ei");
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#else
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#define EI __enable_interrupt();
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#endif
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#endif
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#undef BIT
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#define BIT(n) (1 << (n))
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#define CLK_SCALER (0x4)
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#define SCALED_CLK (f_CLK / (1 << CLK_SCALER))
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#define BITBANG_SPI 1
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char IICA0_Flag;
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/******************************************************************************/
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/************************ Functions Definitions *******************************/
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/******************************************************************************/
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/***************************************************************************//**
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* @brief I2C interrupt service routine.
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*
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* @return None.
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*******************************************************************************/
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/*__interrupt */ static void
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IICA0_Interrupt(void)
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{
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IICA0_Flag = 1;
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}
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/***************************************************************************//**
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* @brief Initializes the SPI communication peripheral.
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*
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* @param lsbFirst - Transfer format (0 or 1).
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* Example: 0x0 - MSB first.
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* 0x1 - LSB first.
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* @param clockFreq - SPI clock frequency (Hz).
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* Example: 1000 - SPI clock frequency is 1 kHz.
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* @param clockPol - SPI clock polarity (0 or 1).
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* Example: 0x0 - Idle state for clock is a low level; active
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* state is a high level;
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* 0x1 - Idle state for clock is a high level; active
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* state is a low level.
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* @param clockEdg - SPI clock edge (0 or 1).
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* Example: 0x0 - Serial output data changes on transition
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* from idle clock state to active clock state;
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* 0x1 - Serial output data changes on transition
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* from active clock state to idle clock state.
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*
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* @return status - Result of the initialization procedure.
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* Example: 0 - if initialization was successful;
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* -1 - if initialization was unsuccessful.
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*******************************************************************************/
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char
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SPI_Init(enum CSI_Bus bus,
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char lsbFirst,
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long clockFreq,
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char clockPol,
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char clockEdg)
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{
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#if BITBANG_SPI
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PIOR5 = 1; /* Move SPI/I2C/UART functions from Port 0 pins 2-4 to Port 8. */
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/* Configure SCLK as an output. */
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PM0 &= ~BIT(4);
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POM0 &= ~BIT(4);
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/* Configure MOSI as an output: */
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PM0 &= ~BIT(2);
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POM0 &= ~BIT(2);
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PMC0 &= ~BIT(2);
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/* Configure MISO as an input: */
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PM0 |= BIT(3);
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PMC0 &= ~BIT(3);
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#else
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char sdrValue = 0;
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char delay = 0;
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uint16_t scr;
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uint8_t shift;
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PIOR5 = 0; /* Keep SPI functions on Port 0 pins 2-4. */
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/* Enable input clock supply. */
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if(bus <= CSI11) {
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SAU0EN = 1;
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} else { SAU1EN = 1;
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}
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/* After setting the SAUmEN bit to 1, be sure to set serial clock select
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register m (SPSm) after 4 or more fCLK clocks have elapsed. */
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NOP;
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NOP;
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NOP;
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NOP;
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/* Select the fCLK as input clock. */
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if(bus <= CSI11) {
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SPS0 = (CLK_SCALER << 4) | CLK_SCALER; /* TODO: kludge */
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} else { SPS1 = (CLK_SCALER << 4) | CLK_SCALER; /* TODO: kludge */
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}
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/* Select the CSI operation mode. */
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switch(bus) {
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case CSI00: SMR00 = 0x0020;
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break;
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case CSI01: SMR01 = 0x0020;
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break;
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case CSI10: SMR02 = 0x0020;
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break;
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case CSI11: SMR03 = 0x0020;
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break;
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case CSI20: SMR10 = 0x0020;
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break;
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case CSI21: SMR11 = 0x0020;
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break;
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case CSI30: SMR12 = 0x0020;
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break;
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case CSI31: SMR13 = 0x0020;
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break;
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}
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clockPol = 1 - clockPol;
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scr = (clockEdg << 13) |
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(clockPol << 12) |
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0xC000 | /* Operation mode: Transmission/reception. */
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0x0007; /* 8-bit data length. */
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switch(bus) {
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case CSI00: SCR00 = scr;
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break;
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case CSI01: SCR01 = scr;
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break;
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case CSI10: SCR02 = scr;
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break;
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case CSI11: SCR03 = scr;
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break;
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case CSI20: SCR10 = scr;
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break;
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case CSI21: SCR11 = scr;
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break;
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case CSI30: SCR12 = scr;
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break;
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case CSI31: SCR13 = scr;
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break;
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}
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/* clockFreq = mckFreq / (sdrValue * 2 + 2) */
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sdrValue = SCALED_CLK / (2 * clockFreq) - 1;
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sdrValue <<= 9;
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switch(bus) {
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case CSI00: SDR00 = sdrValue;
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break;
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case CSI01: SDR01 = sdrValue;
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break;
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case CSI10: SDR02 = sdrValue;
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break;
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case CSI11: SDR03 = sdrValue;
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break;
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case CSI20: SDR10 = sdrValue;
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break;
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case CSI21: SDR11 = sdrValue;
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break;
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case CSI30: SDR12 = sdrValue;
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break;
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case CSI31: SDR13 = sdrValue;
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break;
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}
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/* Set the clock and data initial level. */
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clockPol = 1 - clockPol;
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shift = bus & 0x3;
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if(bus <= CSI11) {
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SO0 &= ~(0x0101 << shift);
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SO0 |= ((clockPol << 8) | clockPol) << shift;
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} else {
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SO1 &= ~(0x0101 << shift);
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SO1 |= ((clockPol << 8) | clockPol) << shift;
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}
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/* Enable output for serial communication operation. */
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switch(bus) {
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case CSI00: SOE0 |= BIT(0);
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break;
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case CSI01: SOE0 |= BIT(1);
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break;
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case CSI10: SOE0 |= BIT(2);
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break;
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case CSI11: SOE0 |= BIT(3);
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break;
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case CSI20: SOE1 |= BIT(0);
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break;
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case CSI21: SOE1 |= BIT(1);
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break;
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case CSI30: SOE1 |= BIT(2);
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break;
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case CSI31: SOE1 |= BIT(3);
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break;
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}
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switch(bus) {
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case CSI00:
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/* SO00 output: */
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P1 |= BIT(2);
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PM1 &= ~BIT(2);
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/* SI00 input: */
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PM1 |= BIT(1);
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/* SCK00N output: */
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P1 |= BIT(0);
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PM1 &= ~BIT(0);
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break;
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case CSI01:
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/* SO01 output: */
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P7 |= BIT(3);
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PM7 &= ~BIT(3);
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/* SI01 input: */
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PM7 |= BIT(4);
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/* SCK01 output: */
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P7 |= BIT(5);
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PM7 &= ~BIT(5);
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break;
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case CSI10:
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PMC0 &= ~BIT(2); /* Disable analog input on SO10. */
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/* SO10 output: */
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P0 |= BIT(2);
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PM0 &= ~BIT(2);
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/* SI10 input: */
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PM0 |= BIT(3);
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/* SCK10N output: */
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P0 |= BIT(4);
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PM0 &= ~BIT(4);
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break;
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case CSI11:
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/* SO11 output: */
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P5 |= BIT(1);
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PM5 &= ~BIT(1);
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/* SI11 input: */
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PM5 |= BIT(0);
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/* SCK11 output: */
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P3 |= BIT(0);
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PM3 &= ~BIT(0);
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break;
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case CSI20:
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/* SO20 output: */
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P1 |= BIT(3);
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PM1 &= ~BIT(3);
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/* SI20 input: */
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PM1 |= BIT(4);
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/* SCK20 output: */
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P1 |= BIT(5);
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PM1 &= ~BIT(5);
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break;
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case CSI21:
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/* SO21 output: */
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P7 |= BIT(2);
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PM7 &= ~BIT(2);
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/* SI21 input: */
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PM7 |= BIT(1);
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/* SCK21 output: */
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P7 |= BIT(0);
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PM7 &= ~BIT(0);
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break;
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case CSI30:
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/* TODO: not supported */
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break;
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case CSI31:
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/* TODO: not supported */
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break;
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}
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/* Wait for the changes to take place. */
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for(delay = 0; delay < 50; delay++) {
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NOP;
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}
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/* Set the SEmn bit to 1 and enter the communication wait status */
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switch(bus) {
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case CSI00: SS0 = BIT(0);
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break;
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case CSI01: SS0 = BIT(1);
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break;
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case CSI10: SS0 = BIT(2);
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break;
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case CSI11: SS0 = BIT(3);
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break;
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case CSI20: SS1 = BIT(0);
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break;
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case CSI21: SS1 = BIT(1);
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break;
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case CSI30: SS1 = BIT(2);
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break;
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case CSI31: SS1 = BIT(3);
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break;
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}
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/* Sanity check: */
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if(bus == CSI10) {
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/* MOSI: */
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PIOR5 = 0;
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PMC02 = 0;
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PM02 = 0;
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P02 = 1;
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/* MISO: */
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PIOR5 = 0;
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PMC03 = 0;
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PM03 = 1;
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/* SCLK: */
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PIOR5 = 0;
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PM04 = 0;
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P04 = 1;
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}
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#endif
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return 0;
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}
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/***************************************************************************//**
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* @brief Writes data to SPI.
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*
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* @param slaveDeviceId - The ID of the selected slave device.
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* @param data - Data represents the write buffer.
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* @param bytesNumber - Number of bytes to write.
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*
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* @return Number of written bytes.
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*******************************************************************************/
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#if 0
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char
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SPI_Write(enum CSI_Bus bus,
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char slaveDeviceId,
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unsigned char *data,
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char bytesNumber)
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{
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char byte = 0;
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unsigned char read = 0;
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unsigned short originalSCR = 0;
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unsigned short originalSO1 = 0;
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volatile uint8_t *sio;
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volatile uint16_t *ssr;
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switch(bus) {
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default:
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case CSI00: sio = &SIO00;
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ssr = &SSR00;
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break;
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case CSI01: sio = &SIO01;
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ssr = &SSR01;
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break;
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case CSI10: sio = &SIO10;
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ssr = &SSR02;
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break;
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case CSI11: sio = &SIO11;
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ssr = &SSR03;
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break;
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case CSI20: sio = &SIO20;
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ssr = &SSR10;
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break;
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case CSI21: sio = &SIO21;
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ssr = &SSR11;
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break;
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case CSI30: sio = &SIO30;
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ssr = &SSR12;
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break;
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case CSI31: sio = &SIO31;
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ssr = &SSR13;
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break;
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}
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for(byte = 0; byte < bytesNumber; byte++) {
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*sio = data[byte];
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NOP;
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while(*ssr & 0x0040) ;
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read = *sio;
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}
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return bytesNumber;
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}
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#endif
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#if BITBANG_SPI
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#define sclk_low() (P0 &= ~BIT(4))
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#define sclk_high() (P0 |= BIT(4))
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#define mosi_low() (P0 &= ~BIT(2))
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#define mosi_high() (P0 |= BIT(2))
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#define read_miso() (P0bits.bit3)
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static unsigned char
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spi_byte_exchange(unsigned char tx)
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{
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unsigned char rx = 0, n = 0;
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sclk_low();
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for(n = 0; n < 8; n++) {
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if(tx & 0x80) {
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mosi_high();
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} else { mosi_low();
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}
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/* The slave samples MOSI at the rising-edge of SCLK. */
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sclk_high();
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rx <<= 1;
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rx |= read_miso();
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tx <<= 1;
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/* The slave changes the value of MISO at the falling-edge of SCLK. */
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sclk_low();
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}
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return rx;
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}
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#endif
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/***************************************************************************//**
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* @brief Reads data from SPI.
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*
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* @param slaveDeviceId - The ID of the selected slave device.
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* @param data - Data represents the write buffer as an input parameter
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* and the read buffer as an output parameter.
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* @param bytesNumber - Number of bytes to read.
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*
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* @return Number of read bytes.
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*******************************************************************************/
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char
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SPI_Read(enum CSI_Bus bus,
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char slaveDeviceId,
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unsigned char *data,
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char bytesNumber)
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{
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#if BITBANG_SPI
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unsigned char n = 0;
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for(n = 0; n < bytesNumber; n++) {
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data[n] = spi_byte_exchange(data[n]);
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}
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#else
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char byte = 0;
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unsigned short originalSCR = 0;
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unsigned short originalSO1 = 0;
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volatile uint8_t *sio;
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volatile uint16_t *ssr;
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char dummy;
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switch(bus) {
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default:
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case CSI00: sio = &SIO00;
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ssr = &SSR00;
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break;
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case CSI01: sio = &SIO01;
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ssr = &SSR01;
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break;
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case CSI10: sio = &SIO10;
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ssr = &SSR02;
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break;
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case CSI11: sio = &SIO11;
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ssr = &SSR03;
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break;
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case CSI20: sio = &SIO20;
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ssr = &SSR10;
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break;
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case CSI21: sio = &SIO21;
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ssr = &SSR11;
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break;
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case CSI30: sio = &SIO30;
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ssr = &SSR12;
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break;
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case CSI31: sio = &SIO31;
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ssr = &SSR13;
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break;
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}
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/* Flush the receive buffer: */
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while(*ssr & 0x0020) dummy = *sio;
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(void)dummy;
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for(byte = 0; byte < bytesNumber; byte++) {
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*sio = data[byte];
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NOP;
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while(*ssr & 0x0040) ;
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data[byte] = *sio;
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}
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#endif
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return bytesNumber;
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}
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/***************************************************************************//**
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* @brief Initializes the I2C communication peripheral.
|
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*
|
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* @param clockFreq - I2C clock frequency (Hz).
|
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* Example: 100000 - SPI clock frequency is 100 kHz.
|
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* @return status - Result of the initialization procedure.
|
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* Example: 0 - if initialization was successful;
|
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* -1 - if initialization was unsuccessful.
|
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*******************************************************************************/
|
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char
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I2C_Init(long clockFreq)
|
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{
|
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long fckFreq = 32000000;
|
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unsigned char wlValue = 0;
|
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unsigned char whValue = 0;
|
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|
||
(void)IICA0_Interrupt; /* Prevent an unused-function warning. */
|
||
|
||
/* Enable interrupts */
|
||
EI;
|
||
|
||
/* Enable input clock supply. */
|
||
IICA0EN = 1;
|
||
|
||
/* Set the fast mode plus operation. */
|
||
SMC0 = 1;
|
||
|
||
/* Set transfer rate. */
|
||
wlValue = (unsigned char)((0.5 * fckFreq) / clockFreq);
|
||
whValue = (unsigned char)(wlValue - (fckFreq / (10 * clockFreq)));
|
||
IICWL0 = wlValue;
|
||
IICWH0 = whValue;
|
||
|
||
STCEN0 = 1; /* After operation is enabled, enable generation of a start */
|
||
/* condition without detecting a stop condition. */
|
||
WTIM0 = 1; /* Interrupt request is generated at the ninth clock’s */
|
||
/* falling edge. */
|
||
|
||
/* Enable I2C operation. */
|
||
IICE0 = 1;
|
||
|
||
/* Configure SCLA0 and SDAA0 pins as digital output. */
|
||
P6 &= ~0x03;
|
||
PM6 &= ~0x03;
|
||
|
||
return 0;
|
||
}
|
||
/***************************************************************************//**
|
||
* @brief Writes data to a slave device.
|
||
*
|
||
* @param slaveAddress - Adress of the slave device.
|
||
* @param dataBuffer - Pointer to a buffer storing the transmission data.
|
||
* @param bytesNumber - Number of bytes to write.
|
||
* @param stopBit - Stop condition control.
|
||
* Example: 0 - A stop condition will not be sent;
|
||
* 1 - A stop condition will be sent.
|
||
*
|
||
* @return status - Number of read bytes or 0xFF if the slave address was
|
||
* not acknowledged by the device.
|
||
*******************************************************************************/
|
||
char
|
||
I2C_Write(char slaveAddress,
|
||
unsigned char *dataBuffer,
|
||
char bytesNumber,
|
||
char stopBit)
|
||
{
|
||
char byte = 0;
|
||
char status = 0;
|
||
|
||
IICAMK0 = 1; /* Interrupt servicing disabled. */
|
||
STT0 = 1; /* Generate a start condition. */
|
||
IICAMK0 = 0; /* Interrupt servicing enabled. */
|
||
|
||
/* Send the first byte. */
|
||
IICA0_Flag = 0;
|
||
IICA0 = (slaveAddress << 1);
|
||
while(IICA0_Flag == 0) ;
|
||
|
||
if(ACKD0) { /* Acknowledge was detected. */
|
||
for(byte = 0; byte < bytesNumber; byte++) {
|
||
IICA0_Flag = 0;
|
||
IICA0 = *dataBuffer;
|
||
while(IICA0_Flag == 0) ;
|
||
dataBuffer++;
|
||
}
|
||
status = bytesNumber;
|
||
} else { /* Acknowledge was not detected. */
|
||
status = 0xFF;
|
||
}
|
||
if(stopBit) {
|
||
SPT0 = 1; /* Generate a stop condition. */
|
||
while(IICBSY0) ; /* Wait until the I2C bus status flag is cleared. */
|
||
}
|
||
|
||
return status;
|
||
}
|
||
/***************************************************************************//**
|
||
* @brief Reads data from a slave device.
|
||
*
|
||
* @param slaveAddress - Adress of the slave device.
|
||
* @param dataBuffer - Pointer to a buffer that will store the received data.
|
||
* @param bytesNumber - Number of bytes to read.
|
||
* @param stopBit - Stop condition control.
|
||
* Example: 0 - A stop condition will not be sent;
|
||
* 1 - A stop condition will be sent.
|
||
*
|
||
* @return status - Number of read bytes or 0xFF if the slave address was
|
||
* not acknowledged by the device.
|
||
*******************************************************************************/
|
||
char
|
||
I2C_Read(char slaveAddress,
|
||
unsigned char *dataBuffer,
|
||
char bytesNumber,
|
||
char stopBit)
|
||
{
|
||
char byte = 0;
|
||
char status = 0;
|
||
|
||
IICAMK0 = 1; /* Interrupt servicing disabled. */
|
||
STT0 = 1; /* Generate a start condition. */
|
||
IICAMK0 = 0; /* Interrupt servicing enabled. */
|
||
|
||
/* Send the first byte. */
|
||
IICA0_Flag = 0;
|
||
IICA0 = (slaveAddress << 1) + 1;
|
||
while(IICA0_Flag == 0) ;
|
||
|
||
if(ACKD0) { /* Acknowledge was detected. */
|
||
ACKE0 = 1; /* Enable acknowledgment. */
|
||
for(byte = 0; byte < bytesNumber; byte++) {
|
||
if(byte == (bytesNumber - 1)) {
|
||
ACKE0 = 0U; /* Disable acknowledgment. */
|
||
}
|
||
WREL0 = 1U; /* Cancel wait. */
|
||
IICA0_Flag = 0;
|
||
while(IICA0_Flag == 0) ;
|
||
*dataBuffer = IICA0;
|
||
dataBuffer++;
|
||
}
|
||
status = bytesNumber;
|
||
} else { /* Acknowledge was not detected. */
|
||
status = 0xFF;
|
||
}
|
||
if(stopBit) {
|
||
SPT0 = 1; /* Generate a stop condition. */
|
||
while(IICBSY0) ; /* Wait until the I2C bus status flag is cleared. */
|
||
}
|
||
|
||
return status;
|
||
}
|